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path: root/arch/arm/mm/cache-l2x0.c (follow)
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*-. Merge branches 'misc', 'vdso' and 'fixes' into for-nextRussell King2015-04-141-17/+16
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| | * ARM: 8310/1: l2c: Fix prefetch settings dt parsingFabrice Gasnier2015-03-181-17/+16
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* / ARM: 8309/1: l2c: enforce use of cache-level propertyFlorian Fainelli2015-03-101-0/+7
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* Merge branch 'for-linus' of git://ftp.arm.linux.org.uk/~rmk/linux-armLinus Torvalds2015-02-121-209/+230
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| * ARM: 8297/1: cache-l2x0: optimize aurora range operationsArnd Bergmann2015-02-061-46/+22
| * ARM: 8296/1: cache-l2x0: clean up aurora cache handlingArnd Bergmann2015-02-061-73/+38
| * ARM: 8262/1: l2c: Add support for overriding prefetch settingsTomasz Figa2015-01-161-0/+54
| * ARM: 8260/1: l2c: Add interface to ask hypervisor to configure L2CTomasz Figa2015-01-161-0/+6
| * ARM: 8259/1: l2c: Refactor the driver to use commit-like interfaceTomasz Figa2015-01-161-96/+116
| * ARM: 8258/1: l2c: use l2c_write_sec() for restoring latency and filter regsMarek Szyprowski2015-01-161-16/+16
* | ARM: cache-l2x0.c: Make it clear that cache-l2x0 handles L310 cache controllerPavel Machek2015-01-201-1/+1
* | ARM: l2c: fix commentGeert Uytterhoeven2015-01-201-1/+1
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* ARM: 8183/1: l2c: Improve l2c310_of_parse() error messageFabio Estevam2014-10-291-2/+2
* ARM: 8182/1: l2c: Make l2x0_cache_size_of_parse() return 'int'Fabio Estevam2014-10-291-6/+16
* ARM: 8169/1: l2c: parse cache properties from ePAPR definitionsLinus Walleij2014-10-021-0/+121
* Merge branches 'fixes' and 'misc' into for-nextRussell King2014-08-051-1/+1
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| * ARM: make it easier to check the CPU part number correctlyRussell King2014-07-181-1/+1
* | ARM: l2c: fix revision checkingRussell King2014-07-071-1/+1
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* ARM: 8076/1: mm: add support for HW coherent systems in PL310 cacheThomas Petazzoni2014-06-291-0/+31
* ARM: l2c: trial at enabling some Cortex-A9 optimisationsRussell King2014-05-301-3/+70
* ARM: l2c: add warnings for stuff modifying aux_ctrl register valuesRussell King2014-05-301-3/+22
* ARM: l2c: print a warning with L2C-310 caches if the cache size is modifiedRussell King2014-05-301-0/+2
* ARM: l2c: remove old .set_debug methodRussell King2014-05-301-19/+2
* ARM: l2c: always enable non-secure access to lockdown registersRussell King2014-05-301-2/+21
* ARM: l2c: always enable low power modesRussell King2014-05-301-0/+12
* ARM: l2c: add automatic enable of early BRESPRussell King2014-05-301-3/+22
* ARM: l2c: move L2 cache register saving to a more sensible locationRussell King2014-05-301-12/+22
* ARM: l2c: check that DT files specify the required "cache-unified" propertyRussell King2014-05-301-0/+4
* ARM: l2c: fix register namingRussell King2014-05-301-28/+29
* ARM: l2c: implement L2C-310 erratum 752271 in core L2C codeRussell King2014-05-301-1/+17
* ARM: l2c: provide generic hook to intercept writes to secure registersRussell King2014-05-301-12/+30
* ARM: l2c: move way size calculation data into l2c_init_dataRussell King2014-05-301-9/+20
* ARM: l2c: add decode for L2C-220 cache waysRussell King2014-05-301-0/+1
* ARM: l2c: move type string into l2c_init_data structureRussell King2014-05-301-7/+13
* ARM: l2c: remove obsolete l2x0 ops for non-OF initRussell King2014-05-301-206/+0
* ARM: l2c: convert Broadcom L2C-310 to new codeRussell King2014-05-301-16/+11
* ARM: l2c: add L2C-220 specific handlersRussell King2014-05-301-10/+157
* ARM: l2c: use L2C-210 handlers for L2C-310 errata-less implementationsRussell King2014-05-301-22/+36
* ARM: l2c: implement L2C-310 erratum 588369 as a method overrideRussell King2014-05-301-0/+69
* ARM: l2c: implement L2C-310 erratum 727915 as a method overrideRussell King2014-05-301-0/+20
* ARM: l2c: add L2C-210 specific handlersRussell King2014-05-301-1/+122
* ARM: l2c: move pl310_set_debug() into l2c-310 codeRussell King2014-05-301-8/+6
* ARM: l2c: simplify l2x0 unlocking codeRussell King2014-05-301-17/+8
* ARM: l2c: clean up save/resume functionsRussell King2014-05-301-57/+52
* ARM: l2c: move and add ARM L2C-2x0/L2C-310 save/resume code to non-OFRussell King2014-05-301-74/+77
* ARM: l2c: clean up L2 cache initialisation messagesRussell King2014-05-301-3/+4
* ARM: l2c: implement fixups for L2 cache controller quirks/errataRussell King2014-05-301-11/+101
* ARM: l2c: move aurora broadcast setup to enable functionRussell King2014-05-301-13/+15
* ARM: l2c: only write the auxiliary control register if requiredRussell King2014-05-301-1/+3
* ARM: l2c: write auxctrl register before unlockingRussell King2014-05-301-5/+5
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