linux - linux

	Commit message (Expand)	Author	Age	Files	Lines
*	ARM: 7502/1: contextidr: avoid using bfi instruction during notifier	Will Deacon	2012-08-25	1	-3/+4
*	ARM: 7445/1: mm: update CONTEXTIDR register to contain PID of current process	Will Deacon	2012-07-09	1	-0/+35
*	ARM: Remove current_mm per-cpu variable	Catalin Marinas	2012-04-17	1	-11/+1
*	ARM: Remove __ARCH_WANT_INTERRUPTS_ON_CTXSW on ASID-capable CPUs	Catalin Marinas	2012-04-17	1	-2/+2
*	ARM: Use TTBR1 instead of reserved context ID	Will Deacon	2012-04-17	1	-18/+27
*	ARM: LPAE: Add context switching support	Catalin Marinas	2011-12-08	1	-2/+17
*	locking, ARM: Annotate low level hw locks as raw	Thomas Gleixner	2011-09-13	1	-7/+7
*	Revert "ARM: 6944/1: mm: allow ASID 0 to be allocated to tasks"	Russell King	2011-06-09	1	-3/+3
*	Revert "ARM: 6943/1: mm: use TTBR1 instead of reserved context ID"	Russell King	2011-06-09	1	-6/+5
*	ARM: 6944/1: mm: allow ASID 0 to be allocated to tasks	Will Deacon	2011-05-26	1	-3/+3
*	ARM: 6943/1: mm: use TTBR1 instead of reserved context ID	Will Deacon	2011-05-26	1	-5/+6
*	ARM: 5905/1: ARM: Global ASID allocation on SMP	Catalin Marinas	2010-02-15	1	-14/+110
*	ARM: Fix errata 411920 workarounds	Russell King	2009-10-29	1	-4/+1
*	cpumask: use mm_cpumask() wrapper: arm	Rusty Russell	2009-09-24	1	-1/+1
*-.	Merge branches 'armv7', 'at91', 'misc' and 'omap' into devel	Russell King	2007-05-09	1	-3/+7
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\| \| *	[ARM] Fix ASID version switch	Russell King	2007-05-08	1	-3/+7
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* /	[ARM] armv7: add support for asid-tagged VIVT I-cache	Catalin Marinas	2007-05-09	1	-0/+7
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*	[ARM] 4128/1: Architecture compliant TTBR changing sequence	Catalin Marinas	2007-02-08	1	-2/+10
*	[ARM] Move mmu.c out of the way	Russell King	2006-09-20	1	-0/+45