| Commit message (Collapse) | Author | Age | Files | Lines |
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Pull SoC device tree updates from Arnd Bergmann:
"There is very little going on with new SoC support this time, all the
new chips are variations of others that we already support, and they
are all based on ARMv8 cores:
- Mediatek MT7981B (Filogic 820) and MT7988A (Filogic 880) are
networking SoCs designed to be used in wireless routers, similar to
the already supported MT7986A (Filogic 830).
- NXP i.MX8DXP is a variant of i.MX8QXP, with two CPU cores less.
These are used in many embedded and industrial applications.
- Renesas R8A779G2 (R-Car V4H ES2.0) and R8A779H0 (R-Car V4M) are
automotive SoCs.
- TI J722S is another automotive variant of its K3 family, related to
the AM62 series.
There are a total of 7 new arm32 machines and 45 arm64 ones, including
- Two Android phones based on the old Tegra30 chip
- Two machines using Cortex-A53 SoCs from Allwinner, a mini PC and a
SoM development board
- A set-top box using Amlogic Meson G12A S905X2
- Eight embedded board using NXP i.MX6/8/9
- Three machines using Mediatek network router chips
- Ten Chromebooks, all based on Mediatek MT8186
- One development board based on Mediatek MT8395 (Genio 1200)
- Seven tablets and phones based on Qualcomm SoCs, most of them from
Samsung.
- A third development board for Qualcomm SM8550 (Snapdragon 8 Gen 2)
- Three variants of the "White Hawk" board for Renesas automotive
SoCs
- Ten Rockchips RK35xx based machines, including NAS, Tablet, Game
console and industrial form factors.
- Three evaluation boards for TI K3 based SoCs
The other changes are mainly the usual feature additions for existing
hardware, cleanups, and dtc compile time fixes. One notable change is
the inclusion of PowerVR SGX GPU nodes on TI SoCs"
* tag 'soc-dt-6.9' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (824 commits)
riscv: dts: Move BUILTIN_DTB_SOURCE to common Kconfig
riscv: dts: starfive: jh7100: fix root clock names
ARM: dts: samsung: exynos4412: decrease memory to account for unusable region
arm64: dts: qcom: sm8250-xiaomi-elish: set rotation
arm64: dts: qcom: sm8650: Fix SPMI channels size
arm64: dts: qcom: sm8550: Fix SPMI channels size
arm64: dts: rockchip: Fix name for UART pin header on qnap-ts433
arm: dts: marvell: clearfog-gtr-l8: align port numbers with enclosure
arm: dts: marvell: clearfog-gtr-l8: add support for second sfp connector
dt-bindings: soc: renesas: renesas-soc: Add pattern for gray-hawk
dtc: Enable dtc interrupt_provider check
arm64: dts: st: add video encoder support to stm32mp255
arm64: dts: st: add video decoder support to stm32mp255
ARM: dts: stm32: enable crypto accelerator on stm32mp135f-dk
ARM: dts: stm32: enable CRC on stm32mp135f-dk
ARM: dts: stm32: add CRC on stm32mp131
ARM: dts: add stm32f769-disco-mb1166-reva09
ARM: dts: stm32: add display support on stm32f769-disco
ARM: dts: stm32: rename mmc_vcard to vcc-3v3 on stm32f769-disco
ARM: dts: stm32: add DSI support on stm32f769
...
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Add support for two variants of the fbx8am board.
Signed-off-by: Pierre-Hugues Husson <phhusson@freebox.fr>
Signed-off-by: Marc Gonzalez <mgonzalez@freebox.fr>
Link: https://lore.kernel.org/r/79ba726d-d02c-44b9-b6f6-59b17ba9755c@freebox.fr
[narmstrong: squashed https://lore.kernel.org/all/814c9035-1fda-4cd3-ab3c-95b58e2ecb22@freebox.fr/]
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
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The fbx8am boards are based on the Amlogic Meson G12A S905X2 SoC,
and the SEI510 board design.
Signed-off-by: Pierre-Hugues Husson <phhusson@freebox.fr>
Signed-off-by: Marc Gonzalez <mgonzalez@freebox.fr>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/59ca7d9a-a8dd-4062-852e-18b80ace6d7e@freebox.fr
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
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Underscores should not be used in node names (dtc with W=2 warns about
them), so replace them with hyphens.
Cc: Marc Gonzalez <mgonzalez@freebox.fr>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240213143217.336341-1-krzysztof.kozlowski@linaro.org
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
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The DTS code coding style expects exactly one space before '{'
character.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20240208105252.128940-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
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The capacitance value is required for the usage of the cpufreq cooling
device and power_allocator thermal governor in the appropriate energy
model.
It helps to compute the power estimated by the SoC at the appropriate
frequency. If it is the frequency of an existing OPP, or at the
frequency of the first OPP above the requested value otherwise.
The power is estimated as P = C * V^2 * f, with C being the SoC's
capacitance and V and f respectively representing the voltage and
frequency of the OPP.
Since AXG SoC doesn't have SCMI protocol support, we need to initialize
capacitance using the 'dynamic-power-coefficient' DT entry. Its value is
retrieved from the vendor kernel, and it gives us the following
freq2power mapping:
+-----------+--------+
| frequency,| power, |
| MHz | uW |
+-----------+--------+
| 100 | 10354 |
+-----------+--------+
| 250 | 27104 |
+-----------+--------+
| 500 | 55447 |
+-----------+--------+
| 667 | 77327 |
+-----------+--------+
| 1000 | 129024 |
+-----------+--------+
| 1200 | 164656 |
+-----------+--------+
| 1296 | 192489 |
+-----------+--------+
| 1416 | 239870 |
+-----------+--------+
Signed-off-by: Dmitry Rokosov <ddrokosov@salutedevices.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20240209212816.11187-3-ddrokosov@salutedevices.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
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The CPU cooling-cells property should be located in the meson-axg common
dtsi, as it is required for all AXG-based boards with DVFS.
Signed-off-by: Dmitry Rokosov <ddrokosov@salutedevices.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Acked-by: Viacheslav Bocharov <adeep@lexina.in>
Link: https://lore.kernel.org/r/20240209212816.11187-2-ddrokosov@salutedevices.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
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To ensure proper functionality of USB, it is necessary to use
the rate of 64000000 for CLKID_USB_BUS. For instance, adb may
not function correctly without this setting. This information
has been derived from the vendor SDK.
Signed-off-by: Alexey Romanov <avromanov@salutedevices.com>
Signed-off-by: Dmitry Rokosov <ddrokosov@salutedevices.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20240124130623.3471236-1-avromanov@salutedevices.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
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Otherwise they are left at 24MHz and the NPU runs very slowly.
Signed-off-by: Tomeu Vizoso <tomeu@tomeuvizoso.net>
Suggested-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20240110153704.1364073-2-tomeu@tomeuvizoso.net
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
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Add the reset controller device of Amlogic C3 SoC family
Signed-off-by: Zelong Dong <zelong.dong@amlogic.com>
Reviewed-by: Dmitry Rokosov <ddrokosov@sberdevices.ru>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20230914064018.18790-4-zelong.dong@amlogic.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
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Add GPIO interrupt controller device.
Signed-off-by: Huqiang Qin <huqiang.qin@amlogic.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20240222074640.1866284-4-huqiang.qin@amlogic.com
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Aliases use lowercase letters and place status in end.
Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20231215-s4-dts-v1-1-7831ab6972be@amlogic.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
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New device nodes are enabled by default, so no need for status=okay.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20231209124401.93814-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
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Add reserved memory for board AQ222 which is used by ATF.
Enable NAND, SPICC nodes for board AQ222.
Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20231208-s4-dts-v2-2-5a93fa356c5d@amlogic.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
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Add some device nodes for SoC S4, including periphs clock controller
node, PLL clock controller node, I2C nodes, SPICC node, NAND
controller node, Ethernet MAC and PHY node.
Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20231208-s4-dts-v2-1-5a93fa356c5d@amlogic.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
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Add dts node for EEPROM placed on baseboard in JetHub D1+ devices.
Signed-off-by: Viacheslav Bocharov <adeep@lexina.in>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20231102061233.3113249-1-adeep@lexina.in
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
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Add pinctrl node for the Meson NAND controller.
Signed-off-by: Arseniy Krasnov <avkrasnov@salutedevices.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20231109094504.131265-1-avkrasnov@salutedevices.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
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The DTS code coding style expects exactly one space before and after '='
sign.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Viacheslav Bocharov <adeep@lexina.in>
Link: https://lore.kernel.org/r/20231124094700.58071-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
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Add watchdog device.
Signed-off-by: Huqiang Qin <huqiang.qin@amlogic.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20231027104358.342861-4-huqiang.qin@amlogic.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
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Add watchdog device.
Signed-off-by: Huqiang Qin <huqiang.qin@amlogic.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20231027104358.342861-3-huqiang.qin@amlogic.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
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A1 SoC family has four i2c masters: i2c0 (I2CM_A), i2c1 (I2CM_B), i2c2
(I2CM_C) and i2c3 (I2CM_D).
Signed-off-by: George Stark <gnstark@salutedevices.com>
Signed-off-by: Dmitry Rokosov <ddrokosov@salutedevices.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20231006114145.18718-1-ddrokosov@salutedevices.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
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Add support for the Libretech cottonwood board family.
These 2 boards are based on the same PCB, with an RPi B form factor.
The "Alta" board uses an a311d while the "Solitude" variant uses an s905d3.
Co-developed-by: Da Xue <da.xue@libretech.co>
Signed-off-by: Da Xue <da.xue@libretech.co>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20231006103500.2015183-3-jbrunet@baylibre.com
[narmstrong: squashed blue/green led inversion fix]
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
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SPIFC uses muxed GPIO pins, so they should be properly configured.
Signed-off-by: Igor Prusov <ivprusov@salutedevices.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20231005195543.380273-3-ivprusov@salutedevices.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
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SPI Flash Controller uses multi-function pins, so add missing mux
definition.
Signed-off-by: Igor Prusov <ivprusov@salutedevices.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20231005195543.380273-2-ivprusov@salutedevices.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
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Using this node, we can obtain random numbers via
hardware random number generator.
Signed-off-by: Alexey Romanov <avromanov@sberdevices.ru>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20230929102942.67985-4-avromanov@salutedevices.com
[narmstrong: fixed commit message]
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
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g12 and sm1 are fairly similar when it comes to audio.
Both have 2 spdif outputs. While the 2nd output is named "spdifout_b" for
both, the 1st one is named 'spdifout' for g12 and 'spdifout_a' for sm1.
Use 'spdifout_a' for both instead.
This change does not fix any particular problem. The intent is just to make
it easier to have a common card definitions for platform designs using both
SoC families, when spdifout is used.
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Link: https://lore.kernel.org/r/20230925135326.1689396-1-jbrunet@baylibre.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
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Add pinctrl device.
Signed-off-by: Huqiang Qin <huqiang.qin@amlogic.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Tested-by: Lucas Tanure <tanure@linux.com>
Link: https://lore.kernel.org/r/20230922094342.637251-4-huqiang.qin@amlogic.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
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Add missing audio devices found on the u200 PCB. This includes
* Lineout connected to the internal DAC
* SPDIF input connected to a coaxial socket
* TDM input decoders allowing output loopback
* TDM A and B output encoders and interfaces
TDM A and B link format is set by the related external codec.
Internal audio DAC can hook to any TDM output.
This change does not include support necessary the optional the speaker and
PDM Mic headers
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Link: https://lore.kernel.org/r/20230911154541.471484-6-jbrunet@baylibre.com
[narmstrong: fixed sound-dai-cells and removed default okay status]
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
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On the u200, TDM B is wired to the onboard AD82584F i2c speaker codec.
This makes TDM B a poor choice for the interface dedicated to HDMI which
uses 4 i2s lanes.
TDM A is not a good choice either as it is connected to the SDIO wifi/bt
chip.
TDM C is not used externally by default, which makes it a better choice for
the HDMI interface.
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Link: https://lore.kernel.org/r/20230911154541.471484-5-jbrunet@baylibre.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
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spdifout B remains untested as it can only feed the HDMI controller, which
does not support spdif ATM.
Still if the u200 has spdifout b, the routes to it should be set.
Fixes: cfae4eadb7cd ("arm64: dts: meson: add audio playback to u200")
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Link: https://lore.kernel.org/r/20230911154541.471484-4-jbrunet@baylibre.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
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The audio subsystem will not work if the audio clock controller is not
enabled.
Fixes: cfae4eadb7cd ("arm64: dts: meson: add audio playback to u200")
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Link: https://lore.kernel.org/r/20230911154541.471484-3-jbrunet@baylibre.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
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u200 outputs spdif on GPIOAO_10, not GPIOH_4 which is used for the LCD
panel.
Fixes: cfae4eadb7cd ("arm64: dts: meson: add audio playback to u200")
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Link: https://lore.kernel.org/r/20230911154541.471484-2-jbrunet@baylibre.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
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Add power domain controller node for Amlogic T7 SoC
Signed-off-by: "xianwei.zhao" <xianwei.zhao@amlogic.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Tested-by: Lucas Tanure <tanure@linux.com>
Link: https://lore.kernel.org/r/20230911025223.3433776-7-xianwei.zhao@amlogic.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
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amlogic,axg-tdmin is not listed as compatible to g12a-tdmin in bindings.
Remove superfluous compatible. Fixes the dtbs_check warnings:
arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtb: audio-controller@300: compatible: ['amlogic,g12a-tdmin', 'amlogic,axg-tdmin'] is too long
from schema $id: http://devicetree.org/schemas/sound/amlogic,axg-tdm-formatters.yaml#
arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtb: audio-controller@340: compatible: ['amlogic,g12a-tdmin', 'amlogic,axg-tdmin'] is too long
from schema $id: http://devicetree.org/schemas/sound/amlogic,axg-tdm-formatters.yaml#
arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtb: audio-controller@380: compatible: ['amlogic,g12a-tdmin', 'amlogic,axg-tdmin'] is too long
from schema $id: http://devicetree.org/schemas/sound/amlogic,axg-tdm-formatters.yaml#
arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtb: audio-controller@3c0: compatible: ['amlogic,g12a-tdmin', 'amlogic,axg-tdmin'] is too long
from schema $id: http://devicetree.org/schemas/sound/amlogic,axg-tdm-formatters.yaml#
Signed-off-by: Alexander Stein <alexander.stein@mailbox.org>
Link: https://lore.kernel.org/r/20230808161755.31594-2-alexander.stein@mailbox.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
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Binding specify order of clocks as:
1. "sclk"
2. "lrclk"
3. "mclk"
Adjust clocks accordingly. Fixes warnings:
arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtb: audio-controller-0: clock-names:0: 'sclk' was expected
from schema $id: http://devicetree.org/schemas/sound/amlogic,axg-tdm-iface.yaml#
arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtb: audio-controller-0: clock-names:1: 'lrclk' was expected
from schema $id: http://devicetree.org/schemas/sound/amlogic,axg-tdm-iface.yaml#
arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtb: audio-controller-0: clock-names:2: 'mclk' was expected
from schema $id: http://devicetree.org/schemas/sound/amlogic,axg-tdm-iface.yaml#
arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtb: audio-controller-1: clock-names:0: 'sclk' was expected
from schema $id: http://devicetree.org/schemas/sound/amlogic,axg-tdm-iface.yaml#
arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtb: audio-controller-1: clock-names:1: 'lrclk' was expected
from schema $id: http://devicetree.org/schemas/sound/amlogic,axg-tdm-iface.yaml#
arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtb: audio-controller-1: clock-names:2: 'mclk' was expected
from schema $id: http://devicetree.org/schemas/sound/amlogic,axg-tdm-iface.yaml#
arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtb: audio-controller-2: clock-names:0: 'sclk' was expected
from schema $id: http://devicetree.org/schemas/sound/amlogic,axg-tdm-iface.yaml#
arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtb: audio-controller-2: clock-names:1: 'lrclk' was expected
from schema $id: http://devicetree.org/schemas/sound/amlogic,axg-tdm-iface.yaml#
arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtb: audio-controller-2: clock-names:2: 'mclk' was expected
from schema $id: http://devicetree.org/schemas/sound/amlogic,axg-tdm-iface.yaml#
Signed-off-by: Alexander Stein <alexander.stein@mailbox.org>
Link: https://lore.kernel.org/r/20230808161755.31594-1-alexander.stein@mailbox.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
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Add description of the Meson NAND controller node.
Signed-off-by: Arseniy Krasnov <avkrasnov@salutedevices.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20230828133647.3712644-1-avkrasnov@salutedevices.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
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Supported IPs: CPU, GIC, IRQ, Timer, UART, Reserved memory for secos,
OPTEE client, fixed regulators, UART for HCI, SPI NAND, SARADC, USB and
SDIO.
Signed-off-by: Dmitry Rokosov <ddrokosov@sberdevices.ru>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20230823213630.12936-15-ddrokosov@sberdevices.ru
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
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Add node for board info registers, which allows getting SoC family and
board revision.
For example, with MESON_GX_SOCINFO config enabled we can get the
following information for board with Meson A1 SoC:
soc soc0: Amlogic Meson A1 (A113L) Revision 2c:a (1:a) Detected
Signed-off-by: Alexey Romanov <avromanov@sberdevices.ru>
Signed-off-by: Dmitry Rokosov <ddrokosov@sberdevices.ru>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20230823213630.12936-14-ddrokosov@sberdevices.ru
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
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Add hardware number generator node. HWRNG access requires OTP power
domain being enabled.
Signed-off-by: Alexey Romanov <avromanov@sberdevices.ru>
Signed-off-by: Dmitry Rokosov <ddrokosov@sberdevices.ru>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20230823213630.12936-13-ddrokosov@sberdevices.ru
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
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Add saradc node to Amlogic Meson A1 SoC main dtsi. Saradc is
Successive Approximation Register (SAR) A/D Converter.
Signed-off-by: George Stark <GNStark@sberdevices.ru>
Signed-off-by: Dmitry Rokosov <ddrokosov@sberdevices.ru>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20230823213630.12936-12-ddrokosov@sberdevices.ru
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
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The definition is inspired by a similar one for AXG SoC family.
'sdio_pins' and 'sdio_clk_gate_pins' pinctrls are supposed to be used as
"default" and "clk-gate" in board-specific device trees.
During initialization 'meson-gx' driver sets clock to safe low-frequency
value (400kHz). However, both source clocks ("clkin0" and "clkin1") are
high-frequency by default, and using of eMMC's internal divider is not
enough to achieve so low values. To provide low-frequency source,
reparent "sd_emmc_sel2" clock using 'assigned-clocks' property.
Signed-off-by: Jan Dakinevich <yvdakinevich@sberdevices.ru>
Signed-off-by: Dmitry Rokosov <ddrokosov@sberdevices.ru>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20230823213630.12936-11-ddrokosov@sberdevices.ru
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
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The Amlogic A1 has a UART_AO port, which can be used, for example, for
BT HCI H4 connection.
This patch adds mux definitions for it.
Signed-off-by: Oleg Lyovin <ovlevin@sberdevices.ru>
Signed-off-by: Dmitry Rokosov <ddrokosov@sberdevices.ru>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20230823213630.12936-10-ddrokosov@sberdevices.ru
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
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This controller can be used for spinand flash connection.
Signed-off-by: Martin Kurbanov <mmkurbanov@sberdevices.ru>
Signed-off-by: Dmitry Rokosov <ddrokosov@sberdevices.ru>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20230823213630.12936-9-ddrokosov@sberdevices.ru
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
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EFUSE A1 controller uses CLKID_OTP clock and PWRC_OTP_ID power domain.
Signed-off-by: Alexey Romanov <avromanov@sberdevices.ru>
Signed-off-by: Dmitry Rokosov <ddrokosov@sberdevices.ru>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20230823213630.12936-8-ddrokosov@sberdevices.ru
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
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Amlogic A1 SoC family has USB2.0 controller based on dwc2 and dwc3
heads. It supports otg/host/peripheral modes.
Signed-off-by: Yue Wang <yue.wang@amlogic.com>
Signed-off-by: Hanjie Lin <hanjie.lin@amlogic.com>
Signed-off-by: Dmitry Rokosov <ddrokosov@sberdevices.ru>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20230823213630.12936-7-ddrokosov@sberdevices.ru
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
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This patch adds clkc and clkc_pll dts nodes to A1 SoC main dtsi. The
first one is responsible for all SoC peripherals clocks excluding audio
clocks. The second one is used by A1 SoC PLLs. Actually, there are two
different APB heads, so we have two different drivers.
Signed-off-by: Dmitry Rokosov <ddrokosov@sberdevices.ru>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20230823213630.12936-6-ddrokosov@sberdevices.ru
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
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It is recommended to maintain a sorted order of device tree entries, so
move the gpio_intc node ahead of the uart_AO node.
Fixes: ea254644a228 ("arm64: dts: meson-a1: add gpio_intc node")
Signed-off-by: Dmitry Rokosov <ddrokosov@sberdevices.ru>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20230823213630.12936-5-ddrokosov@sberdevices.ru
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
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In the file 'meson-a1.dtsi,' which is a basic device tree include, it is
not necessary to mark the node with 'status = "okay"' because it is
enabled by default.
Signed-off-by: Dmitry Rokosov <ddrokosov@sberdevices.ru>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20230823213630.12936-4-ddrokosov@sberdevices.ru
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
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There should be only one empty line between device tree node
definitions.
Signed-off-by: Dmitry Rokosov <ddrokosov@sberdevices.ru>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20230823213630.12936-3-ddrokosov@sberdevices.ru
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
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It is recommended to alphabetically sort all headers included in the
dtsi.
Signed-off-by: Dmitry Rokosov <ddrokosov@sberdevices.ru>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20230823213630.12936-2-ddrokosov@sberdevices.ru
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
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