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* arm64: dts: layerscape: Fix GICv3 ITS node namesRob Herring2023-03-131-1/+1
| | | | | | | | The GICv3 ITS is an MSI controller, therefore its node name should be 'msi-controller'. Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* arm64: dts: ls208xa: specify clock frequencies for the MDIO controllersIoana Ciornei2022-10-291-0/+6
| | | | | | | | | | | Up until now, the external MDIO controller frequency values relied either on the default ones out of reset or on those setup by u-boot. Let's just properly specify the MDC frequency in the DTS so that even without u-boot's intervention Linux can drive the MDIO bus. Fixes: 0420dde30a90 ("arm64: dts: ls208xa: add the external MDIO nodes") Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* arm64: dts: ls208x: remove NXP Erratum A008585 from LS2088A.Pankaj Bansal2022-09-171-2/+1
| | | | | | | | | | | | NXP Erratum A008585 affects A57 core cluster used in LS2085 rev1. However this problem has been fixed in A72 core cluster used in LS2088. Therefore remove the erratum from LS2088A. Keeping it only in LS2085. Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com> Reviewed-by: Sandeep Malik <sandeep.malik@nxp.com> Acked-by: Priyanka Jain <priyanka.jain@nxp.com> Signed-off-by: Li Yang <leoyang.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* arm64: dts: Add SFP node for TA 3.0 devicesSean Anderson2022-07-051-0/+8
| | | | | | | This adds an SFP node for Trust Architecture 3.0 devices. Signed-off-by: Sean Anderson <sean.anderson@seco.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* arm64: dts: fsl: adjust whitespace around '='Krzysztof Kozlowski2022-06-141-5/+5
| | | | | | | | | Fix whitespace coding style: use single space instead of tabs or multiple spaces around '=' sign in property assignment. No functional changes (same DTB). Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* arm64: dts: freescale: reduce the interrup-map-maskMichael Walle2022-05-051-1/+1
| | | | | | | | Reduce the interrupt-map-mask of the external interrupt controller to 0xf to align with the devicetree schema. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* arm64: dts: freescale: update ifc node name to be memory-controllerLi Yang2022-05-051-1/+1
| | | | | | | | | | | Update the node name to be align with updated DT binding. But be noted that u-boot for ls1088a used the ifc node name to disable ifc-nor node when the SoC is configured to use QSPI. The u-boot has been updated to use the latest name but the change could break compatibility with older u-boot for ls1088a. Signed-off-by: Li Yang <leoyang.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* arm64: dts: remove "simple-bus" compatible from ifc nodeLi Yang2022-05-051-1/+1
| | | | | | | | The binding of ifc device has been updated. Update dts to match accordingly. Signed-off-by: Li Yang <leoyang.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* Revert "arm64: dts: freescale: Fix 'interrupt-map' parent address cells"Vladimir Oltean2022-03-161-12/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 869f0ec048dc8fd88c0b2003373bd985795179fb. That updated the expected device tree binding format for the ls-extirq driver, without also updating the parsing code (ls_extirq_parse_map) to the new format. The context is that the ls-extirq driver uses the standard "interrupt-map" OF property in a non-standard way, as suggested by Rob Herring during review: https://lore.kernel.org/lkml/20190927161118.GA19333@bogus/ This has turned out to be problematic, as Marc Zyngier discovered through commit 041284181226 ("of/irq: Allow matching of an interrupt-map local to an interrupt controller"), later fixed through commit de4adddcbcc2 ("of/irq: Add a quirk for controllers with their own definition of interrupt-map"). Marc's position, expressed on multiple opportunities, is that: (a) [ making private use of the reserved "interrupt-map" name in a driver ] "is wrong, by the very letter of what an interrupt-map means. If the interrupt map points to an interrupt controller, that's the target for the interrupt." https://lore.kernel.org/lkml/87k0g8jlmg.wl-maz@kernel.org/ (b) [ updating the driver's bindings to accept a non-reserved name for this property, as an alternative, is ] "is totally pointless. These machines have been in the wild for years, and existing DTs will be there *forever*." https://lore.kernel.org/lkml/87ilvrk1r0.wl-maz@kernel.org/ Considering the above, the Linux kernel has quirks in place to deal with the ls-extirq's non-standard use of the "interrupt-map". These quirks may be needed in other operating systems that consume this device tree, yet this is seen as the only viable solution. Therefore, the premise of the patch being reverted here is invalid. It doesn't matter whether the driver, in its non-standard use of the property, complies to the standard format or not, since this property isn't expected to be used for interrupt translation by the core. This change restores LS1088A, LS2088A/LS2085A and LX2160A to their previous bindings, which allows these systems to continue to use external interrupt lines with the correct polarity. Fixes: 869f0ec048dc ("arm64: dts: freescale: Fix 'interrupt-map' parent address cells") Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Acked-by: Marc Zyngier <maz@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* arm64: dts: freescale: Fix 'interrupt-map' parent address cellsRob Herring2021-10-051-12/+12
| | | | | | | | | | | | | The 'interrupt-map' in several Layerscape SoCs is malformed. The '#address-cells' size of the parent interrupt controller (the GIC) is not accounted for. Cc: Shawn Guo <shawnguo@kernel.org> Cc: Li Yang <leoyang.li@nxp.com> Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: Rob Herring <robh@kernel.org> Acked-by: Li Yang <leoyang.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* arm64: dts: freescale: fix arm,sp805 compatible stringMichael Walle2021-09-221-8/+8
| | | | | | | | | | | According to Documentation/devicetree/bindings/watchdog/arm,sp805.yaml the compatible is: compatible = "arm,sp805", "arm,primecell"; The current compatible string doesn't exist at all. Fix it. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* arm64: dts: ls208xa: remove bus-num from dspi nodeMian Yousaf Kaukab2021-06-121-1/+0
| | | | | | | | | | | | | | | | | | | | | | On LS2088A-RDB board, if the spi-fsl-dspi driver is built as module then its probe fails with the following warning: [ 10.471363] couldn't get idr [ 10.471381] WARNING: CPU: 4 PID: 488 at drivers/spi/spi.c:2689 spi_register_controller+0x73c/0x8d0 ... [ 10.471651] fsl-dspi 2100000.spi: Problem registering DSPI ctlr [ 10.471708] fsl-dspi: probe of 2100000.spi failed with error -16 Reason for the failure is that bus-num property is set for dspi node. However, bus-num property is not set for the qspi node. If probe for spi-fsl-qspi happens first then id 0 is dynamically allocated to it. Call to spi_register_controller() from spi-fsl-dspi driver then fails. Since commit 29d2daf2c33c ("spi: spi-fsl-dspi: Make bus-num property optional") bus-num property is optional. Remove bus-num property from dspi node to fix the issue. Signed-off-by: Mian Yousaf Kaukab <ykaukab@suse.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* arm64: dts: ls208xa: use constants in the clockgen phandleMichael Walle2021-01-111-22/+63
| | | | | | | Now that we have constants, use them. This is just a mechanical change. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* arm64: dts: ls208xa: add DT node for external interrupt linesBiwen Li2021-01-051-1/+32
| | | | | | | Add device-tree node for external interrupt lines IRQ0-IRQ11. Signed-off-by: Biwen Li <biwen.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* Merge tag 'arm-soc-dt-5.11' of ↵Linus Torvalds2020-12-171-18/+260
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM device tree updates from Arnd Bergmann: "Across all platforms, there is a continued move towards DT schema for validating the dts files. As a result there are bug fixes for mistakes that are found using these schema, in addition to warnings from the dtc compiler. As usual, many changes are for adding support for additional on-chip and on-board components in the machines we already support. The newly supported SoCs for this release are: - MStar Infinity2M, a low-end IP camera chip based on a dual-core Cortex-A7, otherwise similar to the Infinity chip we already support. This is also known as the SigmaStar SSD202D, and we add support for the Honestar ssd201htv2 development kit. - Nuvoton NPCM730, a Cortex-A9 based Baseboard Management Controller (BMC), in the same family as the NPCM750. This gets used in the Ampere Altra based "Fii Kudo" server and the Quanta GSJ, both of which are added as well. - Broadcom BCM4908, a 64-bit home router chip based on Broadcom's own Brahma-B53 CPU. Support is also added for the Asus ROG Rapture GT-AC5300 high-end WiFi router based on this chip. - Mediatek MT8192 is a new SoC based on eight Cortex-A76/A55 cores, meant for faster Chromebooks and tablets. It gets added along with its reference design. - Mediatek MT6779 (Helio P90) is a high-end phone chip from last year's generation, also added along with its reference board. This one is still based on Cortex-A75/A55. - Mediatek MT8167 is a version of the already supported MT8516 chip, both based on Cortex-A35. It gets added along with the "Pumpkin" single board computer, but is likely to also make its way into low-end tablets in the future. For the already supported chips, there are a number of new boards. Interestingly there are more 32-bit machines added this time than 64-bit. Here is a brief list of the new boards: - Three new Mikrotik router variants based on Marvell Prestera 98DX3236, a close relative of the more common Armada XP - A reference board for the Marvell Armada 382 - Three new servers using ASpeed baseboard management controllers, the actual machines being from Bytedance, Facebook and IBM, and one machine using the Nuvoton NPCM750 BMC. - The Galaxy Note 10.1 (P4) tablet, using an Exynos 4412. - The usual set of 32-bit i.MX industrial/embedded hardware: * Protonic WD3 (tractor e-cockpit) * Kamstrup OMNIA Flex Concentrator (smart grid platform) * Van der Laan LANMCU (food storage) * Altesco I6P (vehicle inspection stations) * PHYTEC phyBOARD-Segin/phyCORE-i.MX6UL baseboard - DH electronics STM32MP157C DHCOM, a PicoITX carrier board for the aleady supported DHCOM module - Three new Allwinner SoC based single-board computers: * NanoPi R1 (H3 based) * FriendlyArm ZeroPi (H3 based) * Elimo Initium SBC (S3 based) - Ouya Game Console based on Nvidia Tegra 3 - Version 5 of the already supported Zynq Z-Turn MYIR Board - LX2162AQDS, a reference platform for NXP Layerscape LX2162A, which is a repackaged 16-core LX2160A - A series of Kontron i.MX8M Mini baseboard/SoM versions - Espressobin Ultra, a new variant of the popular Armada 3700 based board, - IEI Puzzle-M801, a rackmount network appliance based on Marvell Armada 8040 - Microsoft Lumia 950 XL, a phone - HDK855 and HDK865 Hardware development kits for Qualcomm sm8250 and sm8150, respectively - Three new board variants of the "Trogdor" Chromebook (sc7180) - New board variants of the Renesas based "Kingfisher" and "HiHope" reference boards - Kobol Helios64, an open source NAS appliance based on Rockchips RK3399 - Engicam PX30.Core, a SoM based on Rockchip PX30, along with a few carrier boards" * tag 'arm-soc-dt-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (679 commits) arm64: dts: sparx5: Add SGPIO devices arm64: dts: sparx5: Add reset support dt-bindings: gpio: Add a binding header for the MSC313 GPIO driver ARM: mstar: SMP support ARM: mstar: Wire up smpctrl for SSD201/SSD202D ARM: mstar: Add smp ctrl registers to infinity2m dtsi ARM: mstar: Add dts for Honestar ssd201htv2 ARM: mstar: Add chip level dtsi for SSD202D ARM: mstar: Add common dtsi for SSD201/SSD202D ARM: mstar: Add infinity2m support dt-bindings: mstar: Add Honestar SSD201_HT_V2 to mstar boards dt-bindings: vendor-prefixes: Add honestar vendor prefix dt-bindings: mstar: Add binding details for mstar,smpctrl ARM: mstar: Fill in GPIO controller properties for infinity ARM: mstar: Add gpio controller to MStar base dtsi ARM: zynq: Fix incorrect reference to XM013 instead of XM011 ARM: zynq: Convert at25 binding to new description on zc770-xm013 ARM: zynq: Fix OCM mapping to be aligned with binding on zc702 ARM: zynq: Fix leds subnode name for zc702/zybo-z7 ARM: zynq: Rename bus to be align with simple-bus yaml ...
| * arm64: dts: ls208xa: add PCS MDIO and PCS PHY nodesIoana Ciornei2020-11-301-16/+240
| | | | | | | | | | | | | | | | | | | | | | Add PCS MDIO nodes for the internal MDIO buses on the LS208x SoCs, along with their internal PCS PHYs which will be used when the DPMAC object is in TYPE_PHY mode. Also, rename the dpmac@x nodes to ethernet@x in order to be compliant with the naming convention used by ethernet controllers. Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| * arm64: dts: ls208xa: add the external MDIO nodesIoana Ciornei2020-11-301-0/+18
| | | | | | | | | | | | | | | | Add the external MDIO device nodes found in the WRIOP global memory region. This is needed for management of external PHYs. Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| * arm64: dts: layerscape: Harmonize DWC USB3 DT nodes nameSerge Semin2020-11-011-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | In accordance with the DWC USB3 bindings the corresponding node name is suppose to comply with the Generic USB HCD DT schema, which requires the USB nodes to have the name acceptable by the regexp: "^usb(@.*)?" . Make sure the "snps,dwc3"-compatible nodes are correctly named. Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* | arm64: dts: fsl: fix endianness issue of rcpmBiwen Li2020-10-301-0/+1
|/ | | | | | | | | | | | | Add little-endian property to RCPM node (for ls1028a,ls1088a,ls208xa), otherwise RCPM driver will program hardware with incorrect setting, causing system (such as LS1028ARDB) failed to be waked by wakeup source. Fixes: 791c88ca5713 (“arm64: dts: ls1028a: Add ftm_alarm0 DT node”) Fixes: f4fe3a8665495 (“arm64: dts: layerscape: add ftm_alarm0 node”) Signed-off-by: Biwen Li <biwen.li@nxp.com> Signed-off-by: Ran Wang <ran.wang_1@nxp.com> Acked-by: Li Yang <leoyang.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* arm64: dts: freescale: Fix SP805 clock-namesAndre Przywara2020-08-311-8/+8
| | | | | | | | | | | | The SP805 binding sets the order of the clock-names to be: "wdog_clk", "apb_pclk" (in exactly that order). Change the order in the DTs for Freescale platforms to match that. The two clocks given in all nodes are actually the same, so that does not change any behaviour. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* arm64: dts: ls208xa: add more thermal zone supportYuantian Tang2020-08-221-9/+132
| | | | | | | | | There are 7 thermal zones in ls208xa soc. Add the other thermal zone nodes to enable them. Signed-off-by: Yuantian Tang <andy.tang@nxp.com> Reviewed-by: Amit Kucheria <amitk@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* arm64: dts: layerscape: add ftm_alarm0 nodeBiwen Li2020-07-111-0/+14
| | | | | | | | | | The patch adds ftm_alarm0 DT node - add new rcpm node - add ftm_alarm0 node - aliases ftm_alarm0 as rtc1 Signed-off-by: Biwen Li <biwen.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* arm64: dts: layerscape: add iommu-map property to pci nodesHou Zhiqiang2020-03-111-0/+4
| | | | | | | | | Add the iommu-map property to the pci nodes so that the firmware fixes it up with the required values thus enabling iommu for devices connected over pci. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* arm64: dts: ls208xa: Update qspi node properties for LS2088ARDBKuldeep Singh2020-01-091-2/+2
| | | | | | | | | | | | | LS2088ADB has one spansion flash s25fs512s of size 64M. Add qspi dts entry for the board using compatibles as "jedec,spi-nor" to probe flash successfully. Also, align properties with other board dts properties. Use dt-bindings constants in interrupts instead of using numbers. Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* arm64: dts: ls208x: Remove non-compatible driver device from qspi nodeAshish Kumar2019-12-111-1/+1
| | | | | | | | | Since device properties are different, so remove fsl, ls1021a-qspi. ls1021a-qspi is to be used only for Big-endian verion of QSPI controller Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com> Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* Merge tag 'pci-v5.4-changes' of ↵Linus Torvalds2019-09-241-4/+0
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci Pull PCI updates from Bjorn Helgaas: "Enumeration: - Consolidate _HPP/_HPX stuff in pci-acpi.c and simplify it (Krzysztof Wilczynski) - Fix incorrect PCIe device types and remove dev->has_secondary_link to simplify code that deals with upstream/downstream ports (Mika Westerberg) - After suspend, restore Resizable BAR size bits correctly for 1MB BARs (Sumit Saxena) - Enable PCI_MSI_IRQ_DOMAIN support for RISC-V (Wesley Terpstra) Virtualization: - Add ACS quirks for iProc PAXB (Abhinav Ratna), Amazon Annapurna Labs (Ali Saidi) - Move sysfs SR-IOV functions to iov.c (Kelsey Skunberg) - Remove group write permissions from sysfs sriov_numvfs, sriov_drivers_autoprobe (Kelsey Skunberg) Hotplug: - Simplify pciehp indicator control (Denis Efremov) Peer-to-peer DMA: - Allow P2P DMA between root ports for whitelisted bridges (Logan Gunthorpe) - Whitelist some Intel host bridges for P2P DMA (Logan Gunthorpe) - DMA map P2P DMA requests that traverse host bridge (Logan Gunthorpe) Amazon Annapurna Labs host bridge driver: - Add DT binding and controller driver (Jonathan Chocron) Hyper-V host bridge driver: - Fix hv_pci_dev->pci_slot use-after-free (Dexuan Cui) - Fix PCI domain number collisions (Haiyang Zhang) - Use instance ID bytes 4 & 5 as PCI domain numbers (Haiyang Zhang) - Fix build errors on non-SYSFS config (Randy Dunlap) i.MX6 host bridge driver: - Limit DBI register length (Stefan Agner) Intel VMD host bridge driver: - Fix config addressing issues (Jon Derrick) Layerscape host bridge driver: - Add bar_fixed_64bit property to endpoint driver (Xiaowei Bao) - Add CONFIG_PCI_LAYERSCAPE_EP to build EP/RC drivers separately (Xiaowei Bao) Mediatek host bridge driver: - Add MT7629 controller support (Jianjun Wang) Mobiveil host bridge driver: - Fix CPU base address setup (Hou Zhiqiang) - Make "num-lanes" property optional (Hou Zhiqiang) Tegra host bridge driver: - Fix OF node reference leak (Nishka Dasgupta) - Disable MSI for root ports to work around design problem (Vidya Sagar) - Add Tegra194 DT binding and controller support (Vidya Sagar) - Add support for sideband pins and slot regulators (Vidya Sagar) - Add PIPE2UPHY support (Vidya Sagar) Misc: - Remove unused pci_block_cfg_access() et al (Kelsey Skunberg) - Unexport pci_bus_get(), etc (Kelsey Skunberg) - Hide PM, VC, link speed, ATS, ECRC, PTM constants and interfaces in the PCI core (Kelsey Skunberg) - Clean up sysfs DEVICE_ATTR() usage (Kelsey Skunberg) - Mark expected switch fall-through (Gustavo A. R. Silva) - Propagate errors for optional regulators and PHYs (Thierry Reding) - Fix kernel command line resource_alignment parameter issues (Logan Gunthorpe)" * tag 'pci-v5.4-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (112 commits) PCI: Add pci_irq_vector() and other stubs when !CONFIG_PCI arm64: tegra: Add PCIe slot supply information in p2972-0000 platform arm64: tegra: Add configuration for PCIe C5 sideband signals PCI: tegra: Add support to enable slot regulators PCI: tegra: Add support to configure sideband pins PCI: vmd: Fix shadow offsets to reflect spec changes PCI: vmd: Fix config addressing when using bus offsets PCI: dwc: Add validation that PCIe core is set to correct mode PCI: dwc: al: Add Amazon Annapurna Labs PCIe controller driver dt-bindings: PCI: Add Amazon's Annapurna Labs PCIe host bridge binding PCI: Add quirk to disable MSI-X support for Amazon's Annapurna Labs Root Port PCI/VPD: Prevent VPD access for Amazon's Annapurna Labs Root Port PCI: Add ACS quirk for Amazon Annapurna Labs root ports PCI: Add Amazon's Annapurna Labs vendor ID MAINTAINERS: Add PCI native host/endpoint controllers designated reviewer PCI: hv: Use bytes 4 and 5 from instance ID as the PCI domain numbers dt-bindings: PCI: tegra: Add PCIe slot supplies regulator entries dt-bindings: PCI: tegra: Add sideband pins configuration entries PCI: tegra: Add Tegra194 PCIe support PCI: Get rid of dev->has_secondary_link flag ...
| * arm64: dts: fsl: Remove num-lanes property from PCIe nodesHou Zhiqiang2019-08-221-4/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove the num-lanes property to avoid the driver setting the link width. On FSL Layerscape SoCs, the number of lanes assigned to PCIe controller is not fixed, it is determined by the selected SerDes protocol in the RCW (Reset Configuration Word). The PCIe link training is completed automatically through the selected SerDes protocol - the link width set-up is updated by hardware after power on reset, so the num-lanes property is not needed for Layerscape PCIe. The current num-lanes property was added erroneously, which actually indicates the maximum lanes the PCIe controller can support up to, instead of the lanes assigned to the PCIe controller. The link width set by SerDes protocol will be overridden by the num-lanes property, hence the subsequent re-training will fail when the assigned lanes do not match the value in the num-lanes property. Remove the property to fix the issue Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Andrew Murray <andrew.murray@arm.com>
* | arm64: dts: add the console node for DPAA2 platformsIoana Ciornei2019-08-031-0/+5
|/ | | | | | | | Add the console device tree node for the following DPAA2 based platforms: LS1088A, LS2080A, LS2088A and LX2160A. Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* arm64: dts: fsl: add ptp timer node for dpaa2 platformsYangbo Lu2019-06-151-0/+8
| | | | | | | | This patch is to add ptp timer device tree node for dpaa2 platforms(ls1088a/ls208xa/lx2160a). Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* arm64: dts: layerscape: Add incr-burst-type-adjustment property to USB3 nodeRan Wang2019-01-121-0/+2
| | | | | | | Add this property to all layerscape platforms to improve USB read write performance. Signed-off-by: Ran Wang <ran.wang_1@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* arm64: dts: layerscape: add num-viewport property for PCIe DT nodesHou Zhiqiang2019-01-111-0/+4
| | | | | | | | Add num-viewport property for PCIe DT nodes to specify how many viewports are implemented. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* arm64: dts: fsl: Add all CPUs in cooling mapsViresh Kumar2018-12-081-20/+8
| | | | | | | | | | | | | | | | | | | Each CPU can (and does) participate in cooling down the system but the DT only captures a handful of them, normally CPU0, in the cooling maps. Things work by chance currently as under normal circumstances its the first CPU of each cluster which is used by the operating systems to probe the cooling devices. But as soon as this CPU ordering changes and any other CPU is used to bring up the cooling device, we will start seeing failures. Also the DT is rather incomplete when we list only one CPU in the cooling maps, as the hardware doesn't have any such limitations. Update cooling maps to include all devices affected by individual trip points. Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* arm64: dts: layerscape: removed compatible string "snps,dw-pcie"Hou Zhiqiang2018-12-081-8/+4
| | | | | | | | Removed the wrong compatible string "snps,dw-pcie", in case match incorrect driver. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* arm64: dts: fsl: Add the status property disable PCIeBao Xiaowei2018-12-081-0/+4
| | | | | | | | Add the status property disable the PCIe, the property will be enable by bootloader. Signed-off-by: Bao Xiaowei <xiaowei.bao@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* Merge tag 'armsoc-dt' of ↵Linus Torvalds2018-10-291-2/+18
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC device tree updates from Arnd Bergmann: "There are close to 800 indivudal changesets in this branch again, which feels like a lot. There are particularly many changes for the NVIDIA Tegra platform this time, in fact more than it has seen in the two years since the v4.9 merge window. Aside from this, it's been fairly normal, with lots of changes going into Renesas R-CAR, NXP i.MX, Allwinner Sunxi, Samsung Exynos, and TI OMAP. Most of the changes are for adding new features into existing boards, for brevity I'm only mentioning completely new machines and SoCs here. For the first time I think we have (slightly) more new 64-bit hardware than 32-bit: Two boards get added for TI OMAP: Moxa UC-2101 is an industrial computer, see https://www.moxa.com/product/UC-2100.htm; GTA04A5 is a minor variation of the motherboards of the GTA04 phone, see https://shop.goldelico.com/wiki.php?page=GTA04A5 Clearfog is a nice little board for quad-core Marvell Armada 8040 network processor, see https://www.solid-run.com/marvell-armada-family/clearfog-gt-8k/ Two additional server boards come with the Aspeed baseboard management controllers: Stardragon4800 is an arm64 reference platform made by HXT (based on Qualcomm's server chips), and TiogaPass is an Open Compute mainboard with x86 CPUs. Both use the ARM11 based AST2500 chips in the BMC. NXP i.MX usually sees a lot of new boards each release. This time there we only add one minor variant: ConnectCore 6UL SBC Pro uses the same SoM design as the ConnectCore 6UL SBC Express added later. However, there is a new chip, the i.MX6ULZ, which is an even smaller variant of the i.MX6ULL, with features removed. There is also support for the reference board design, the i.MX6ULZ 14x14 EVK. A new Raspberry Pi variant gets added, this one is the CM3 compute module based on bcm2837, it was launched in early 2017 but only now added to the kernel, both as 32-bit and as 64-bit files, as we tend to do for Raspberry Pi. On the Allwinner side, everything is again about cheap development boards, usually of the "Fruit Pi" variety. The new ones this time are: - Orange Pi Zero Plus2: http://www.orangepi.org/OrangePiZeroPlus2/ - Orange Pi One Plus: http://www.orangepi.org/OrangePiOneplus/ - Pine64 LTS: https://www.pine64.org/?product=pine-a64-lts - Banana Pi M2+ H5: http://www.banana-pi.org/m2plus.html The last one of these is now a 64-bit version of the earlier Banana Pi M2+ H3, with the same board layout. Similarly, for Rockchips, get get another variant of the 32-bit Asus Tinker board, the model 'S' based on rk3288, and three now boards based on the popular RK3399 chip: - ROC-RK3399-PC: https://libre.computer/products/boards/roc-rk3399-pc/ - Rock960: https://www.96boards.org/product/rock960/ - RockPro64: https://www.pine64.org/?page_id=61454 These are all quite powerful boards with lots of RAM and I/O, and the RK3399 is the same chip used in several Chromebooks. Finally, we get support for the PX30 (aka rk3326) chip, which is based on the low-end 64-bit Cortex-A35 CPU core. So far, only the evaluation board is supported. One more Banana Pi is added with a Mediatek chip: Banana Pi R64 is based on the MT7622 WiFi router platform, and the first product I've seen with a 64-bit Mediatek chip in that market: http://www.banana-pi.org/r64.html For HiSilicon, we gain support for the Hi3670 SoC and HiKey 370 development board, which are similar to the Hi3660 and Hikey 360 respectively, but add support for an NPU. Amlogic gets initial support for the Meson-G12A chip (S905D2), another quad-core Cortex-A53 SoC, and its evaluation platform. On the 32-bit side, we gain support for an actual end-user product, the Endless Computers Endless Mini based on Meson8b (S805), see https://endlessos.com/computers/ Qualcomm adds support for their MSM8998 SoC and evaluation platform. This chip is commonly known as the Snapdragon 835, and is used in high-end phones as well as low-end laptops. For Renesas, a very bare support for the r8a774a1 (RZ/G2M) is added, but no boards for this one. However, we do add boards for the previously added r8a77965 (R-Car M3-N): the M3NULCB Kingfisher and the M3NULCB Starter Kit Pro. While we have lots of DT changes for NVIDIA to update the existing files, the only board that gets added is the Toradex Colibri T20 on Colibri Evaluation Board for the old Tegra2. Synaptics add support for their AS370 SoC, which is part of the (formerly Marvell) Berlin line of set-top-box chips used e.g. in the various Google Chromecast. Only the .dtsi gets added at this point, no actual machines" * tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (721 commits) ARM: dts: socfgpa: remove ethernet aliases from dtsi arm64: dts: stratix10: add ethernet aliases dt-bindings: mediatek: Add bindig for MT7623 IOMMU and SMI dt-bindings: mediatek: Add JPEG Decoder binding for MT7623 dt-bindings: iommu: mediatek: Add binding for MT7623 dt-bindings: clock: mediatek: add support for MT7623 ARM: dts: mvebu: armada-385-db-88f6820-amc: auto-detect nand ECC properites ARM: dts: da850-lego-ev3: slow down A/DC as much as possible ARM: dts: da850-evm: Enable tca6416 on baseboard arm64: dts: uniphier: Add USB2 PHY nodes arm64: dts: uniphier: Add USB3 controller nodes ARM: dts: uniphier: Add USB2 PHY nodes ARM: dts: uniphier: Add USB3 controller nodes arm64: dts: meson-axg: s400: disable emmc arm64: dts: meson-axg: s400: add missing emmc pwrseq arm64: dts: clearfog-gt-8k: add PCIe slot description ARM: dts: at91: sama5d4_xplained: even nand memory partitions ARM: dts: at91: sama5d3_xplained: even nand memory partitions ARM: dts: at91: at91sam9x5cm: even nand memory partitions ARM: dts: at91: sama5d2_ptc_ek: fix bootloader env offsets ...
| * arm64: dts: fsl: Fix I2C and SPI bus warningsRob Herring2018-09-261-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | dtc has new checks for I2C and SPI buses. Fix the SPI bus node names and warnings in unit-addresses. arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dtb: Warning (i2c_bus_reg): /soc/i2c@2180000/eeprom@57: I2C bus unit address format error, expected "53" arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dtb: Warning (i2c_bus_reg): /soc/i2c@2180000/eeprom@56: I2C bus unit address format error, expected "52" Cc: Shawn Guo <shawnguo@kernel.org> Cc: Li Yang <leoyang.li@nxp.com> Signed-off-by: Rob Herring <robh@kernel.org> Acked-by: Li Yang <leoyang.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| * arm64: dts: ls208xa: add second duartKurt Kanzenbach2018-09-031-0/+16
| | | | | | | | | | | | | | | | The NXP LS208xA SoCs have two dual uarts. Thus, add the second one. Signed-off-by: Kurt Kanzenbach <kurt@linutronix.de> Acked-by: Li Yang <leoyang.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* | arm64: dts: ls208xa: comply with the iommu map binding for fsl_mcNipun Gupta2018-09-251-1/+6
|/ | | | | | | | | fsl-mc bus support the new iommu-map property. Comply to this binding for fsl_mc bus. Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com> Reviewed-by: Laurentiu Tudor <laurentiu.tudor@nxp.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
* arm64: dts: freescale: Update to use SPDX identifiersLi Yang2018-06-191-37/+1
| | | | | | | | | | | | Replace license text with corresponding SPDX identifiers and update the format of existing SPDX identifiers to follow the new guideline Documentation/process/license-rules.rst. Note that some of the files mentioned X11 license previously but the license text actually matches MIT license. Signed-off-by: Li Yang <leoyang.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* arm64: dts: ls208xa: Move cpu_thermal out of bus nodeFabio Estevam2018-02-121-49/+49
| | | | | | | | | | | | | | Move cpu_thermal node from soc node to root node. cpu_thermal node does not have any register properties and thus shouldn't be placed on the bus. This fixes the following build warnings with W=1: arch/arm64/boot/dts/freescale/fsl-ls2080a-qds.dtb: Warning (simple_bus_reg): Node /soc/thermal-zones missing or empty reg/ranges property Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* arm64: dts: ls: Add optee nodeSumit Garg2017-09-221-0/+7
| | | | | | | | Add optee device tree node on ls1012a, ls1043a, ls1046a, ls1088a and ls208xa. Signed-off-by: Sumit Garg <sumit.garg@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* arm64: dts: ls208xa: add cpu idle supportYuantian Tang2017-08-141-0/+5
| | | | | | | | | ls208xa supports another cpu idle state which is pw20 which saves more power when cpu is idle. It was implemented through psci firmware. Signed-off-by: Tang Yuantian <andy.tang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* arm64: dts: freescale: ls208xa: add crypto nodeHoria Geantă2017-08-051-0/+41
| | | | | | | LS208xA has a SEC v5.1 security engine. Signed-off-by: Horia Geantă <horia.geanta@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* arm64: dts: freescale: ls208xa: share aliases nodeHoria Geantă2017-08-051-0/+5
| | | | | | | | aliases node is identical for all boards, thus move it to the common file ls208xa.dtsi. Signed-off-by: Horia Geantă <horia.geanta@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* arm64: dts: ls208xa: support SD UHS-I on RDB and eMMC HS200 on QDSYangbo Lu2017-05-151-1/+1
| | | | | | | | | This patch is to enable SD UHS-I mode on LS208xRDB and eMMC HS200 mode on LS208xQDS in dts. Also, the eSDHC peripheral clock must be used instead of platform clock to support these modes. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* arm64: dts: freescale: update the copyright claimsLi Yang2017-05-151-1/+2
| | | | | | | Update the copyright claims to comply with company policy. Signed-off-by: Li Yang <leoyang.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* arm64: dts: freescale: ls2080a: Split devicetree for code resuabilityAbhimanyu Saini2017-03-071-0/+737
LS2088A and LS2080A are similar SoCs with a few differences like ARM cores etc. Reorganize the LS2080A device tree to move the common nodes to: - fsl-ls208xa.dtsi - fsl-ls208xa-rdb.dtsi - fsl-ls208xa-qds.dtsi Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> Signed-off-by: Ashish Kumar <ashish.kumar@nxp.com> Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
generated by cgit v1.2.3 (git 2.39.1) at 2025-01-05 21:24:55 +0100