summaryrefslogtreecommitdiffstats
path: root/arch/arm64/boot/dts/hisilicon/hi6220.dtsi (follow)
Commit message (Collapse)AuthorAgeFilesLines
* arm64: dts: hisilicon: hi6220: correct tsensor unit addressesKrzysztof Kozlowski2024-04-191-1/+1
| | | | | | | | | Correct unit address to fix dtc W=1 warnings: hi6220.dtsi:855.31-862.5: Warning (simple_bus_reg): /soc/tsensor@0,f7030700: simple-bus unit address format error, expected "f7030700" Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
* arm64: dts: hisilicon: add missing space before {Krzysztof Kozlowski2023-07-201-1/+1
| | | | | | | Add missing whitespace between node name/label and opening {. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
* arm64: dts: hisilicon: minor whitespace cleanup around '='Krzysztof Kozlowski2023-07-201-11/+11
| | | | | | | | The DTS code coding style expects exactly one space before and after '=' sign. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
* Merge tag 'hisi-arm64-dt-for-6.5' of https://github.com/hisilicon/linux-hisi ↵Arnd Bergmann2023-06-091-3/+3
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | into soc/dt ARM64: DT: HiSilicon ARM64 DT updates for v6.5 - Clean up the pinctrl-single node names and correct the #size-cells of the pinctrl controller nodes * tag 'hisi-arm64-dt-for-6.5' of https://github.com/hisilicon/linux-hisi: arm64: dts: hisilicon: Unify pinctrl-single pin group nodes Link: https://lore.kernel.org/r/6482C916.1010507@hisilicon.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * arm64: dts: hisilicon: Unify pinctrl-single pin group nodesTony Lindgren2023-06-071-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | We want to unify the pinctrl-single pin group nodes to use naming "pins". Otherwise non-standad pin group names will add make dtbs checks errors when the pinctrl-single yaml binding gets merged. Let's also correct the pinctrl controller #size-cells to 0 while at it. Cc: Conor Dooley <conor+dt@kernel.org> Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org> Cc: Rob Herring <robh+dt@kernel.org> Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
* | arm64: dts: hisilicon: add missing cache propertiesKrzysztof Kozlowski2023-05-161-0/+2
|/ | | | | | | | | | As all level 2 and level 3 caches are unified, add required cache-unified properties to fix warnings like: hi3660-hikey960.dtb: l2-cache0: 'cache-unified' is a required property Link: https://lore.kernel.org/r/20230421223215.115666-1-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
* arm64: dts: Update cache properties for hisiliconPierre Gondois2022-11-151-0/+2
| | | | | | | | | | | | | The DeviceTree Specification v0.3 specifies that the cache node 'compatible' and 'cache-level' properties are 'required'. Cf. s3.8 Multi-level and Shared Cache Nodes The 'cache-unified' property should be present if one of the properties for unified cache is present ('cache-size', ...). Update the Device Trees accordingly. Signed-off-by: Pierre Gondois <pierre.gondois@arm.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
* arm64: dts: hisilicon: align operating-points table name with dtschemaKrzysztof Kozlowski2021-09-221-1/+1
| | | | | | | | | Align the name of operating-points node to dtschema to fix warnings like: cpu_opp_table: $nodename:0: 'cpu_opp_table' does not match '^opp-table(-[a-z0-9]+)?$' Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
* arm64: dts: hisilicon: fix arm,sp805 compatible stringMichael Walle2021-09-181-1/+1
| | | | | | | | | | | According to Documentation/devicetree/bindings/watchdog/arm,sp805.yaml the compatible is: compatible = "arm,sp805", "arm,primecell"; The current compatible string doesn't exist at all. Fix it. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
* arm64: dts: hisilicon: use the correct HiSilicon copyrightHao Fang2021-06-171-1/+1
| | | | | | | | | | s/Hisilicon/HiSilicon/. It should use capital S, according to the official website https://www.hisilicon.com/en. Signed-off-by: Hao Fang <fanghao11@huawei.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
* arm64: dts: hisilicon: normalize the node name of the module thermalZhen Lei2021-01-291-3/+3
| | | | | | | | | | 1. Change the node name of the thermal zone to match '^[a-zA-Z][a-zA-Z0-9\\-]{1,12}-thermal$', add suffix "-thermal". 2. Change the node name of the trip point to match '^[a-zA-Z][a-zA-Z0-9\\-_]{0,63}$', delete character "@". Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
* arm64: dts: hisilicon: place clock-names "bus" before "core"Zhen Lei2021-01-291-1/+1
| | | | | | | | | | | | | Look at the clock-names schema defined in arm,mali-utgard.yaml: clock-names: items: - const: bus - const: core The "bus" needs to be placed before the "core". Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
* arm64: dts: hisilicon: list all clocks required by spi-pl022.yamlZhen Lei2020-11-241-2/+2
| | | | | | | | | | | The arm,pl022 binding need to specify two clocks: "sspclk", "apb_pclk". But only "apb_pclk" is specified now. Because the driver preferentially matches the first clock. Otherwise, it matches the second clock instead of both clocks. So both of them use the same clock don't change the function. Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
* arm64: dts: hisilicon: Fix SP805 clocksAndre Przywara2020-09-141-2/+3
| | | | | | | | | | | | | | | The SP805 DT binding requires two clocks to be specified, but Hisilicon platform DTs currently only specify one clock. In practice, Linux would pick a clock named "apb_pclk" for the bus clock, and the Linux and U-Boot SP805 driver would use the first clock to derive the actual watchdog counter frequency. Since currently both are the very same clock, we can just double the clock reference, and add the correct clock-names, to match the binding. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
* arm64: dts: hisilicon: replace status value "ok" by "okay"Adrian Schmutzler2020-09-141-1/+1
| | | | | | | | | | While the DT parser recognizes "ok" as a valid value for the "status" property, it is actually mentioned nowhere. Use the proper value "okay" instead, as done in the majority of files already. Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
* arm64: dts: hisilicon: Align UART nodename with dtschemaKrzysztof Kozlowski2020-07-171-5/+5
| | | | | | | | Fix dtschema validator warnings like: uart@f8015000: $nodename:0: 'uart@f8015000' does not match '^serial(@[0-9a-f,]+)*$' Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
* arm64: dts: hisilicon: Add Mali-450 MP4 GPU DT entryPeter Griffin2019-10-261-0/+38
| | | | | | | | | | | | | hi6220 has a Mali450 MP4 so lets add it into the DT. Cc: Wei Xu <xuwei5@hisilicon.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: linux-arm-kernel@lists.infradead.org Cc: devicetree@vger.kernel.org Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Signed-off-by: John Stultz <john.stultz@linaro.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
* Merge tag 'hisi-arm64-dt-for-5.1v2' of git://github.com/hisilicon/linux-hisi ↵Arnd Bergmann2019-02-151-0/+2
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into arm/dt ARM64: DT: Hisilicon SoCs DT updates for 5.1 * Hi6220 SoC and related boards: - Add DMA entries to enable DMA for Bluetooth transfers - Add power-on delay to make wifi stable - Revert HS200 mode to avoid eMMC controller resets and block read failures * Hi3660 SoC and related boards: - Fix SD card detection via setting cd-gpios correctly * Hi3798 SoC and related boards: - Fix malformed SPDX license identifier * tag 'hisi-arm64-dt-for-5.1v2' of git://github.com/hisilicon/linux-hisi: arm64: dts: hikey: Revert "Enable HS200 mode on eMMC" arm64: dts: hikey: Give wifi some time after power-on arm64: dts: hi3798cv200: fix malformed SPDX license identifier arm64: dts: hikey960: fix SDcard detection arm64: dts: hikey: Add DMA entries for Bluetooth UART Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * arm64: dts: hikey: Add DMA entries for Bluetooth UARTJohn Stultz2019-01-311-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add dma0 references for bluetooth uart to enable dma for bt transfers. Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Cc: Ryan Grachek <ryan@edited.us> Cc: Wei Xu <xuwei5@hisilicon.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: linux-arm-kernel@lists.infradead.org Cc: devicetree@vger.kernel.org Signed-off-by: John Stultz <john.stultz@linaro.org> Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
* | arm64: dts: Remove inconsistent use of 'arm,armv8' compatible stringRob Herring2019-01-301-8/+8
|/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The 'arm,armv8' compatible string is only for software models. It adds little value otherwise and is inconsistently used as a fallback on some platforms. Remove it from those platforms. This fixes warnings generated by the DT schema. Reported-by: Michal Simek <michal.simek@xilinx.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Will Deacon <will.deacon@arm.com> Acked-by: Antoine Tenart <antoine.tenart@bootlin.com> Acked-by: Nishanth Menon <nm@ti.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Acked-by: Chanho Min <chanho.min@lge.com> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Gregory CLEMENT <gregory.clement@bootlin.com> Acked-by: Thierry Reding <treding@nvidia.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Simon Horman <horms+renesas@verge.net.au> Acked-by: Tero Kristo <t-kristo@ti.com> Acked-by: Wei Xu <xuwei5@hisilicon.com> Acked-by: Liviu Dudau <liviu.dudau@arm.com> Acked-by: Matthias Brugger <matthias.bgg@gmail.com> Acked-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Scott Branden <scott.branden@broadcom.com> Acked-by: Kevin Hilman <khilman@baylibre.com> Acked-by: Chunyan Zhang <zhang.lyra@gmail.com> Acked-by: Robert Richter <rrichter@cavium.com> Acked-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com> Acked-by: Dinh Nguyen <dinguyen@kernel.org> Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* ARM64: dts: hisilicon: Add all CPUs in cooling mapsViresh Kumar2018-11-291-1/+8
| | | | | | | | | | | | | | | | | | | Each CPU can (and does) participate in cooling down the system but the DT only captures a handful of them, normally CPU0, in the cooling maps. Things work by chance currently as under normal circumstances its the first CPU of each cluster which is used by the operating systems to probe the cooling devices. But as soon as this CPU ordering changes and any other CPU is used to bring up the cooling device, we will start seeing failures. Also the DT is rather incomplete when we list only one CPU in the cooling maps, as the hardware doesn't have any such limitations. Update cooling maps to include all devices affected by individual trip points. Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
* arm64: dts: hisilicon: Add missing clocks property for CPUsViresh Kumar2018-09-191-0/+7
| | | | | | | | | | | | | | The clocks property should either be present for all the CPUs of a cluster or none. If these are present only for a subset of CPUs of a cluster then things will start falling apart as soon as the CPUs are brought online in a different order. For example, this will happen because the operating system looks for such properties in the CPU node it is trying to bring up, so that it can register a cooling device. Add missing clocks property. Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
* arm64: dts: hisilicon: Add missing cooling device properties for CPUsViresh Kumar2018-07-171-1/+15
| | | | | | | | | | | | | | | | | The cooling device properties, like "#cooling-cells" and "dynamic-power-coefficient", should either be present for all the CPUs of a cluster or none. If these are present only for a subset of CPUs of a cluster then things will start falling apart as soon as the CPUs are brought online in a different order. For example, this will happen because the operating system looks for such properties in the CPU node it is trying to bring up, so that it can register a cooling device. Add such missing properties. Do minor rearrangement as well to keep ordering consistent. Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
* arm64: dts: hi6220: enable watchdogDmitry Shmidt2018-03-021-0/+8
| | | | | | | This patch is to add watchdog binding for Hi6220 on Hikey board. Signed-off-by: Dmitry Shmidt <dimitrysh@google.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
* ARM64: dts: hi6220: Remove "cooling-{min|max}-level" for CPU nodesViresh Kumar2018-03-021-2/+0
| | | | | | | | | | | | | | The "cooling-min-level" and "cooling-max-level" properties are not parsed by any part of the kernel currently and the max cooling state of a CPU cooling device is found by referring to the cpufreq table instead. Moreover, the entries are incorrect here as min level is 4 and the max level is 0. Remove the unused properties from the CPU nodes. Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
* Merge tag 'armsoc-dt' of ↵Linus Torvalds2017-11-171-0/+2
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM device-tree updates from Arnd Bergmann: "We add device tree files for a couple of additional SoCs in various areas: Allwinner R40/V40 for entertainment, Broadcom Hurricane 2 for networking, Amlogic A113D for audio, and Renesas R-Car V3M for automotive. As usual, lots of new boards get added based on those and other SoCs: - Actions S500 based CubieBoard6 single-board computer - Amlogic Meson-AXG A113D based development board - Amlogic S912 based Khadas VIM2 single-board computer - Amlogic S912 based Tronsmart Vega S96 set-top-box - Allwinner H5 based NanoPi NEO Plus2 single-board computer - Allwinner R40 based Banana Pi M2 Ultra and Berry single-board computers - Allwinner A83T based TBS A711 Tablet - Broadcom Hurricane 2 based Ubiquiti UniFi Switch 8 - Broadcom bcm47xx based Luxul XAP-1440/XAP-810/ABR-4500/XBR-4500 wireless access points and routers - NXP i.MX51 based Zodiac Inflight Innovations RDU1 board - NXP i.MX53 based GE Healthcare PPD biometric monitor - NXP i.MX6 based Pistachio single-board computer - NXP i.MX6 based Vining-2000 automotive diagnostic interface - NXP i.MX6 based Ka-Ro TX6 Computer-on-Module in additional variants - Qualcomm MSM8974 (Snapdragon 800) based Fairphone 2 phone - Qualcomm MSM8974pro (Snapdragon 801) based Sony Xperia Z2 Tablet - Realtek RTD1295 based set-top-boxes MeLE V9 and PROBOX2 AVA - Renesas R-Car V3M (R8A77970) SoC and "Eagle" reference board - Renesas H3ULCB and M3ULCB "Kingfisher" extension infotainment boards - Renasas r8a7745 based iWave G22D-SODIMM SoM - Rockchip rk3288 based Amarula Vyasa single-board computer - Samsung Exynos5800 based Odroid HC1 single-board computer For existing SoC support, there was a lot of ongoing work, as usual most of that concentrated on the Renesas, Rockchip, OMAP, i.MX, Amlogic and Allwinner platforms, but others were also active. Rob Herring and many others worked on reducing the number of issues that the latest version of 'dtc' now warns about. Unfortunately there is still a lot left to do. A rework of the ARM foundation model introduced several new files for common variations of the model" * tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (599 commits) arm64: dts: uniphier: route on-board device IRQ to GPIO controller for PXs3 dt-bindings: bus: Add documentation for the Technologic Systems NBUS arm64: dts: actions: s900-bubblegum-96: Add fake uart5 clock ARM: dts: owl-s500: Add CubieBoard6 dt-bindings: arm: actions: Add CubieBoard6 ARM: dts: owl-s500-guitar-bb-rev-b: Add fake uart3 clock ARM: dts: owl-s500: Set power domains for CPU2 and CPU3 arm: dts: mt7623: remove unused compatible string for pio node arm: dts: mt7623: update usb related nodes arm: dts: mt7623: update crypto node ARM: dts: sun8i: a711: Enable USB OTG ARM: dts: sun8i: a711: Add regulator support ARM: dts: sun8i: a83t: bananapi-m3: Enable AP6212 WiFi on mmc1 ARM: dts: sun8i: a83t: cubietruck-plus: Enable AP6330 WiFi on mmc1 ARM: dts: sun8i: a83t: Move mmc1 pinctrl setting to dtsi file ARM: dts: sun8i: a83t: allwinner-h8homlet-v2: Add AXP818 regulator nodes ARM: dts: sun8i: a83t: bananapi-m3: Add AXP813 regulator nodes ARM: dts: sun8i: a83t: cubietruck-plus: Add AXP818 regulator nodes ARM: dts: sunxi: Add dtsi for AXP81x PMIC arm64: dts: allwinner: H5: Restore EMAC changes ...
| * arm64: dts: hi6220: add coresight dt nodesLi Pengcheng2017-10-101-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For detailed coresight topology, Hi6220 has 8xCA53 CPUs and each CPU has one Embedded Trace Macrocell (ETM); the CPU trace data is output to the cluster funnel. Due system has another CPU and one MCU, all of them transfer the trace data through trace bus (ATB) to SoC funnel; the SoC funnel is connected to Embedded Trace FIFO (ETF) with 8KB buffer; an non-configurable replicator is used to output trace data for two sinks, one is Embedded Trace Route (ETR) so trace data can be saved into DRAM, another is Trace Port Interface Unit (TPIU) for capturing trace data by external debugger. According to the Hi6220 coresight topology, this patch is to add coresight dt nodes. Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Cc: Mike Leach <mike.leach@linaro.org> Cc: Guodong Xu <guodong.xu@linaro.org> Cc: Zhangfei Gao <zhangfei.gao@linaro.org> Cc: Haojian Zhuang <haojian.zhuang@linaro.org> Signed-off-by: Li Pengcheng <lipengcheng8@huawei.com> Signed-off-by: Li Zhong <lizhong11@hisilicon.com> Signed-off-by: Leo Yan <leo.yan@linaro.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
* | License cleanup: add SPDX GPL-2.0 license identifier to files with no licenseGreg Kroah-Hartman2017-11-021-0/+1
|/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Many source files in the tree are missing licensing information, which makes it harder for compliance tools to determine the correct license. By default all files without license information are under the default license of the kernel, which is GPL version 2. Update the files which contain no license information with the 'GPL-2.0' SPDX license identifier. The SPDX identifier is a legally binding shorthand, which can be used instead of the full boiler plate text. This patch is based on work done by Thomas Gleixner and Kate Stewart and Philippe Ombredanne. How this work was done: Patches were generated and checked against linux-4.14-rc6 for a subset of the use cases: - file had no licensing information it it. - file was a */uapi/* one with no licensing information in it, - file was a */uapi/* one with existing licensing information, Further patches will be generated in subsequent months to fix up cases where non-standard license headers were used, and references to license had to be inferred by heuristics based on keywords. The analysis to determine which SPDX License Identifier to be applied to a file was done in a spreadsheet of side by side results from of the output of two independent scanners (ScanCode & Windriver) producing SPDX tag:value files created by Philippe Ombredanne. Philippe prepared the base worksheet, and did an initial spot review of a few 1000 files. The 4.13 kernel was the starting point of the analysis with 60,537 files assessed. Kate Stewart did a file by file comparison of the scanner results in the spreadsheet to determine which SPDX license identifier(s) to be applied to the file. She confirmed any determination that was not immediately clear with lawyers working with the Linux Foundation. Criteria used to select files for SPDX license identifier tagging was: - Files considered eligible had to be source code files. - Make and config files were included as candidates if they contained >5 lines of source - File already had some variant of a license header in it (even if <5 lines). All documentation files were explicitly excluded. The following heuristics were used to determine which SPDX license identifiers to apply. - when both scanners couldn't find any license traces, file was considered to have no license information in it, and the top level COPYING file license applied. For non */uapi/* files that summary was: SPDX license identifier # files ---------------------------------------------------|------- GPL-2.0 11139 and resulted in the first patch in this series. If that file was a */uapi/* path one, it was "GPL-2.0 WITH Linux-syscall-note" otherwise it was "GPL-2.0". Results of that was: SPDX license identifier # files ---------------------------------------------------|------- GPL-2.0 WITH Linux-syscall-note 930 and resulted in the second patch in this series. - if a file had some form of licensing information in it, and was one of the */uapi/* ones, it was denoted with the Linux-syscall-note if any GPL family license was found in the file or had no licensing in it (per prior point). Results summary: SPDX license identifier # files ---------------------------------------------------|------ GPL-2.0 WITH Linux-syscall-note 270 GPL-2.0+ WITH Linux-syscall-note 169 ((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) 21 ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) 17 LGPL-2.1+ WITH Linux-syscall-note 15 GPL-1.0+ WITH Linux-syscall-note 14 ((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) 5 LGPL-2.0+ WITH Linux-syscall-note 4 LGPL-2.1 WITH Linux-syscall-note 3 ((GPL-2.0 WITH Linux-syscall-note) OR MIT) 3 ((GPL-2.0 WITH Linux-syscall-note) AND MIT) 1 and that resulted in the third patch in this series. - when the two scanners agreed on the detected license(s), that became the concluded license(s). - when there was disagreement between the two scanners (one detected a license but the other didn't, or they both detected different licenses) a manual inspection of the file occurred. - In most cases a manual inspection of the information in the file resulted in a clear resolution of the license that should apply (and which scanner probably needed to revisit its heuristics). - When it was not immediately clear, the license identifier was confirmed with lawyers working with the Linux Foundation. - If there was any question as to the appropriate license identifier, the file was flagged for further research and to be revisited later in time. In total, over 70 hours of logged manual review was done on the spreadsheet to determine the SPDX license identifiers to apply to the source files by Kate, Philippe, Thomas and, in some cases, confirmation by lawyers working with the Linux Foundation. Kate also obtained a third independent scan of the 4.13 code base from FOSSology, and compared selected files where the other two scanners disagreed against that SPDX file, to see if there was new insights. The Windriver scanner is based on an older version of FOSSology in part, so they are related. Thomas did random spot checks in about 500 files from the spreadsheets for the uapi headers and agreed with SPDX license identifier in the files he inspected. For the non-uapi files Thomas did random spot checks in about 15000 files. In initial set of patches against 4.14-rc6, 3 files were found to have copy/paste license identifier errors, and have been fixed to reflect the correct identifier. Additionally Philippe spent 10 hours this week doing a detailed manual inspection and review of the 12,461 patched files from the initial patch version early this week with: - a full scancode scan run, collecting the matched texts, detected license ids and scores - reviewing anything where there was a license detected (about 500+ files) to ensure that the applied SPDX license was correct - reviewing anything where there was no detection but the patch license was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied SPDX license was correct This produced a worksheet with 20 files needing minor correction. This worksheet was then exported into 3 different .csv files for the different types of files to be modified. These .csv files were then reviewed by Greg. Thomas wrote a script to parse the csv files and add the proper SPDX tag to the file, in the format that the file expected. This script was further refined by Greg based on the output to detect more types of files automatically and to distinguish between header and source .c files (which need different comment types.) Finally Greg ran the script using the .csv files to generate the patches. Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* arm64: dts: hi6220: improve g-tx-fifo-size setting for usb deviceShawn Guo2017-08-161-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current usb device g-tx-fifo-size setting in DT causes two problems for kernel driver. 1. On hi6220, there are 15 tx_fifo dedicated for all EPs except EP0, while DT only provides tx_fifo settings for 6 EPs. It results in the following annoying complaints from kernel. [ 4.451623] dwc2 f72c0000.usb: dwc2_check_param_tx_fifo_sizes: Invalid parameter g_tx_fifo_size[7]=0 [ 4.461303] dwc2 f72c0000.usb: dwc2_check_param_tx_fifo_sizes: Invalid parameter g_tx_fifo_size[8]=0 [ 4.470969] dwc2 f72c0000.usb: dwc2_check_param_tx_fifo_sizes: Invalid parameter g_tx_fifo_size[9]=0 [ 4.480632] dwc2 f72c0000.usb: dwc2_check_param_tx_fifo_sizes: Invalid parameter g_tx_fifo_size[10]=0 [ 4.490385] dwc2 f72c0000.usb: dwc2_check_param_tx_fifo_sizes: Invalid parameter g_tx_fifo_size[11]=0 [ 4.500140] dwc2 f72c0000.usb: dwc2_check_param_tx_fifo_sizes: Invalid parameter g_tx_fifo_size[12]=0 [ 4.509892] dwc2 f72c0000.usb: dwc2_check_param_tx_fifo_sizes: Invalid parameter g_tx_fifo_size[13]=0 [ 4.519646] dwc2 f72c0000.usb: dwc2_check_param_tx_fifo_sizes: Invalid parameter g_tx_fifo_size[14]=0 [ 4.529399] dwc2 f72c0000.usb: dwc2_check_param_tx_fifo_sizes: Invalid parameter g_tx_fifo_size[15]=0 [ 4.539244] dwc2 f72c0000.usb: EPs: 16, dedicated fifos, 1920 entries in SPRAM Besides of that, the total 1920 fifo entries isn't fully utilized. Endpoint Info Control block consumes 128 entries, g-rx-fifo-size is 512, and g-np-tx-fifo-size is 128. So the fifi entries available for tx_fifo is: 1920 - 128 - 512 - 128 = 1152. Considering that the minimal valid tx_fifo size for each EP is 16, it should be reasonable to allocate 1152 entries as: 128 x 8 + 16 x 7 = 1136 (only 16 entries unused). With this new setting, we can get more EPs to use while removing the above warning messages in the meantime. 2. Another consequence of above invalid g_tx_fifo_size parameter is that kernel driver will use values read from hardware register as the fall-back. The value is 2048 for each EP fifo. That's obviously invalid either, because even fifo entries for one EP exceeds the total entries 1920. That's why we see the following fat warning from function dwc2_hsotg_init_fifo(). The new g-tx-fifo-size settings help to remove the warning as well. [ 65.431634] dwc2 f72c0000.usb: Do port resume before switching to device mode [ 65.624176] insufficient fifo memory [ 65.624369] ------------[ cut here ]------------ [ 65.633633] WARNING: CPU: 0 PID: 5 at drivers/usb/dwc2/gadget.c:330 dwc2_hsotg_init_fifo+0x164/0x1ac [ 65.643808] CPU: 0 PID: 5 Comm: kworker/u16:0 Not tainted 4.13.0-rc1-00022-g50861cf9dc1b-dirty #81 [ 65.653769] Hardware name: HiKey Development Board (DT) [ 65.659624] Workqueue: dwc2 dwc2_conn_id_status_change [ 65.665377] task: ffffffc005f73400 task.stack: ffffffc005f98000 [ 65.671987] PC is at dwc2_hsotg_init_fifo+0x164/0x1ac [ 65.677633] LR is at dwc2_hsotg_init_fifo+0x164/0x1ac [ 65.683275] pc : [<ffffff8008638044>] lr : [<ffffff8008638044>] pstate: 600001c5 [ 65.691504] sp : ffffffc005f9bce0 [ 65.695218] x29: ffffffc005f9bce0 x28: ffffffc005f6ac00 [ 65.701172] x27: ffffffc005f73400 x26: 0000000008000580 [ 65.707124] x25: ffffff8008bb4af0 x24: ffffff8008d02b70 [ 65.713074] x23: 0000003fcc831084 x22: ffffffc0337cf0bc [ 65.719024] x21: 0000000000000580 x20: ffffffc0337cf018 [ 65.724976] x19: ffffffc0337cf098 x18: 0000000000000000 [ 65.730926] x17: 0000000000000000 x16: 0000000000000000 [ 65.736873] x15: 0000000000000000 x14: ffffff8008ca8900 [ 65.742825] x13: 0000004035299000 x12: 0000000034d5d91d [ 65.748775] x11: 0000000000000000 x10: 00000000000008d0 [ 65.754726] x9 : ffffffc005f9bce0 x8 : 00000000000001b5 [ 65.760674] x7 : 66696620746e6569 x6 : ffffff8008d60050 [ 65.766623] x5 : 0000000000000000 x4 : 0000000000000000 [ 65.772573] x3 : 0000000000000002 x2 : 0000000000000002 [ 65.778521] x1 : 0000000000000001 x0 : 0000000000000018 [ 65.784469] Call trace: [ 65.787236] Exception stack(0xffffffc005f9bb10 to 0xffffffc005f9bc40) [ 65.794420] bb00: ffffffc0337cf098 0000008000000000 [ 65.803145] bb20: ffffffc005f9bce0 ffffff8008638044 ffffff8008bb4af0 0000000008000580 [ 65.811870] bb40: ffffffc005f73400 ffffffc005f6ac00 0000000000000000 ffffff8008da2998 [ 65.820595] bb60: ffffffc005f9bce0 ffffffc005f9bce0 ffffffc005f9bca0 00000000ffffffc8 [ 65.829315] bb80: ffffffc005f9bbb0 ffffff80081046a0 ffffffc005f9bce0 ffffffc005f9bce0 [ 65.838038] bba0: ffffffc005f9bca0 00000000ffffffc8 0000000000000018 0000000000000001 [ 65.846761] bbc0: 0000000000000002 0000000000000002 0000000000000000 0000000000000000 [ 65.855485] bbe0: ffffff8008d60050 66696620746e6569 00000000000001b5 ffffffc005f9bce0 [ 65.864207] bc00: 00000000000008d0 0000000000000000 0000000034d5d91d 0000004035299000 [ 65.872928] bc20: ffffff8008ca8900 0000000000000000 0000000000000000 0000000000000000 [ 65.900856] [<ffffff8008638044>] dwc2_hsotg_init_fifo+0x164/0x1ac [ 65.927195] [<ffffff800863b390>] dwc2_hsotg_core_init_disconnected+0x80/0x3c0 [ 65.954736] [<ffffff800862fef0>] dwc2_conn_id_status_change+0xfc/0x21c [ 65.981561] [<ffffff80080d1ca8>] process_one_work+0x124/0x294 [ 66.007419] [<ffffff80080d1e70>] worker_thread+0x58/0x3c8 [ 66.023243] [<ffffff80080d79a0>] kthread+0x100/0x12c [ 66.032455] [<ffffff8008082ec0>] ret_from_fork+0x10/0x50 [ 66.041987] ---[ end trace 7079dcaa2d9e46fa ]--- Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Tested-by: John Stultz <john.stultz@linaro.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
* arm64: dts: hi6220: add acpu_sctrlZhangfei Gao2017-08-161-0/+6
| | | | | | | | Add acpu_sctrl clock node Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org> Signed-off-by: Li Pengcheng <lipengcheng8@huawei.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
* Merge tag 'armsoc-dt64' of ↵Linus Torvalds2017-07-041-0/+26
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM 64-bit DT updates from Arnd Bergmann: "Device-tree updates for arm64 platforms. For the first time I can remember, this is actually larger than the corresponding branch for 32-bit platforms overall, though that has more individual changes. A significant portion this time is due to added machine support: - Initial support for the Realtek RTD1295 SoC, along with the Zidoo X9S set-top-box - Initial support for Actions Semi S900 and the Bubblegum-96 single-board-cёmputer. - Rockchips support for the rk3399-Firefly single-board-computer gets added, this one stands out for being relatively fast, affordable and well₋supported, compared to many boards that only fall into one or two of the above categories. - Mediatek gains support for the mt6797 mobile-phone SoC platform and corresponding evaluation board. - Amlogic board support gets added for the NanoPi K2 and S905x LibreTech CC single-board computers and the R-Box Pro set-top-box - Allwinner board support gets added for the OrangePi Win, Orangepi Zero Plus 2, NanoPi NEO2 and Orange Pi Prime single board computers and the SoPine system-on-module. - Renesas board support for Salvator-XS and H3ULCB automotive development systems. - Socionext Uniphier board support for LD11-global and LD20-global, whatever those may be. - Broadcom adds support for the new Stingray communication processor in its iProc family, along with two reference boards. Other updates include: - For the hisicon platform, support for Hi3660-Hikey960 gets extended significantly. - Lots of smaller updates for Renesas, Amlogic, Rockchip, UniPhier, Broadcom, Allwinner, Hisilicon, Qualcomm, Marvell, and NXP" * tag 'armsoc-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (243 commits) ARM64: dts: marvell: armada37xx: Fix timer interrupt specifiers Revert "arm64: dts: marvell: add dma-mask in crypto nodes for 7k/8k" arm64: dts: mediatek: don't include missing file ARM64: dts: meson-gxl: Add Libre Technology CC support dt-bindings: arm: amlogic: Add Libre Technology CC board dt-bindings: add Libre Technology vendor prefix arm64: dts: marvell: enable GICP and ICU on Armada 7K/8K arm64: dts: zte: Use - instead of @ for DT OPP entries arm64: dts: marvell: add gpio support for Armada 7K/8K arm64: dts: marvell: add pinctrl support for Armada 7K/8K arm64: dts: marvell: use new binding for the system controller on cp110 arm64: dts: marvell: remove *-clock-output-names on cp110 arm64: dts: marvell: use new bindings for xor clocks on ap806 arm64: dts: marvell: mcbin: enable the mdio node arm64: dts: Add Actions Semi S900 and Bubblegum-96 dt-bindings: Add vendor prefix for uCRobotics arm64: dts: marvell: add xmdio nodes for 7k/8k arm64: dts: marvell: add a comment on the cp110 slave node status arm64: dts: marvell: remove cpm crypto nodes from dts files arm64: dts: marvell: cp110: enable the crypto engine at the SoC level ...
| * Merge tag 'hisi-arm64-dt-for-4.13-v2' of ↵Olof Johansson2017-06-191-0/+26
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://github.com/hisilicon/linux-hisi into next/dt64 ARM64: DT: Hisilicon SoC DT updates for 4.13 - Add and update Hi3660-Hikey960 board, Hi3660 PCIe RC, Hi6421v530 MFD and Hi3660 MMC binding - Add and refine devices support for Hi3660-Hikey 960 including clock, reset, I2C, GPIO, UART, Bluetooth, RTC, Power Key, LED, SPI, timer, PMIC, regulator, sd/sdio and WiFi - Add k3-dma and i2s/hdmi audio support based on audio-card-graph method for Hikey board * tag 'hisi-arm64-dt-for-4.13-v2' of git://github.com/hisilicon/linux-hisi: (21 commits) arm64: dts: hi6220: Add k3-dma and i2s/hdmi audio support arm64: dts: hi3660-hikey960: add nodes for WiFi arm64: dts: hi3660: add sd/sdio device nodes dt-bindings: mmc: dw_mmc-k3: add document of hi3660 mmc arm64: dts: hikey960: add device node for pmic and regulators dt-bindings: mfd: hi6421: Add hi6421v530 compatible string arm64: dts: hisi: add kirin pcie node dt-bindings: PCI: hisi: Add document for PCIe of Kirin SoCs arm64: dts: hi3660: add sp804 timer node arm64: dts: hi3660: add spi device nodes arm64: dts: hikey960: add LED nodes arm64: dts: hi3660: add power key dts node arm64: dts: hi3660: Add pl031 rtc node arm64: dts: hikey960: add WL1837 Bluetooth device node arm64: dts: hi3660: Add uarts nodes arm64: dts: hi3660: add gpio dtsi file for Hisilicon Hi3660 SOC arm64: dts: Add I2C nodes for Hi3660 arm64: dts: hi3660: add resources for clock and reset arm64: dts: hikey960: pinctrl: add more pinmux and pinconfig arm64: dts: hisilicon: update compatible string for hikey960 ... Signed-off-by: Olof Johansson <olof@lixom.net>
| | * arm64: dts: hi6220: Add k3-dma and i2s/hdmi audio supportJohn Stultz2017-06-161-0/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add entry for k3-dma driver and i2s/hdmi audio devices. This enables HDMI audio output. Cc: Zhangfei Gao <zhangfei.gao@linaro.org> Cc: Liam Girdwood <lgirdwood@gmail.com> Cc: Mark Brown <broonie@kernel.org> Cc: Jaroslav Kysela <perex@perex.cz> Cc: Takashi Iwai <tiwai@suse.com> Cc: Wei Xu <xuwei5@hisilicon.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Andy Green <andy@warmcat.com> Cc: Dave Long <dave.long@linaro.org> Cc: Guodong Xu <guodong.xu@linaro.org> Cc: Antonio Borneo <borneo.antonio@gmail.com> Cc: Olof Johansson <olof@lixom.net> Cc: Arnd Bergmann <arnd@arndb.de> Signed-off-by: John Stultz <john.stultz@linaro.org> v2: * Split core i2s entry into dtsi and hdmi specific bits into hikey dts v4: * Rework simple-card to use many-dai-links method, as there may be other links in the future v5: * Rework audio description to use the audio-card-graph method as requested by Mark. Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
* | | Merge 4.12-rc5 into char-misc-nextGreg Kroah-Hartman2017-06-121-30/+1
|\| | | | | | | | | | | | | | | | | We want the char/misc driver fixes in here as well. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
| * | arm64: dts: hi6220: Move board data from the dwmmc nodes to hikey dtsUlf Hansson2017-05-231-19/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move the board specific descriptions for the dwmmc nodes in the hi6220 SoC dtsi, into the hikey dts as it's there these belongs. While changing this, let's take the opportunity to drop the use of the "ti,non-removable" binding for one of the dwmmc device nodes, as it's not a valid binding and not used. Drop also the unnecessary use of "num-slots = <0x1>" for all of the dwmmc nodes, as there is no need to set this since when default number of slots is one. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Acked-by: Arnd Bergmann <arnd@arndb.de>
| * | arm64: dts: hi6220: Move the fixed_5v_hub regulator to the hikey dtsUlf Hansson2017-05-231-11/+1
| |/ | | | | | | | | | | | | | | | | | | The regulator is a part of the hikey board, therefore let's move it from the hi6220 SoC dtsi file into the hikey dts file . Let's also rename the regulator according to the datasheet (5V_HUB) to better reflect the HW. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Acked-by: Arnd Bergmann <arnd@arndb.de>
* / arm64: dts: hi6220: register debug moduleLeo Yan2017-06-091-0/+64
|/ | | | | | | | | Bind debug module driver for Hi6220. Signed-off-by: Leo Yan <leo.yan@linaro.org> Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org> Acked-by: Wei Xu <xuwei5@hisilicon.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* arm64: dts: hi6220: Reset the mmc hostsDaniel Lezcano2017-04-061-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The MMC hosts could be left in an unconsistent or uninitialized state from the firmware. Instead of assuming, the firmware did the right things, let's reset the host controllers. This change fixes a bug when the mmc2/sdio is initialized leading to a hung task: [ 242.704294] INFO: task kworker/7:1:675 blocked for more than 120 seconds. [ 242.711129] Not tainted 4.9.0-rc8-00017-gcf0251f #3 [ 242.716571] "echo 0 > /proc/sys/kernel/hung_task_timeout_secs" disables this message. [ 242.724435] kworker/7:1 D 0 675 2 0x00000000 [ 242.729973] Workqueue: events_freezable mmc_rescan [ 242.734796] Call trace: [ 242.737269] [<ffff00000808611c>] __switch_to+0xa8/0xb4 [ 242.742437] [<ffff000008d07c04>] __schedule+0x1c0/0x67c [ 242.747689] [<ffff000008d08254>] schedule+0x40/0xa0 [ 242.752594] [<ffff000008d0b284>] schedule_timeout+0x1c4/0x35c [ 242.758366] [<ffff000008d08e38>] wait_for_common+0xd0/0x15c [ 242.763964] [<ffff000008d09008>] wait_for_completion+0x28/0x34 [ 242.769825] [<ffff000008a1a9f4>] mmc_wait_for_req_done+0x40/0x124 [ 242.775949] [<ffff000008a1ab98>] mmc_wait_for_req+0xc0/0xf8 [ 242.781549] [<ffff000008a1ac3c>] mmc_wait_for_cmd+0x6c/0x84 [ 242.787149] [<ffff000008a26610>] mmc_io_rw_direct_host+0x9c/0x114 [ 242.793270] [<ffff000008a26aa0>] sdio_reset+0x34/0x7c [ 242.798347] [<ffff000008a1d46c>] mmc_rescan+0x2fc/0x360 [ ... ] Cc: stable@vger.kernel.org Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
* Merge tag 'armsoc-dt' of ↵Linus Torvalds2016-12-161-0/+3
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM DT updates from Arnd Bergmann: "Lots of changes as usual, so I'm trying to be brief here. Most of the new hardware support has the respective driver changes merged through other trees or has had it available for a while, so this is where things come together. We get a DT descriptions for a couple of new SoCs, all of them variants of other chips we already support, and usually coming with a new evaluation board: - Oxford semiconductor (now Broadcom) OX820 SoC for NAS devices - Qualcomm MDM9615 LTE baseband - NXP imx6ull, the latest and smallest i.MX6 application processor variant - Renesas RZ/G (r8a7743 and r8a7745) application processors - Rockchip PX3, a variant of the rk3188 chip used in Android tablets - Rockchip rk1108 single-core application processor - ST stm32f746 Cortex-M7 based microcontroller - TI DRA71x automotive processors These are commercially available consumer platforms we now support: - Motorola Droid 4 (xt894) mobile phone - Rikomagic MK808 Android TV stick based on Rockchips rx3066 - Cloud Engines PogoPlug v3 based on OX820 - Various Broadcom based wireless devices: - Netgear R8500 router - Tenda AC9 router - TP-LINK Archer C9 V1 - Luxul XAP-1510 Access point - Turris Omnia open hardware router based on Armada 385 And a couple of new boards targeted at developers, makers or industrial integration: - Macnica Sodia development platform for Altera socfpga (Cyclone V) - MicroZed board based on Xilinx Zynq FPGA platforms - TOPEET itop/elite based on exynos4412 - WP8548 MangOH Open Hardware platform for IOT, based on Qualcomm MDM9615 - NextThing CHIP Pro gadget - NanoPi M1 development board - AM571x-IDK industrial board based on TI AM5718 - i.MX6SX UDOO Neo - Boundary Devices Nitrogen6_SOM2 (i.MX6) - Engicam i.CoreM6 - Grinn i.MX6UL liteSOM/liteBoard - Toradex Colibri iMX6 module Other changes: - added peripherals on renesas, davinci, stm32f429, uniphier, sti, mediatek, integrator, at91, imx, vybrid, ls1021a, omap, qualcomm, mvebu, allwinner, broadcom, exynos, zynq - Continued fixes for W=1 dtc warnings - The old STiH415/416 SoC support gets removed, these never made it into products and have served their purpose in the kernel as a template for teh newer chips from ST - The exynos4415 dtsi file is removed as nothing uses it. - Intel PXA25x can now be booted using devicetree" * tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (422 commits) arm: dts: zynq: Add MicroZed board support ARM: dts: da850: enable high speed for mmc ARM: dts: da850: Add node for pullup/pulldown pinconf ARM: dts: da850: enable memctrl and mstpri nodes per board ARM: dts: da850-lcdk: Add ethernet0 alias to DT ARM: dts: artpec: add pcie support ARM: dts: add support for Turris Omnia devicetree: Add vendor prefix for CZ.NIC ARM: dts: berlin2q-marvell-dmp: fix typo in chosen node ARM: dts: berlin2q-marvell-dmp: fix regulators' name ARM: dts: Add xo to sdhc clock node on qcom platforms ARM: dts: r8a7794: Add device node for PRR ARM: dts: r8a7793: Add device node for PRR ARM: dts: r8a7792: Add device node for PRR ARM: dts: r8a7791: Add device node for PRR ARM: dts: r8a7790: Add device node for PRR ARM: dts: r8a7779: Add device node for PRR ARM: dts: r8a73a4: Add device node for PRR ARM: dts: sk-rzg1e: add Ether support ARM: dts: sk-rzg1e: initial device tree ...
| * ARM: dts: Add #pinctrl-cells for pinctrl-single instancesTony Lindgren2016-11-071-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | Drivers using pinctrl-single,pins have #pinctrl-cells = <1>, while pinctrl-single,bits need #pinctrl-cells = <2>. Note that this patch can be optionally applied separately from the driver changes as the driver supports also the legacy binding without #pinctrl-cells. Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
* | usb: dwc2: Deprecate g-use-dma bindingJohn Youn2016-11-181-1/+0
|/ | | | | | | | | This is not needed as the gadget now fully supports DMA and it can autodetect it. This was initially added because gadget DMA mode was only partially implemented so could not be automatically enabled. Signed-off-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
* arm64: dts: hi6220: add sd-uhs- properties into dwmmc_1Guodong Xu2016-09-021-0/+3
| | | | | | | | | | | | | | | | | | | | | With these properties added, sd cards inserted into hikey can work at UHS mode if they have such capability. Note, this depends on HiKey UHS-SD support patch [1] to work properly. If you didn't add this patch, but added sd-uhs- properties into dwmmc_1, then sd cards cannot work. As of this post, patch [1] has been integrated into maintainer's next branch [2]. [1]: [V4] mmc: dw_mmc-k3: UHS-SD card for Hisilicon Hikey, https://patchwork.kernel.org/patch/9262515/ [2]: https://git.linaro.org/people/ulf.hansson/mmc.git next commit a8a5b2909cfc ("mmc: dw_mmc: k3: UHS-SD card for Hisilicon Hikey") cc: Ulf Hansson <ulf.hansson@linaro.org> cc: Jaehoon Chung <jh80.chung@samsung.com> cc: Jinguojun <kid.jin@hisilicon.com> Signed-off-by: Guodong Xu <guodong.xu@linaro.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
* arm64: dts: hi6220: add resets property into dwmmc nodesGuodong Xu2016-08-301-0/+3
| | | | | | | | | | | | | | | Add resets property into dwmmc_0, dwmmc_1 and dwmmc_2 for hi6220 Code and documentation to this property were confirmed by maintainers. See: [1] https://patchwork.kernel.org/patch/9276607/ [2] https://patchwork.kernel.org/patch/8487151/ [3] https://lkml.org/lkml/2016/8/12/91 cc: Jaehoon Chung <jh80.chung@samsung.com> cc: Rob Herring <robh+dt@kernel.org> Signed-off-by: Guodong Xu <guodong.xu@linaro.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
* arm64: dts: Add display subsystem DT nodes for hi6220-hikeyXinliang Liu2016-08-241-0/+55
| | | | | | | | | | | | | | | | Add ade and dsi DT nodes for hikey board. Cc: Guodong Xu <guodong.xu@linaro.org> Cc: Wei Xu <xuwei5@hisilicon.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Will Deacon <will.deacon@arm.com> Cc: linux-arm-kernel@lists.infradead.org Cc: devicetree@vger.kernel.org Signed-off-by: Xinliang Liu <xinliang.liu@linaro.org> Signed-off-by: John Stultz <john.stultz@linaro.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
* Merge tag 'armsoc-dt64' of ↵Linus Torvalds2016-08-021-0/+16
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull 64-bit ARM DT updates from Olof Johansson: "Just as the 32-bit contents, the 64-bit device tree branch also contains a number of additions this release cycle. New platforms: - LG LG1313 - Mediatek MT6755 - Renesas r8a7796 - Broadcom 2837 Other platforms with larger updates are: - Nvidia X1 platforms (USB 3.0, regulators, display subsystem) - Mediatek MT8173 (display subsystem added) - Rockchip RK3399 (a lot of new peripherals) - ARM Juno reference implementation (SCPI power domains, coresight, thermal)" * tag 'armsoc-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (118 commits) arm64: tegra: Enable HDMI on Jetson TX1 arm64: tegra: Add sor1_src clock arm64: tegra: Add XUSB powergates on Tegra210 arm64: tegra: Add DPAUX pinctrl bindings arm64: tegra: Add ACONNECT bus node for Tegra210 arm64: tegra: Add audio powergate node for Tegra210 arm64: tegra: Add regulators for Tegra210 Smaug arm64: tegra: Correct Tegra210 XUSB mailbox interrupt arm64: tegra: Enable XUSB controller on Jetson TX1 arm64: tegra: Enable debug serial on Jetson TX1 arm64: tegra: Add Tegra210 XUSB controller arm64: tegra: Add Tegra210 XUSB pad controller arm64: tegra: Add DSI panel on Jetson TX1 arm64: tegra: p2597: Add SDMMC power supplies arm64: tegra: Add PMIC support on Jetson TX1 Revert "ARM64: DTS: meson-gxbb: switch ethernet to real clock" arm64: dts: hi6220: Add pl031 RTC support arm64: dts: r8a7796/salvator-x: Enable watchdog timer arm64: dts: r8a7796: Add RWDT node arm64: dts: r8a7796: Use SYSC "always-on" PM Domain ...
| * arm64: dts: hi6220: Add pl031 RTC supportZhangfei Gao2016-07-071-0/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add pl031 rtc0 and rtc1 support to hi6220 dtsi Cc: Michael Turquette <mturquette@baylibre.com> Cc: Stephen Boyd <sboyd@codeaurora.org> Cc: Rob Herring <robh+dt@kernel.org> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Wei Xu <xuwei5@hisilicon.com> Cc: Guodong Xu <guodong.xu@linaro.org> Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org> [jstultz: Forward ported and tweaked commit description, added rtc1 entry as suggested by Guodong] Signed-off-by: John Stultz <john.stultz@linaro.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
* | arm64: dts: hi6220: Add media subsystem reset dtsXinliang Liu2016-06-291-0/+2
|/ | | | | | | | Add media subsystem reset dts support. Signed-off-by: Chen Feng <puck.chen@hisilicon.com> Signed-off-by: Xinliang Liu <xinliang.liu@linaro.org> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* arm64: dts: Add L2 cache topology to Hi6220Leo Yan2016-04-151-0/+16
| | | | | | | | This patch adds the L2 cache topology on Hi6220. Hi6220 has two clusters, every cluster has 512KiB L2 cache (32KiB x 16 ways). Signed-off-by: Leo Yan <leo.yan@linaro.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
* arm64: dts: register Hi6220's thermal zone for power allocatorLeo Yan2016-04-151-0/+35
| | | | | | | | | | | | With profiling Hi6220's power modeling so get dynamic coefficient and sustainable power. So pass these parameters from DT. Now enable power allocator with only one actor for CPU part, so directly use cluster0's thermal sensor for monitoring temperature. Reviewed-by: Javi Merino <javi.merino@arm.com> Signed-off-by: Leo Yan <leo.yan@linaro.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
* arm64: dts: register Hi6220's thermal sensorLeo Yan2016-04-151-0/+9
| | | | | | | Bind thermal sensor driver for Hi6220. Signed-off-by: Leo Yan <leo.yan@linaro.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-27 09:55:20 +0100