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path: root/arch/arm64/boot/dts/qcom/sa8775p.dtsi (follow)
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* arm64: dts: qcom: sa8775p: Add new memory map updates to SA8775PNinad Naik2024-02-061-9/+94
* arm64: dts: qcom: sa8775p: enable safety IRQSuraj Jaiswal2024-01-281-4/+6
* arm64: dts: qcom: Fix hs_phy_irq for non-QUSB2 targetsKrishna Kurapati2024-01-271-0/+6
* arm64: dts: qcom: sa8775p: Add missing space between node name and bracesManivannan Sadhasivam2023-12-161-2/+2
* arm64: dts: qcom: Use "pcie" as the node name instead of "pci"Manivannan Sadhasivam2023-12-161-2/+2
* arm64: dts: qcom: sa8775p: fix USB wakeup interrupt typesJohan Hovold2023-12-071-6/+6
* arm64: dts: qcom: sa8775p: Make watchdog bark interrupt edge triggeredDouglas Anderson2023-12-031-1/+1
* arm64: dts: qcom: Enable tsens and thermal for sa8775p SoCPriyansh Jain2023-10-161-0/+1096
* arm64: dts: qcom: sa8775p: Add RPMh sleep statsRaghavendra Kakarla2023-10-161-0/+5
* arm64: dts: qcom: sa8775p: add TRNG nodeOm Prakash Singh2023-10-161-0/+5
* arm64: dts: qcom: sa8775p: enable the inline crypto engineBartosz Golaszewski2023-09-201-0/+8
* arm64: dts: qcom: sa8775p: Hook up PDC as wakeup-parent of TLMMKonrad Dybcio2023-08-151-0/+1
* arm64: dts: qcom: sa8775p: add a node for EMAC1Bartosz Golaszewski2023-08-111-0/+33
* arm64: dts: qcom: sa8775p: add a node for the second serdes PHYBartosz Golaszewski2023-08-111-0/+9
* arm64: dts: qcom: sa8775p: Add pcie0 and pcie1 nodesMrinmay Sarkar2023-07-221-2/+202
* arm64: dts: qcom: sa8775p: add the first 1Gb ethernet interfaceBartosz Golaszewski2023-07-101-0/+33
* arm64: dts: qcom: sa8775p: add the SGMII PHY nodeBartosz Golaszewski2023-07-101-0/+9
* Merge tag 'soc-dt-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/socLinus Torvalds2023-06-301-2/+1319
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| * arm64: dts: qcom: sa8775p: add uart5 and uart9 nodesShazad Hussain2023-05-271-0/+30
| * arm64: dts: qcom: sa8775p: add missing spi nodesShazad Hussain2023-05-271-0/+399
| * arm64: dts: qcom: sa8775p: add missing i2c nodesShazad Hussain2023-05-271-0/+420
| * arm64: dts: qcom: sa8775p: add the QUPv3 #0 and #3 nodeShazad Hussain2023-05-271-0/+26
| * arm64: dts: qcom: sa8775p: mark the UFS controller as dma-coherentBartosz Golaszewski2023-05-181-0/+1
| * arm64: dts: qcom: sa8775p: enable AOSSBartosz Golaszewski2023-05-151-0/+11
| * arm64: dts: qcom: sa8775p: add USB nodesShazad Hussain2023-05-151-2/+237
| * arm64: dts: qcom: sa8775p: add the watchdog nodeBartosz Golaszewski2023-05-151-0/+7
| * arm64: dts: qcom: sa8775p: add the GPU IOMMU nodeBartosz Golaszewski2023-05-151-0/+37
| * arm64: dts: qcom: sa8775p: add the GPU clock controller nodeBartosz Golaszewski2023-05-151-0/+14
| * arm64: dts: qcom: sa8775p: add the pcie smmu nodeBartosz Golaszewski2023-05-151-0/+74
| * arm64: dts: qcom: sa8775p: add UFS nodesBartosz Golaszewski2023-05-151-0/+58
| * arm64: dts: qcom: sa8775p: add the PMU nodeBartosz Golaszewski2023-05-151-0/+5
* | arm64: dts: qcom: add missing cache propertiesKrzysztof Kozlowski2023-05-181-0/+20
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* arm64: dts: qcom: sa8775p: add the spmi nodeBartosz Golaszewski2023-04-051-0/+22
* arm64: dts: qcom: sa8775p: add the pdc nodeBartosz Golaszewski2023-04-051-0/+47
* arm64: dts: qcom: sa8775p: sort soc nodes by reg propertyBartosz Golaszewski2023-04-051-197/+197
* arm64: dts: qcom: sa8775p: pad reg properties to 8 digitsBartosz Golaszewski2023-04-051-6/+6
* arm64: dts: qcom: sa8775p: add high-speed UART nodesBartosz Golaszewski2023-03-221-0/+30
* arm64: dts: qcom: sa8775p: add the spi16 nodeBartosz Golaszewski2023-03-221-0/+21
* arm64: dts: qcom: sa8775p: add the i2c18 nodeBartosz Golaszewski2023-03-221-0/+22
* arm64: dts: qcom: sa8775p: add the QUPv3 #2 nodeBartosz Golaszewski2023-03-221-0/+13
* arm64: dts: qcom: sa8775p: add cpufreq nodeBartosz Golaszewski2023-03-151-0/+21
* arm64: dts: qcom: add initial support for qcom sa8775p-rideBartosz Golaszewski2023-03-151-0/+805
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