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* Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/socLinus Torvalds2020-10-24218-4263/+19258
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull ARM Devicetree updates from Olof Johansson: "As usual, most of the changes are to devicetrees. Besides smaller fixes, some refactorings and cleanups, some of the new platforms and chips (or significant features) supported are below: Broadcom boards: - Cisco Meraki MR32 (BCM53016-based) - BCM2711 (RPi4) display pipeline support Actions Semi boards: - Caninos Loucos Labrador SBC (S500-based) - RoseapplePi SBC (S500-based) Allwinner SoCs/boards: - A100 SoC with Perf1 board - Mali, DMA, Cetrus and IR support for R40 SoC Amlogic boards: - Libretch S905x CC V2 board - Hardkernel ODROID-N2+ board Aspeed boards/platforms: - Wistron Mowgli (AST2500-based, Power9 OpenPower server) - Facebook Wedge400 (AST2500-based, ToR switch) Hisilicon SoC: - SD5203 SoC Nvidia boards: - Tegra234 VDK, for pre-silicon Orin SoC NXP i.MX boards: - Librem 5 phone - i.MX8MM DDR4 EVK - Variscite VAR-SOM-MX8MN SoM - Symphony board - Tolino Shine 2 HD - TQMa6 SoM - Y Soft IOTA Orion Rockchip boards: - NanoPi R2S board - A95X-Z2 board - more Rock-Pi4 variants STM32 boards: - Odyssey SOM board (STM32MP157CAC-based) - DH DRC02 board Toshiba SoCs/boards: - Visconti SoC and TPMV7708 board" * tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (638 commits) ARM: dts: nspire: Fix SP804 users arm64: dts: lg: Fix SP804 users arm64: dts: lg: Fix SP805 clocks ARM: mstar: Fix up the fallout from moving the dts/dtsi files ARM: mstar: Add mstar prefix to all of the dtsi/dts files ARM: mstar: Add interrupt to pm_uart ARM: mstar: Add interrupt controller to base dtsi ARM: dts: meson8: remove two invalid interrupt lines from the GPU node arm64: dts: ti: k3-j7200-common-proc-board: Add USB support arm64: dts: ti: k3-j7200-common-proc-board: Configure the SERDES lane function arm64: dts: ti: k3-j7200-main: Add USB controller arm64: dts: ti: k3-j7200-main.dtsi: Add USB to SERDES lane MUX arm64: dts: ti: k3-j7200-main: Add SERDES lane control mux dt-bindings: ti-serdes-mux: Add defines for J7200 SoC ARM: dts: hisilicon: add SD5203 dts ARM: dts: hisilicon: fix the system controller compatible nodes arm64: dts: zynqmp: Fix leds subnode name for zcu100/ultra96 v1 arm64: dts: zynqmp: Remove undocumented u-boot properties arm64: dts: zynqmp: Remove additional compatible string for i2c IPs arm64: dts: zynqmp: Rename buses to be align with simple-bus yaml ...
| * Merge tag 'visconti-initial-for-5.10-tag2' of ↵Olof Johansson2020-10-035-0/+529
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/iwamatsu/linux-visconti into arm/dt Visconti5 SoC changes for v5.10 (take two) - Add dt-bindings for Toshiba Visconti ARM SoCs - Add dt-bindings for the TMPV7708 RM main board - Add initial support for Toshiba Visconti platform - Add device tree for TMPV7708 RM main board - Add information for Toshiba Visconti ARM SoCs to MAINTAINERS - Enable configs for Toshiba Visconti to arm64's defconfig * tag 'visconti-initial-for-5.10-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/iwamatsu/linux-visconti: arm64: defconfig: Enable configs for Toshiba Visconti MAINTAINERS: Add information for Toshiba Visconti ARM SoCs arm64: dts: visconti: Add device tree for TMPV7708 RM main board arm64: visconti: Add initial support for Toshiba Visconti platform dt-bindings: arm: toshiba: Add the TMPV7708 RM main board dt-bindings: arm: toshiba: add Toshiba Visconti ARM SoCs Link: https://lore.kernel.org/r/20200923085236.4hu53gmnnmqkttuy@toshiba.co.jp Signed-off-by: Olof Johansson <olof@lixom.net>
| | * arm64: dts: visconti: Add device tree for TMPV7708 RM main boardNobuhiro Iwamatsu2020-09-235-0/+529
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add basic support for the Visconti TMPV7708 SoC peripherals - - CPU - CA53 x 4 and 2 cluster. - not support PSCI, currently only spin-table is supported. - Interrupt controller (ARM Generic Interrupt Controller) - Timer (ARM architected timer) - UART (ARM PL011 UART controller) - SPI (ARM PL022 SPI controller) - I2C (Synopsys DesignWare APB I2C Controller) - Pin control (Visconti specific) Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp> Reviewed-by: Punit Agrawal <punit1.agrawal@toshiba.co.jp>
| * | arm64: dts: lg: Fix SP804 usersAndre Przywara2020-10-032-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Even though the SP804 binding allows to specify only one clock, the primecell driver requires a named clock to activate the bus clock. Specify the one clock three times and provide some clock-names, to make the DT match the SP804 and primecell binding. Also add the missing arm,primecell compatible string. Link: https://lore.kernel.org/r/20200907121831.242281-4-andre.przywara@arm.com Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Olof Johansson <olof@lixom.net>
| * | arm64: dts: lg: Fix SP805 clocksAndre Przywara2020-10-032-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The SP805 DT binding requires two clocks to be specified, but the two LG platform DTs currently only specify one clock. In practice, Linux would pick a clock named "apb_pclk" for the bus clock, and the Linux (and U-Boot) SP805 driver would use the first clock to derive the actual watchdog counter frequency. Since currently both are the very same clock, we can just double the clock reference, and add the correct clock-names, to match the binding. Link: https://lore.kernel.org/r/20200907121831.242281-6-andre.przywara@arm.com Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Chanho Min <chanho.min@lge.com> Signed-off-by: Olof Johansson <olof@lixom.net>
| * | Merge tag 'zynqmp-dt-for-v5.10' of https://github.com/Xilinx/linux-xlnx into ↵Olof Johansson2020-10-034-20/+24
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | arm/dt arm64: soc: ZynqMP DT changes for v5.10 - Fix IRQ flag for PMIC - Align gpio hogs and leds with naming convention - Rename busses to match DT schema - Tune i2c cadence compatible string - Remove undocumented u-boot properties * tag 'zynqmp-dt-for-v5.10' of https://github.com/Xilinx/linux-xlnx: arm64: dts: zynqmp: Fix leds subnode name for zcu100/ultra96 v1 arm64: dts: zynqmp: Remove undocumented u-boot properties arm64: dts: zynqmp: Remove additional compatible string for i2c IPs arm64: dts: zynqmp: Rename buses to be align with simple-bus yaml arm64: dts: xilinx: align GPIO hog names with dtschema arm64: dts: zynqmp-zcu100-revC: correct interrupt flags arm64: dts: xilinx: Align IOMMU nodename with dtschema arm64: dts: zynqmp: Add GTR transceivers Link: https://lore.kernel.org/r/37a0333b-541e-649c-68c5-aa4b52e6b91d@monstr.eu Signed-off-by: Olof Johansson <olof@lixom.net>
| | * | arm64: dts: zynqmp: Fix leds subnode name for zcu100/ultra96 v1Michal Simek2020-09-291-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix the leds subnode names to match (^led-[0-9a-f]$|led). Similar change has been also done by commit 08dc0e5dd9aa ("arm64: dts: meson: fix leds subnodes name"). The patch is fixing this warning: avnet-ultra96-rev1.dt.yaml: leds: 'ds2', 'ds3', 'ds4', 'ds5' do not match any of the regexes: '(^led-[0-9a-f]$|led)', 'pinctrl-[0-9]+' Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/1a69c3fa0291f991ffcf113ea222c713ba4d4ff0.1598264917.git.michal.simek@xilinx.com
| | * | arm64: dts: zynqmp: Remove undocumented u-boot propertiesMichal Simek2020-09-292-6/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | u-boot, DT properties are not documented anywhere in Linux DT binding that's why remove them. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/8ba339425b9c9f319bdedce7741367055a30713c.1598257720.git.michal.simek@xilinx.com Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
| | * | arm64: dts: zynqmp: Remove additional compatible string for i2c IPsMichal Simek2020-09-291-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | DT binding permits only one compatible string which was decribed in past by commit 63cab195bf49 ("i2c: removed work arounds in i2c driver for Zynq Ultrascale+ MPSoC"). The commit aea37006e183 ("dt-bindings: i2c: cadence: Migrate i2c-cadence documentation to YAML") has converted binding to yaml and the following issues is reported: ...: i2c@ff030000: compatible: Additional items are not allowed ('cdns,i2c-r1p10' was unexpected) From schema: .../Documentation/devicetree/bindings/i2c/cdns,i2c-r1p10.yaml fds ...: i2c@ff030000: compatible: ['cdns,i2c-r1p14', 'cdns,i2c-r1p10'] is too long The commit c415f9e8304a ("ARM64: zynqmp: Fix i2c node's compatible string") has added the second compatible string but without removing origin one. The patch is only keeping one compatible string "cdns,i2c-r1p14". Fixes: c415f9e8304a ("ARM64: zynqmp: Fix i2c node's compatible string") Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/cc294ae1a79ef845af6809ddb4049f0c0f5bb87a.1598259551.git.michal.simek@xilinx.com Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
| | * | arm64: dts: zynqmp: Rename buses to be align with simple-bus yamlMichal Simek2020-09-291-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rename amba-apu and amba to AXI. Based on Xilinx ZynqMP TRM (Chapter 15) chip is "using the advanced eXtensible interface (AXI) point-to-point channels for communicating addresses, data, and response transactions between master and slave clients." Issues are reported as: ...: amba: $nodename:0: 'amba' does not match '^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$' From schema: .../dt-schema/dtschema/schemas/simple-bus.yaml ...: amba-apu@0: $nodename:0: 'amba-apu@0' does not match '^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$' From schema: .../dt-schema/dtschema/schemas/simple-bus.yaml Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/68f20a2b2bb0feee80bc3348619c2ee98aa69963.1598263539.git.michal.simek@xilinx.com Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
| | * | arm64: dts: xilinx: align GPIO hog names with dtschemaKrzysztof Kozlowski2020-09-291-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The convention for node names is to use hyphens, not underscores. dtschema for pca95xx expects GPIO hogs to end with 'hog' prefix. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20200916155715.21009-8-krzk@kernel.org Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| | * | arm64: dts: zynqmp-zcu100-revC: correct interrupt flagsKrzysztof Kozlowski2020-09-211-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | GPIO_ACTIVE_x flags are not correct in the context of interrupt flags. These are simple defines so they could be used in DTS but they will not have the same meaning: 1. GPIO_ACTIVE_HIGH = 0 = IRQ_TYPE_NONE 2. GPIO_ACTIVE_LOW = 1 = IRQ_TYPE_EDGE_RISING Correct the interrupt flags, assuming the author of the code wanted same logical behavior behind the name "ACTIVE_xxx", this is: ACTIVE_LOW => IRQ_TYPE_LEVEL_LOW Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20200917185052.5084-1-krzk@kernel.org Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | Merge tag 'actions-arm64-dt-for-v5.10' of ↵Olof Johansson2020-10-031-1/+16
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/mani/linux-actions into arm/dt Actions Semi ARM64 DT for v5.10: - Fix the memory region used by pinctrl and sps drivers on the S700 SoC. The issue is fixed by limiting the address space used by pinctrl driver. In hardware these two are separate subsystems but the hw engineers somehow merged the registers space into one. So we now limit the address space with appropriate offsets for the two drivers. - Add DMA controller support for S700 SoC. The relevant driver changes are picked up by DMA Engine mainatainer. The DMA on this SoC can be used for mem-to-mem and mem-to-peripheral transfers. * tag 'actions-arm64-dt-for-v5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/mani/linux-actions: arm64: dts: actions: Add DMA Controller for S700 arm64: dts: actions: limit address range for pinctrl node Link: https://lore.kernel.org/r/20200922114030.GC11251@Mani-XPS-13-9360 Signed-off-by: Olof Johansson <olof@lixom.net>
| | * | | arm64: dts: actions: Add DMA Controller for S700Amit Singh Tomar2020-09-221-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit adds DMA controller present on Actions S700, it differs from S900 in terms of number of dma channels and requests. Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
| | * | | arm64: dts: actions: limit address range for pinctrl nodeAmit Singh Tomar2020-09-221-1/+1
| | | |/ | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | After commit 7cdf8446ed1d ("arm64: dts: actions: Add pinctrl node for Actions Semi S700") following error has been observed while booting Linux on Cubieboard7-lite(based on S700 SoC). [ 0.257415] pinctrl-s700 e01b0000.pinctrl: can't request region for resource [mem 0xe01b0000-0xe01b0fff] [ 0.266902] pinctrl-s700: probe of e01b0000.pinctrl failed with error -16 This is due to the fact that memory range for "sps" power domain controller clashes with pinctrl. One way to fix it, is to limit pinctrl address range which is safe to do as current pinctrl driver uses address range only up to 0x100. This commit limits the pinctrl address range to 0x100 so that it doesn't conflict with sps range. Fixes: 7cdf8446ed1d ("arm64: dts: actions: Add pinctrl node for Actions Semi S700") Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Suggested-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
| * | | Merge tag 'sunxi-dt-for-5.10-1' of ↵Olof Johansson2020-10-0314-41/+590
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/dt Our usual bunch of patches to support the Allwinner SoCs, this time adding: - Allwinner A100 initial support - Mali, DMA, cedrus and IR Support for the R40 - Crypto support for the v3s - New board: Allwinner A100 Perf1 * tag 'sunxi-dt-for-5.10-1' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: (24 commits) ARM: dts: sun8i: v3s: Enable crypto engine dt-bindings: crypto: Add compatible for V3s dt-bindings: crypto: Specify that allwinner, sun8i-a33-crypto needs reset arm64: dts: allwinner: a64: Update the audio codec compatible arm64: dts: allwinner: a64: Update codec widget names ARM: dts: sun8i: a33: Update codec widget names ARM: dts: sun8i: r40: Add video engine node ARM: dts: sun8i: r40: Add node for system controller dt-bindings: sram: allwinner, sun4i-a10-system-control: Add R40 compatibles ARM: dts: sun8i: r40: bananapi-m2-ultra: Enable IR ARM: dts: sun8i: r40: Add IR nodes dt-bindings: media: allwinner, sun4i-a10-ir: Add R40 compatible ARM: dts: sun8i: r40: Add DMA node dt-bindings: dma: allwinner,sun50i-a64-dma: Add R40 compatible arm64: allwinner: A100: add support for Allwinner Perf1 board dt-bindings: arm: sunxi: Add Allwinner A100 Perf1 Board bindings arm64: allwinner: A100: add the basical Allwinner A100 DTSI file dt-bindings: irq: sun7i-nmi: Add binding for A100's NMI controller dt-bindings: irq: sun7i-nmi: fix dt-binding for a80 nmi ARM: dts: sun4i: Enable HDMI support on the Mele A1000 ... Link: https://lore.kernel.org/r/ac39ee89-ea3a-4971-8cd7-8c4b2ecef39d.lettre@localhost Signed-off-by: Olof Johansson <olof@lixom.net>
| | * | | arm64: dts: allwinner: a64: Update the audio codec compatibleSamuel Holland2020-09-171-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The audio codec in the A64 has some differences from the A33 codec, so it needs its own compatible. Since the two codecs are similar, the A33 codec compatible is kept as a fallback. Using the correct compatible fixes a channel inversion issue and cleans up some DAPM widgets that are no longer used. Signed-off-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20200726012557.38282-8-samuel@sholland.org
| | * | | arm64: dts: allwinner: a64: Update codec widget namesSamuel Holland2020-09-179-36/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The sun8i-codec driver introduced a new set of DAPM widgets that more accurately describe the hardware topology. Update the various device trees to use the new widget names. Signed-off-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20200726012557.38282-7-samuel@sholland.org
| | * | | arm64: allwinner: A100: add support for Allwinner Perf1 boardYangtao Li2020-08-252-0/+181
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A100 perf1 is an Allwinner A100-based SBC, with the following features: - 1GiB DDR3 DRAM - AXP803 PMIC - 2 USB 2.0 ports - MicroSD slot and on-board eMMC module - on-board Nand flash - ··· Adds initial support for it, including UART and PMU. Signed-off-by: Yangtao Li <frank@allwinnertech.com> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/30f4a3fc6ac84d05094e2c3b89d1dddc8ff6b7fc.1595572867.git.frank@allwinnertech.com
| | * | | arm64: allwinner: A100: add the basical Allwinner A100 DTSI fileYangtao Li2020-08-251-0/+364
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Allwinner A100 is a new SoC with Cortex-A53 cores, this commit adds the basical DTSI file of it, including the clock, i2c, pins, sid, ths, nmi, and UART support. Signed-off-by: Yangtao Li <frank@allwinnertech.com> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/815a458de74b79eb649972de786e647be3846424.1595572867.git.frank@allwinnertech.com
| | * | | arm64: dts: allwinner: Mark timer as stopped in suspendSamuel Holland2020-08-183-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When possible, system firmware on 64-bit Allwinner platforms disables OSC24M during system suspend. Since this oscillator is the clock source for the ARM architectural timer, this causes the timer to stop counting. Therefore, the ARM architectural timer must not be marked as NONSTOP on these platforms, or the time will be wrong after system resume. Adding the arm,no-tick-in-suspend property forces the kernel to ignore the ARM architectural timer when calculating sleeptime; it falls back to reading the RTC. Note that this only affects deep suspend, not s2idle. Signed-off-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20200809021822.5285-1-samuel@sholland.org
| | * | | arm64: dts: allwinner: replace numerical constant with CCU_CLKXAlexander Kochetkov2020-08-181-4/+4
| | |/ / | | | | | | | | | | | | | | | | | | | | Signed-off-by: Alexander Kochetkov <al.kochet@gmail.com> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20200803143022.25909-1-al.kochet@gmail.com
| * | | Merge tag 'ti-k3-dt-for-v5.10-part2' of ↵Olof Johansson2020-10-038-16/+1194
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/nmenon/linux into arm/dt Second and final device tree updates towards 5.10-rc1 for TI K3 platform. * tag 'ti-k3-dt-for-v5.10-part2' of git://git.kernel.org/pub/scm/linux/kernel/git/nmenon/linux: (23 commits) arm64: dts: ti: k3-j7200-common-proc-board: Add USB support arm64: dts: ti: k3-j7200-common-proc-board: Configure the SERDES lane function arm64: dts: ti: k3-j7200-main: Add USB controller arm64: dts: ti: k3-j7200-main.dtsi: Add USB to SERDES lane MUX arm64: dts: ti: k3-j7200-main: Add SERDES lane control mux dt-bindings: ti-serdes-mux: Add defines for J7200 SoC arm64: dts: ti: k3-j721e-common-proc-board: align GPIO hog names with dtschema arm64: dts: ti: k3-j7200-common-proc-board: Add support for eMMC and SD card arm64: dts: ti: k3-j7200-main: Add support for MMC/SD controller nodes arm64: dts: ti: k3-j7200-som-p0: Add HyperFlash node arm64: dts: ti: k3-j7200-mcu-wakeup: Add HyperBus node arm64: dts: ti: k3-j7200-common-proc-board: Add I2C IO expanders arm64: dts: ti: k3-j7200: Add I2C nodes arm64: dts: ti: k3-j7200-common-proc-board: add mcu cpsw nuss pinmux and phy defs arm64: dts: ti: k3-j7200-mcu: add mcu cpsw nuss node arm64: dts: ti: k3-j7200-main: add main navss cpts node arm64: dts: ti: k3-j7200: add DMA support arm64: dts: ti: Add support for J7200 Common Processor Board arm64: dts: ti: Add support for J7200 SoC dt-bindings: arm: ti: Add bindings for J7200 SoC ... Link: https://lore.kernel.org/r/20201002134559.orvmgbns57qlyn3i@akan Signed-off-by: Olof Johansson <olof@lixom.net>
| | * | | arm64: dts: ti: k3-j7200-common-proc-board: Add USB supportRoger Quadros2020-09-301-0/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The board uses lane 3 of SERDES for USB. Set the mux accordingly. The USB controller and EVM supports super-speed for USB0 on the Type-C port. However, the SERDES has a limitation that upto 2 protocols can be used at a time. The SERDES is wired for PCIe, QSGMII and USB super-speed. It has been chosen to use PCI2 and QSGMII as default. So restrict USB0 to high-speed mode. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com> Link: https://lore.kernel.org/r/20200930122032.23481-7-rogerq@ti.com
| | * | | arm64: dts: ti: k3-j7200-common-proc-board: Configure the SERDES lane functionKishon Vijay Abraham I2020-09-301-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | First two lanes of SERDES is connected to PCIe, third lane is connected to QSGMII and the last lane is connected to USB. However, Cadence torrent SERDES doesn't support more than 2 protocols at the same time. Configure it only for PCIe and QSGMII. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com> Link: https://lore.kernel.org/r/20200930122032.23481-6-rogerq@ti.com
| | * | | arm64: dts: ti: k3-j7200-main: Add USB controllerRoger Quadros2020-09-301-0/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | j7200 has on USB controller instance. Add that. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com> Link: https://lore.kernel.org/r/20200930122032.23481-5-rogerq@ti.com
| | * | | arm64: dts: ti: k3-j7200-main.dtsi: Add USB to SERDES lane MUXRoger Quadros2020-09-301-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The USB controller can be connected to one of the 2 lanes of SERDES0 using a MUX. Add a MUX controller node for that. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com> Link: https://lore.kernel.org/r/20200930122032.23481-4-rogerq@ti.com
| | * | | arm64: dts: ti: k3-j7200-main: Add SERDES lane control muxRoger Quadros2020-09-301-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The SERDES lane control mux registers are present in the CTRLMMR space. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com> Link: https://lore.kernel.org/r/20200930122032.23481-3-rogerq@ti.com
| | * | | Merge tag 'ti-k3-dt-fixes-for-v5.9' into ti-k3-dts-nextNishanth Menon2020-09-302-11/+13
| | |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Merge fix up for TI serdes mux definition introduced in 5.9 as dependency for 5.10 series on J7200 USB. Signed-off-by: Nishanth Menon <nm@ti.com>
| | * | | | arm64: dts: ti: k3-j721e-common-proc-board: align GPIO hog names with dtschemaKrzysztof Kozlowski2020-09-251-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The convention for node names is to use hyphens, not underscores. dtschema for pca95xx expects GPIO hogs to end with 'hog' prefix. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Nishanth Menon <nm@ti.com> Link: https://lore.kernel.org/r/20200916155715.21009-7-krzk@kernel.org
| | * | | | arm64: dts: ti: k3-j7200-common-proc-board: Add support for eMMC and SD cardFaiz Abbas2020-09-241-0/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for the eMMC and SD card connected on the common processor board sdhci0 is connected to an eMMC while sdhci1 is connected to the micro SD slot. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Tested-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Sekhar Nori <nsekhar@ti.com> Link: https://lore.kernel.org/r/20200924112644.11076-3-faiz_abbas@ti.com
| | * | | | arm64: dts: ti: k3-j7200-main: Add support for MMC/SD controller nodesFaiz Abbas2020-09-241-0/+37
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for MMC/SD controller nodes present on TI's j7200 SoCs. There are two nodes: 1. sdhci0 (8 bit bus width, 200 MHz, HS200, 200 MBps) 2. sdhci1 (4 bit bus width, 50 MHz, HS, 25 MBps) Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Tested-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Sekhar Nori <nsekhar@ti.com> Link: https://lore.kernel.org/r/20200924112644.11076-2-faiz_abbas@ti.com
| | * | | | arm64: dts: ti: k3-j7200-som-p0: Add HyperFlash nodeVignesh Raghavendra2020-09-241-0/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | J7200 SoM has a HyperFlash connected to HyperBus memory controller. But HyperBus is muxed with OSPI, therefore keep HyperBus node disabled. Bootloader will detect the mux and enable the node as required. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Sekhar Nori <nsekhar@ti.com> Link: https://lore.kernel.org/r/20200923163150.16973-3-vigneshr@ti.com
| | * | | | arm64: dts: ti: k3-j7200-mcu-wakeup: Add HyperBus nodeVignesh Raghavendra2020-09-241-0/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | J7200 has a Flash SubSystem that has one OSPI and one HyperBus.. Add DT nodes for HyperBus controller for now. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Sekhar Nori <nsekhar@ti.com> Link: https://lore.kernel.org/r/20200923163150.16973-2-vigneshr@ti.com
| | * | | | arm64: dts: ti: k3-j7200-common-proc-board: Add I2C IO expandersVignesh Raghavendra2020-09-241-0/+49
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add DT nodes for I2C GPIO expanders on main_i2c0 and main_i2c1 and also add the pinmux corresponding to these I2C instances. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Sekhar Nori <nsekhar@ti.com> Reviewed-by: Faiz Abbas <faiz_abbas@ti.com> Link: https://lore.kernel.org/r/20200923155400.13757-3-vigneshr@ti.com
| | * | | | arm64: dts: ti: k3-j7200: Add I2C nodesVignesh Raghavendra2020-09-242-0/+110
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | J7200 has 7 I2Cs in main domain, 2 I2Cs in MCU and 1 in wakeup domain. Add DT nodes for the same. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Sekhar Nori <nsekhar@ti.com> Reviewed-by: Faiz Abbas <faiz_abbas@ti.com> Link: https://lore.kernel.org/r/20200923155400.13757-2-vigneshr@ti.com
| | * | | | arm64: dts: ti: k3-j7200-common-proc-board: add mcu cpsw nuss pinmux and phy ↵Grygorii Strashko2020-09-241-0/+45
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | defs The TI J7200 EVM base board has TI DP83867 PHY connected to external CPSW NUSS Port 1 in rgmii-rxid mode. Hence, add pinmux and Ethernet PHY configuration for TI J7200 SoC MCU Gigabit Ethernet two ports Switch subsystem (CPSW NUSS). Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Suman Anna <s-anna@ti.com> Link: https://lore.kernel.org/r/20200923220938.30788-5-grygorii.strashko@ti.com
| | * | | | arm64: dts: ti: k3-j7200-mcu: add mcu cpsw nuss nodeGrygorii Strashko2020-09-241-0/+74
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add DT node for The TI J7200 MCU SoC Gigabit Ethernet two ports Switch subsystem (MCU CPSW NUSS). Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Suman Anna <s-anna@ti.com> Link: https://lore.kernel.org/r/20200923220938.30788-4-grygorii.strashko@ti.com
| | * | | | arm64: dts: ti: k3-j7200-main: add main navss cpts nodeGrygorii Strashko2020-09-241-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add DT node for Main NAVSS CPTS module. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Suman Anna <s-anna@ti.com> Link: https://lore.kernel.org/r/20200923220938.30788-3-grygorii.strashko@ti.com
| | * | | | arm64: dts: ti: k3-j7200: add DMA supportPeter Ujfalusi2020-09-242-0/+80
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the ringacc and udmap nodes for Main and MCU NAVSS. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Suman Anna <s-anna@ti.com> Link: https://lore.kernel.org/r/20200923220938.30788-2-grygorii.strashko@ti.com
| | * | | | arm64: dts: ti: Add support for J7200 Common Processor BoardLokesh Vutla2020-09-233-0/+96
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for J7200 Common Processor Board. The EVM architecture is very similar to J721E as follows: +------------------------------------------------------+ | +-------------------------------------------+ | | | | | | | Add-on Card 1 Options | | | | | | | +-------------------------------------------+ | | | | | | +-------------------+ | | | | | | | SOM | | | +--------------+ | | | | | | | | | | | Add-on | +-------------------+ | | | Card 2 | | Power Supply | | Options | | | | | | | | | +--------------+ | <--- +------------------------------------------------------+ Common Processor Board Common Processor board is the baseboard that has most of the actual connectors, power supply etc. A SOM (System on Module) is plugged on to the common processor board and this contains the SoC, PMIC, DDR and basic high speed components necessary for functionality. Note: * The minimum configuration required to boot up the board is System On Module(SOM) + Common Processor Board. * Since there is just a single SOM and Common Processor Board, we are maintaining common processor board as the base dts and SOM as the dtsi that we include. In the future as more SOM's appear, we should move common processor board as a dtsi and include configurations as dts. * All daughter cards beyond the basic boards shall be maintained as overlays. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com> Reviewed-by: Suman Anna <s-anna@ti.com> Link: https://lore.kernel.org/r/20200914162231.2535-6-lokeshvutla@ti.com
| | * | | | arm64: dts: ti: Add support for J7200 SoCLokesh Vutla2020-09-233-0/+503
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The J7200 SoC is a part of the K3 Multicore SoC architecture platform. It is targeted for automotive gateway, vehicle compute systems, Vehicle-to-Vehicle (V2V) and Vehicle-to-Everything (V2X) applications. The SoC aims to meet the complex processing needs of modern embedded products. Some highlights of this SoC are: * Dual Cortex-A72s in a single cluster, two clusters of lockstep capable dual Cortex-R5F MCUs and a Centralized Device Management and Security Controller (DMSC). * Configurable L3 Cache and IO-coherent architecture with high data throughput capable distributed DMA architecture under NAVSS. * Integrated Ethernet switch supporting up to a total of 4 external ports in addition to legacy Ethernet switch of up to 2 ports. * Upto 1 PCIe-GEN3 controller, 1 USB3.0 Dual-role device subsystems, 20 MCANs, 3 McASP, eMMC and SD, OSPI/HyperBus memory controller, I3C and I2C, eCAP/eQEP, eHRPWM among other peripherals. * One hardware accelerator block containing AES/DES/SHA/MD5 called SA2UL management. See J7200 Technical Reference Manual (SPRUIU1, June 2020) for further details: https://www.ti.com/lit/pdf/spruiu1 Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com> Reviewed-by: Suman Anna <s-anna@ti.com> Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Kishon Vijay Abraham I <kishon@ti.com> Link: https://lore.kernel.org/r/20200914162231.2535-5-lokeshvutla@ti.com
| | * | | | arm64: dts: ti: Makefile: Use ARCH_K3 for building dtbsLokesh Vutla2020-09-231-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To allow lesser dependency and better maintainability use CONFIG_ARCH_K3 for building dtbs for all K3 based devices. This is as per the discussion in [0]. [0] https://lore.kernel.org/linux-arm-kernel/20200908112534.t5bgrjf7y3a6l2ss@akan/ Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Suman Anna <s-anna@ti.com> Link: https://lore.kernel.org/r/20200914162231.2535-2-lokeshvutla@ti.com
| * | | | | Merge tag 'v5.9-next-dts64' of ↵Olof Johansson2020-09-265-7/+60
| |\ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into arm/dt mt8173: - make nor flash work - fix da9211 regulator modes mt8183: - add support for system companion processor mt8516: - set reset gpio for gpio expander in pumpkin board * tag 'v5.9-next-dts64' of https://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux: arm64: dts: mt8183: update watchdog device node arm64: dts: mt8173: elm: Fix nor_flash node property arm64: dts: mediatek: fix tca6416 reset GPIOs in pumpkin arm64: dts: mt8183: add scp node arm64: dts: mt8173-elm: fix supported values for regulator-allowed-modes of da9211 Link: https://lore.kernel.org/r/1580bc76-b05a-ad29-1854-d2aca657c775@gmail.com Signed-off-by: Olof Johansson <olof@lixom.net>
| | * | | | | arm64: dts: mt8183: update watchdog device nodeCrystal Guo2020-09-211-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The watchdog driver for MT8183 relies on DT data, so the fallback compatible MT6589 won't work, need to update watchdog device node to sync with watchdog dt-binding document. Signed-off-by: Crystal Guo <crystal.guo@mediatek.com> Acked-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
| | * | | | | arm64: dts: mt8173: elm: Fix nor_flash node propertyHsin-Yi Wang2020-09-211-3/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | bus-width and non-removable is not used by the driver. max-frequency should be spi-max-frequency for flash node. Fixes: 689b937bedde ("arm64: dts: mediatek: add mt8173 elm and hana board") Reported-by: Nicolas Boichat <drinkcat@chromium.org> Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org> Reviewed-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Link: https://lore.kernel.org/r/20200727074124.3779237-1-hsinyi@chromium.org Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
| | * | | | | arm64: dts: mediatek: fix tca6416 reset GPIOs in pumpkinKrzysztof Kozlowski2020-09-211-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Correct the property for reset GPIOs of tca6416 GPIO expander. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20200910175733.11046-4-krzk@kernel.org Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
| | * | | | | arm64: dts: mt8183: add scp nodeEddie Huang2020-09-103-0/+53
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add scp node to mt8183 and mt8183-evb Signed-off-by: Erin Lo <erin.lo@mediatek.com> Signed-off-by: Pi-Hsun Shih <pihsun@chromium.org> Signed-off-by: Eddie Huang <eddie.huang@mediatek.com> Link: https://lore.kernel.org/r/20191112110330.179649-5-pihsun@chromium.org Link: https://lore.kernel.org/r/20200909081422.2412795-1-pihsun@chromium.org [mb: squashed both patches] Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
| | * | | | | arm64: dts: mt8173-elm: fix supported values for regulator-allowed-modes of ↵Dafna Hirschfeld2020-09-091-1/+3
| | | |_|/ / | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | da9211 According to the datasheet the allowed modes for the da9211 regulator are sync and auto mode. This should be changed in the devicetree. This also fix an error message 'BUCKA: invalid regulator-allowed-modes element 0' since value 0 is invalid. Fixes: 689b937beddeb ("arm64: dts: mediatek: add mt8173 elm and hana board") Signed-off-by: Dafna Hirschfeld <dafna.hirschfeld@collabora.com> Tested-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Link: https://lore.kernel.org/r/20200903142819.24487-1-dafna.hirschfeld@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
| * | | | | Merge tag 'amlogic-dt64' of ↵Olof Johansson2020-09-268-793/+1069
| |\ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into arm/dt arm64: dtc: amlogic updates for v5.10 - new boards: libretch s905x cc v2, Hardkernel ODROID-N2+ - vim3: sound updates * tag 'amlogic-dt64' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic: arm64: dts: meson: initial support for aml-s905x-cc v2 dt-bindings: arm: amlogic: add support for libretch s905x cc v2 arm64: dts: meson: add support for the ODROID-N2+ dt-bindings: arm: amlogic: add support for the ODROID-N2+ arm64: dts: meson: convert ODROID-N2 to dtsi arm64: dts: meson: vim3l: remove sound card definition arm64: dts: meson: vim3: make sound card common to all variants arm64: dts: meson: vim3: correct led polarity Link: https://lore.kernel.org/r/7h3636kjxd.fsf@baylibre.com Signed-off-by: Olof Johansson <olof@lixom.net>
generated by cgit v1.2.3 (git 2.39.1) at 2025-02-01 21:19:23 +0100