index
:
linux
master
linux
Fast-forward packages
summary
refs
log
tree
commit
diff
stats
log msg
author
committer
range
path:
root
/
arch
/
arm64
/
include
/
asm
/
cache.h
(
follow
)
Commit message (
Expand
)
Author
Age
Files
Lines
*
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 234
Thomas Gleixner
2019-06-19
1
-12
/
+1
*
kasan, arm64: remove redundant ARCH_SLAB_MINALIGN define
Andrey Konovalov
2019-01-16
1
-2
/
+0
*
kasan, arm64: use ARCH_SLAB_MINALIGN instead of manual aligning
Andrey Konovalov
2019-01-09
1
-0
/
+6
*
arm64: cpufeature: Fix handling of CTR_EL0.IDC field
Suzuki K Poulose
2018-10-16
1
-0
/
+40
*
arm64: Fix mismatched cache line size detection
Suzuki K Poulose
2018-07-05
1
-0
/
+4
*
arm64: Increase ARCH_DMA_MINALIGN to 128
Catalin Marinas
2018-05-15
1
-2
/
+2
*
Revert "arm64: Increase the max granular size"
Catalin Marinas
2018-05-11
1
-1
/
+1
*
Revert "arm64: Revert L1_CACHE_SHIFT back to 6 (64-byte cache line size)"
Will Deacon
2018-03-27
1
-3
/
+3
*
arm64: Add support for new control bits CTR_EL0.DIC and CTR_EL0.IDC
Shanker Donthineni
2018-03-09
1
-0
/
+4
*
arm64: Revert L1_CACHE_SHIFT back to 6 (64-byte cache line size)
Catalin Marinas
2018-03-06
1
-3
/
+3
*
arm64: cache: Identify VPIPT I-caches
Will Deacon
2017-03-20
1
-0
/
+7
*
arm64: cache: Merge cachetype.h into cache.h
Will Deacon
2017-03-20
1
-1
/
+30
*
arm64: Increase the max granular size
Tirumalesh Chalamarla
2015-10-28
1
-1
/
+1
*
arm64: Implement support for read-mostly sections
Jungseok Lee
2014-12-03
1
-0
/
+2
*
arm64: Implement cache_line_size() based on CTR_EL0.CWG
Catalin Marinas
2014-05-09
1
-1
/
+12
*
arm64: Cache maintenance routines
Catalin Marinas
2012-09-17
1
-0
/
+32