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path: root/arch/arm64/include/asm/pgtable-hwdef.h (follow)
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* arm64/mm: Compute PTRS_PER_[PMD|PUD] independently of PTRS_PER_PTEAnshuman Khandual2022-04-221-2/+2
* arm64/mm: Consolidate TCR_EL1 fieldsAnshuman Khandual2022-02-151-0/+2
* arm64/mm: Drop SECTION_[SHIFT|SIZE|MASK]Anshuman Khandual2021-06-151-7/+0
* arm64: mm: use XN table mapping attributes for the linear regionArd Biesheuvel2021-03-191-0/+6
* arm64: mm: add missing P4D definitions and use them consistentlyArd Biesheuvel2021-03-191-0/+9
* kasan: arm64: set TCR_EL1.TBID1 when enabledPeter Collingbourne2020-11-251-0/+1
* Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvmLinus Torvalds2020-10-231-24/+0
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| * KVM: arm64: Remove unused page-table codeWill Deacon2020-09-111-18/+0
| * KVM: arm64: Use generic allocator for hyp stage-1 page-tablesWill Deacon2020-09-111-6/+0
* | arm64/mm: Unify CONT_PMD_SHIFTGavin Shan2020-09-111-8/+2
* | arm64/mm: Unify CONT_PTE_SHIFTGavin Shan2020-09-111-3/+1
* | arm64/mm: Remove CONT_RANGE_OFFSETGavin Shan2020-09-111-2/+0
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* Merge branch 'for-next/tlbi' into for-next/coreCatalin Marinas2020-07-311-0/+2
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| * arm64: Document SW reserved PTE/PMD bits in Stage-2 descriptorsMarc Zyngier2020-07-071-0/+2
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*---. \ Merge branches 'for-next/misc', 'for-next/vmcoreinfo', 'for-next/cpufeature',...Catalin Marinas2020-07-311-2/+3
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| | | * arm64: pgtable-hwdef.h: delete duplicated wordsRandy Dunlap2020-07-301-2/+2
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| * / arm64/crash_core: Export TCR_EL1.T1SZ in vmcoreinfoBhupesh Sharma2020-07-021-0/+1
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* / arm64/mm: Redefine CONT_{PTE, PMD}_SHIFTGavin Shan2020-07-031-8/+8
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* Merge branch 'for-next/bti' into for-next/coreWill Deacon2020-05-281-0/+1
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| * arm64: Basic Branch Target Identification supportDave Martin2020-03-161-0/+1
* | KVM: arm64: Drop PTE_S2_MEMATTR_MASKZenghui Yu2020-04-281-1/+0
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*-. Merge branches 'for-next/acpi', 'for-next/cpufeatures', 'for-next/csum', 'for...Will Deacon2020-01-221-0/+3
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| | * arm64: hibernate: add PUD_SECT_RDONLYPavel Tatashin2020-01-081-0/+1
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| * arm64: Add initial support for E0PDMark Brown2020-01-151-0/+2
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* arm64: mm: Remove MAX_USER_VA_BITS definitionBhupesh Sharma2019-11-061-1/+1
* arm64: mm: Introduce 52-bit Kernel VAsSteve Capper2019-08-091-1/+1
* Merge tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/a...Linus Torvalds2019-07-081-2/+1
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| * arm64/mm: Drop [PTE|PMD]_TYPE_FAULTAnshuman Khandual2019-06-261-2/+0
| * arm64/mm: Move PTE_VALID from SW defined to HW page table entry definitionsAnshuman Khandual2019-06-031-0/+1
* | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 234Thomas Gleixner2019-06-191-12/+1
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* arm64: Add workaround for Fujitsu A64FX erratum 010001Zhang Lei2019-02-281-0/+1
* kasan, arm64: enable top byte ignore for the kernelAndrey Konovalov2018-12-281-0/+1
* Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvmLinus Torvalds2018-12-261-0/+4
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| * KVM: arm64: Add support for creating PUD hugepages at stage 2Punit Agrawal2018-12-181-0/+2
| * KVM: arm64: Support PUD hugepage in stage2_is_exec()Punit Agrawal2018-12-181-0/+2
* | arm64: mm: Introduce MAX_USER_VA_BITS definitionWill Deacon2018-12-121-5/+1
* | Merge branch 'kvm/cortex-a76-erratum-1165522' into aarch64/for-next/coreWill Deacon2018-12-101-0/+4
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| * | arm64: Add TCR_EPD{0,1} definitionsMarc Zyngier2018-12-101-0/+4
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* | arm64: Kconfig: Re-jig CONFIG options for 52-bit VAWill Deacon2018-12-101-2/+2
* | arm64: mm: Offset TTBR1 to allow 52-bit PTRS_PER_PGDSteve Capper2018-12-101-0/+10
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* arm64: mm: Support Common Not Private translationsVladimir Murzin2018-09-181-0/+2
* arm64: kaslr: Set TCR_EL1.NFD1 when CONFIG_RANDOMIZE_BASE=yWill Deacon2018-03-061-0/+1
* Merge tag 'kvm-4.16-1' of git://git.kernel.org/pub/scm/virt/kvm/kvmLinus Torvalds2018-02-101-0/+2
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| * arm64: KVM: PTE/PMD S2 XN bit definitionMarc Zyngier2018-01-081-0/+2
* | arm64: Correct type for PUD macrosPunit Agrawal2018-01-161-3/+3
* | Merge branch 'for-next/52-bit-pa' into for-next/coreCatalin Marinas2017-12-221-1/+24
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| * | arm64: handle 52-bit physical addresses in page table entriesKristina Martsenko2017-12-221-2/+4
| * | arm64: head.S: handle 52-bit PAs in PTEs in early page table setupKristina Martsenko2017-12-221-0/+6
| * | arm64: handle 52-bit addresses in TTBRKristina Martsenko2017-12-221-0/+13
| * | arm64: limit PA size to supported rangeKristina Martsenko2017-12-221-0/+2
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