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* Merge branch 'siginfo-linus' of git://git.kernel.org/pub/scm/linux/kernel/git...Linus Torvalds2018-01-304-108/+29
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| * signal/ptrace: Add force_sig_ptrace_errno_trap and use it where neededEric W. Biederman2018-01-231-2/+4
| * signal: Don't use structure initializers for struct siginfoEric W. Biederman2018-01-232-12/+14
| * signal/arm64: Better isolate the COMPAT_TASK portion of ptrace_hbptriggeredEric W. Biederman2018-01-231-15/+12
| * signal: Unify and correct copy_siginfo_to_user32Eric W. Biederman2018-01-161-70/+0
| * signal: Unify and correct copy_siginfo_from_user32Eric W. Biederman2018-01-161-10/+0
| * signal/arm64: Document conflicts with SI_USER and SIGFPE,SIGTRAP,SIGBUSEric W. Biederman2018-01-121-1/+1
* | Merge tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/a...Linus Torvalds2018-01-3024-191/+1314
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| * | arm64: Turn on KPTI only on CPUs that need itJayachandran C2018-01-231-0/+7
| * | arm64: Branch predictor hardening for Cavium ThunderX2Jayachandran C2018-01-231-0/+10
| * | arm64: Run enable method for errata work arounds on late CPUsSuzuki K Poulose2018-01-231-3/+6
| * | arm64: kpti: Fix the interaction between ASID switching and software PANCatalin Marinas2018-01-161-1/+1
| * | KVM: arm64: Handle RAS SErrors from EL2 on guest exitJames Morse2018-01-161-0/+1
| * | arm64: kernel: Prepare for a DISR userJames Morse2018-01-161-0/+9
| * | arm64: kernel: Survive corrected RAS errors notified by SErrorJames Morse2018-01-161-5/+46
| * | arm64: cpufeature: Detect CPU RAS ExtentionsXie XiuQi2018-01-161-0/+13
| * | arm64: sysreg: Move to use definitions for all the SCTLR bitsJames Morse2018-01-161-10/+3
| * | arm64: cpufeature: __this_cpu_has_cap() shouldn't stop earlyJames Morse2018-01-161-2/+1
| * | arm64: fpsimd: Fix state leakage when migrating after sigreturnDave Martin2018-01-163-7/+9
| * | arm64: Inform user if software PAN is in useStephen Boyd2018-01-161-0/+3
| * | arm64: capabilities: Handle duplicate entries for a capabilitySuzuki K Poulose2018-01-151-21/+23
| * | arm64: cpu_errata: Add Kryo to Falkor 1003 errataStephen Boyd2018-01-141-0/+21
| * | arm64: Extend early page table code to allow for larger kernelsSteve Capper2018-01-142-38/+107
| * | arm64: entry: Move the trampoline to be before PANSteve Capper2018-01-142-7/+8
| * | arm64: Re-order reserved_ttbr0 in linker scriptSteve Capper2018-01-141-3/+2
| * | arm64: sdei: Add trampoline code for remapping the kernelJames Morse2018-01-142-13/+105
| * | arm64: acpi: Remove __init from acpi_psci_use_hvc() for use by SDEIJames Morse2018-01-141-1/+1
| * | arm64: kernel: Add arch-specific SDEI entry code and CPU maskingJames Morse2018-01-135-1/+336
| * | arm64: uaccess: Add PAN helperJames Morse2018-01-131-2/+2
| * | arm64: Add vmap_stack header fileJames Morse2018-01-131-11/+2
| * | arm64: alternatives: use tpidr_el2 on VHE hostsJames Morse2018-01-132-4/+22
| * | Merge branch 'for-next/perf' of git://git.kernel.org/pub/scm/linux/kernel/git...Catalin Marinas2018-01-121-10/+6
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| | * | arm64: Use of_cpu_node_to_id helper for CPU topology parsingSuzuki K Poulose2018-01-021-10/+6
| * | | arm64: Implement branch predictor hardening for FalkorShanker Donthineni2018-01-082-2/+46
| * | | arm64: Implement branch predictor hardening for affected Cortex-A CPUsWill Deacon2018-01-082-0/+66
| * | | arm64: Add skeleton to harden the branch predictor against aliasing attacksWill Deacon2018-01-085-2/+139
| * | | arm64: Move post_ttbr_update_workaround to C codeMarc Zyngier2018-01-081-1/+1
| * | | arm64: cpufeature: Pass capability structure to ->enable callbackWill Deacon2018-01-081-2/+2
| * | | arm64: Take into account ID_AA64PFR0_EL1.CSV3Will Deacon2018-01-081-1/+7
| * | | arm64: use RET instruction for exiting the trampolineWill Deacon2018-01-081-1/+9
| * | | arm64: v8.4: Support for new floating point multiplication instructionsDongjiu Geng2018-01-052-0/+3
| * | | ARM64 / cpuidle: Use new cpuidle macro for entering retention statePrashanth Prakash2018-01-021-1/+7
| * | | Merge branch 'for-next/52-bit-pa' into for-next/coreCatalin Marinas2017-12-223-50/+89
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| | * | | arm64: allow ID map to be extended to 52 bitsKristina Martsenko2017-12-221-31/+45
| | * | | arm64: handle 52-bit physical addresses in page table entriesKristina Martsenko2017-12-221-1/+1
| | * | | arm64: don't open code page table entry creationKristina Martsenko2017-12-221-2/+1
| | * | | arm64: head.S: handle 52-bit PAs in PTEs in early page table setupKristina Martsenko2017-12-221-9/+31
| | * | | arm64: handle 52-bit addresses in TTBRKristina Martsenko2017-12-223-8/+12
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| * | | arm64: kaslr: Put kernel vectors address in separate data pageWill Deacon2017-12-112-1/+18
| * | | arm64: mm: Introduce TTBR_ASID_MASK for getting at the ASID in the TTBRWill Deacon2017-12-111-1/+1