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path: root/arch/arm64/mm/context.c (follow)
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* arm64: mm: Drop the unused cpu parameterShaokun Zhang2018-10-091-4/+4
* arm64: mm: Support Common Not Private translationsVladimir Murzin2018-09-181-0/+3
* treewide: kzalloc() -> kcalloc()Kees Cook2018-06-131-1/+1
* arm64: Move BP hardening to check_and_switch_contextMarc Zyngier2018-01-231-2/+3
* arm64: Add skeleton to harden the branch predictor against aliasing attacksWill Deacon2018-01-081-0/+2
* arm64: Move post_ttbr_update_workaround to C codeMarc Zyngier2018-01-081-0/+9
* arm64: asid: Do not replace active_asids if already 0Catalin Marinas2018-01-051-8/+11
* arm64: mm: Allocate ASIDs in pairsWill Deacon2017-12-111-8/+17
* arm64: mm: Remove pre_ttbr0_update_workaround for Falkor erratum #E1003Will Deacon2017-12-111-11/+0
* arm64: context: Fix comments and remove pointless smp_wmb()Will Deacon2017-12-011-11/+12
* arm64: mm: cleanup stale AIVIVT referencesMark Rutland2017-11-281-1/+4
* arm64: cache: Remove support for ASID-tagged VIVT I-cachesWill Deacon2017-03-201-3/+0
* arm64: Work around Falkor erratum 1003Christopher Covington2017-02-101-0/+11
* arm64: Disable TTBR0_EL1 during normal kernel executionCatalin Marinas2016-11-211-1/+6
* arm64: update ASID limitJean-Philippe Brucker2016-06-211-3/+6
* arm64: Add cpu_panic_kernel helperSuzuki K Poulose2016-04-151-2/+1
* arm64: make mrs_s prefixing implicit in read_cpuidMark Rutland2016-03-041-1/+1
* arm64: Rename cpuid_feature field extract routinesSuzuki K Poulose2016-02-251-1/+1
* arm64: Ensure the secondary CPUs have safe ASIDBits sizeSuzuki K Poulose2016-02-251-0/+18
* arm64: Add helper for extracting ASIDBitsSuzuki K Poulose2016-02-251-13/+23
* arm64: cpufeature: Change read_cpuid() to use sysreg's mrs_s macroJames Morse2016-02-181-1/+1
* arm64: mm: keep reserved ASIDs in sync with mm after multiple rolloversWill Deacon2015-11-261-12/+26
* arm64: mm: kill mm_cpumask usageWill Deacon2015-10-071-2/+0
* arm64: switch_mm: simplify mm and CPU checksWill Deacon2015-10-071-1/+1
* arm64: mm: rewrite ASID allocator and MM context-switching codeWill Deacon2015-10-071-93/+145
* arm64: flush: use local TLB and I-cache invalidationWill Deacon2015-10-071-2/+2
* arm64: force CONFIG_SMP=y and remove redundant #ifdefsWill Deacon2015-07-271-16/+0
* arm64: Do not attempt to use init_mm in reset_context()Catalin Marinas2015-06-121-0/+8
* arm64: Process managementCatalin Marinas2012-09-171-0/+159
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