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* mm: add new mmgrab() helperVegard Nossum2017-02-281-1/+1
| | | | | | | | | | | | | | | | | | | | | Apart from adding the helper function itself, the rest of the kernel is converted mechanically using: git grep -l 'atomic_inc.*mm_count' | xargs sed -i 's/atomic_inc(&\(.*\)->mm_count);/mmgrab\(\1\);/' git grep -l 'atomic_inc.*mm_count' | xargs sed -i 's/atomic_inc(&\(.*\)\.mm_count);/mmgrab\(\&\1\);/' This is needed for a later patch that hooks into the helper, but might be a worthwhile cleanup on its own. (Michal Hocko provided most of the kerneldoc comment.) Link: http://lkml.kernel.org/r/20161218123229.22952-1-vegard.nossum@oracle.com Signed-off-by: Vegard Nossum <vegard.nossum@oracle.com> Acked-by: Michal Hocko <mhocko@suse.com> Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org> Acked-by: David Rientjes <rientjes@google.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* scripts/spelling.txt: add "overwritting" pattern and fix typo instancesMasahiro Yamada2017-02-281-1/+1
| | | | | | | | | | | Fix typos and add the following to the scripts/spelling.txt: overwritting||overwriting Link: http://lkml.kernel.org/r/1481573103-11329-29-git-send-email-yamada.masahiro@socionext.com Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* kprobes: move kprobe declarations to asm-generic/kprobes.hLuis R. Rodriguez2017-02-284-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Often all is needed is these small helpers, instead of compiler.h or a full kprobes.h. This is important for asm helpers, in fact even some asm/kprobes.h make use of these helpers... instead just keep a generic asm file with helpers useful for asm code with the least amount of clutter as possible. Likewise we need now to also address what to do about this file for both when architectures have CONFIG_HAVE_KPROBES, and when they do not. Then for when architectures have CONFIG_HAVE_KPROBES but have disabled CONFIG_KPROBES. Right now most asm/kprobes.h do not have guards against CONFIG_KPROBES, this means most architecture code cannot include asm/kprobes.h safely. Correct this and add guards for architectures missing them. Additionally provide architectures that not have kprobes support with the default asm-generic solution. This lets us force asm/kprobes.h on the header include/linux/kprobes.h always, but most importantly we can now safely include just asm/kprobes.h on architecture code without bringing the full kitchen sink of header files. Two architectures already provided a guard against CONFIG_KPROBES on its kprobes.h: sh, arch. The rest of the architectures needed gaurds added. We avoid including any not-needed headers on asm/kprobes.h unless kprobes have been enabled. In a subsequent atomic change we can try now to remove compiler.h from include/linux/kprobes.h. During this sweep I've also identified a few architectures defining a common macro needed for both kprobes and ftrace, that of the definition of the breakput instruction up. Some refer to this as BREAKPOINT_INSTRUCTION. This must be kept outside of the #ifdef CONFIG_KPROBES guard. [mcgrof@kernel.org: fix arm64 build] Link: http://lkml.kernel.org/r/CAB=NE6X1WMByuARS4mZ1g9+W=LuVBnMDnh_5zyN0CLADaVh=Jw@mail.gmail.com [sfr@canb.auug.org.au: fixup for kprobes declarations moving] Link: http://lkml.kernel.org/r/20170214165933.13ebd4f4@canb.auug.org.au Link: http://lkml.kernel.org/r/20170203233139.32682-1-mcgrof@kernel.org Signed-off-by: Luis R. Rodriguez <mcgrof@kernel.org> Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Acked-by: Masami Hiramatsu <mhiramat@kernel.org> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Masami Hiramatsu <mhiramat@kernel.org> Cc: Ananth N Mavinakayanahalli <ananth@linux.vnet.ibm.com> Cc: Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com> Cc: David S. Miller <davem@davemloft.net> Cc: Ingo Molnar <mingo@kernel.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Andy Lutomirski <luto@kernel.org> Cc: Steven Rostedt <rostedt@goodmis.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* Merge tag 'for-next-dma_ops' of ↵Linus Torvalds2017-02-253-14/+13
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/dledford/rdma Pull rdma DMA mapping updates from Doug Ledford: "Drop IB DMA mapping code and use core DMA code instead. Bart Van Assche noted that the ib DMA mapping code was significantly similar enough to the core DMA mapping code that with a few changes it was possible to remove the IB DMA mapping code entirely and switch the RDMA stack to use the core DMA mapping code. This resulted in a nice set of cleanups, but touched the entire tree and has been kept separate for that reason." * tag 'for-next-dma_ops' of git://git.kernel.org/pub/scm/linux/kernel/git/dledford/rdma: (37 commits) IB/rxe, IB/rdmavt: Use dma_virt_ops instead of duplicating it IB/core: Remove ib_device.dma_device nvme-rdma: Switch from dma_device to dev.parent RDS: net: Switch from dma_device to dev.parent IB/srpt: Modify a debug statement IB/srp: Switch from dma_device to dev.parent IB/iser: Switch from dma_device to dev.parent IB/IPoIB: Switch from dma_device to dev.parent IB/rxe: Switch from dma_device to dev.parent IB/vmw_pvrdma: Switch from dma_device to dev.parent IB/usnic: Switch from dma_device to dev.parent IB/qib: Switch from dma_device to dev.parent IB/qedr: Switch from dma_device to dev.parent IB/ocrdma: Switch from dma_device to dev.parent IB/nes: Remove a superfluous assignment statement IB/mthca: Switch from dma_device to dev.parent IB/mlx5: Switch from dma_device to dev.parent IB/mlx4: Switch from dma_device to dev.parent IB/i40iw: Remove a superfluous assignment statement IB/hns: Switch from dma_device to dev.parent ...
| * treewide: Consolidate get_dma_ops() implementationsBart Van Assche2017-01-241-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Introduce a new architecture-specific get_arch_dma_ops() function that takes a struct bus_type * argument. Add get_dma_ops() in <linux/dma-mapping.h>. Signed-off-by: Bart Van Assche <bart.vanassche@sandisk.com> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com> Cc: David Woodhouse <dwmw2@infradead.org> Cc: Juergen Gross <jgross@suse.com> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Ingo Molnar <mingo@redhat.com> Cc: linux-arch@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: Russell King <linux@armlinux.org.uk> Cc: x86@kernel.org Signed-off-by: Doug Ledford <dledford@redhat.com>
| * treewide: Move dma_ops from struct dev_archdata into struct deviceBart Van Assche2017-01-243-7/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some but not all architectures provide set_dma_ops(). Move dma_ops from struct dev_archdata into struct device such that it becomes possible on all architectures to configure dma_ops per device. Signed-off-by: Bart Van Assche <bart.vanassche@sandisk.com> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com> Cc: David Woodhouse <dwmw2@infradead.org> Cc: Juergen Gross <jgross@suse.com> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Ingo Molnar <mingo@redhat.com> Cc: linux-arch@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: Russell King <linux@armlinux.org.uk> Cc: x86@kernel.org Signed-off-by: Doug Ledford <dledford@redhat.com>
| * treewide: Constify most dma_map_ops structuresBart Van Assche2017-01-243-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Most dma_map_ops structures are never modified. Constify these structures such that these can be write-protected. This patch has been generated as follows: git grep -l 'struct dma_map_ops' | xargs -d\\n sed -i \ -e 's/struct dma_map_ops/const struct dma_map_ops/g' \ -e 's/const struct dma_map_ops {/struct dma_map_ops {/g' \ -e 's/^const struct dma_map_ops;$/struct dma_map_ops;/' \ -e 's/const const struct dma_map_ops /const struct dma_map_ops /g'; sed -i -e 's/const \(struct dma_map_ops intel_dma_ops\)/\1/' \ $(git grep -l 'struct dma_map_ops intel_dma_ops'); sed -i -e 's/const \(struct dma_map_ops dma_iommu_ops\)/\1/' \ $(git grep -l 'struct dma_map_ops' | grep ^arch/powerpc); sed -i -e '/^struct vmd_dev {$/,/^};$/ s/const \(struct dma_map_ops[[:blank:]]dma_ops;\)/\1/' \ -e '/^static void vmd_setup_dma_ops/,/^}$/ s/const \(struct dma_map_ops \*dest\)/\1/' \ -e 's/const \(struct dma_map_ops \*dest = \&vmd->dma_ops\)/\1/' \ drivers/pci/host/*.c sed -i -e '/^void __init pci_iommu_alloc(void)$/,/^}$/ s/dma_ops->/intel_dma_ops./' arch/ia64/kernel/pci-dma.c sed -i -e 's/static const struct dma_map_ops sn_dma_ops/static struct dma_map_ops sn_dma_ops/' arch/ia64/sn/pci/pci_dma.c sed -i -e 's/(const struct dma_map_ops \*)//' drivers/misc/mic/bus/vop_bus.c Signed-off-by: Bart Van Assche <bart.vanassche@sandisk.com> Reviewed-by: Christoph Hellwig <hch@lst.de> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com> Cc: David Woodhouse <dwmw2@infradead.org> Cc: Juergen Gross <jgross@suse.com> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Ingo Molnar <mingo@redhat.com> Cc: linux-arch@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: Russell King <linux@armlinux.org.uk> Cc: x86@kernel.org Signed-off-by: Doug Ledford <dledford@redhat.com>
* | mm: wire up GFP flag passing in dma_alloc_from_contiguousLucas Stach2017-02-251-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The callers of the DMA alloc functions already provide the proper context GFP flags. Make sure to pass them through to the CMA allocator, to make the CMA compaction context aware. Link: http://lkml.kernel.org/r/20170127172328.18574-3-l.stach@pengutronix.de Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Acked-by: Vlastimil Babka <vbabka@suse.cz> Acked-by: Michal Hocko <mhocko@suse.com> Cc: Radim Krcmar <rkrcmar@redhat.com> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Will Deacon <will.deacon@arm.com> Cc: Chris Zankel <chris@zankel.net> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Alexander Graf <agraf@suse.com> Cc: Joonsoo Kim <iamjoonsoo.kim@lge.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* | Merge tag 'armsoc-dt64' of ↵Linus Torvalds2017-02-2466-1503/+4749
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM 64-bit DT updates from Arnd Bergmann: "ARM64 DT updates are fairly small this time, only two new SoCs and a handful of new machines get added, all of them similar to other hardware we already support. New SoC: - HiSilicon Kirin960/Hi3660 and HiKey960 development board - NXP LS1012a with three reference boards: http://www.nxp.com/products/microcontrollers-and-processors/arm-processors/qoriq-layerscape-arm-processors/qoriq-layerscape-1012a-low-power-communication-processor:LS1012A New development board: - Banana Pi M64, based on Allwinner A64: http://www.banana-pi.org/m64.html - SolidRun MACCHIATOBin based on Marvell Armada 8K: https://www.solid-run.com/marvell-armada-family/armada-8040-community-board/ - Broadcom BCM958712DxXMC NorthStar2 reference board (another one) A lot of platforms improve support for existing machines by adding extra devices for which a binding and driver is availabe: Allwinner: - MMC, USB ARM Juno: - Coresight, STM Broadcom: - NS2 GICv2m irqchip and PCIe Marvell: - Armada 3700 SPI, I2C, ethernet switch Mediatek: - MT8173 thermal NXP i.MX: - LS1046A thermal Qualcomm: - coresight on MSM8916, HDMI, WCNSS, SCM Renesas: - r8a779[56] thermal, powerdomain, ethernet, sound, pwm, can, can fd Rockchip: - thermal, eDP, pinctrl enhancements Samsung: - TM2 touchkey, Exynos5433 HDMI and power management improvements UniPhier: - SD reset, eMMC controller ZTE: - oppv2 cpufreq" * tag 'armsoc-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (110 commits) arm64: dts: qcom: Add msm8916 CoreSight components arm64: dts: marvell: adjust name of sd-mmc-gop clock in syscon arm64: allwinner: add BananaPi-M64 support arm64: allwinner: a64: add UART1 pin nodes arm64: allwinner: pine64: add MMC support arm64: allwinner: a64: Increase the MMC max frequency arm64: allwinner: a64: Add MMC pinctrl nodes arm64: allwinner: a64: Add MMC nodes dt-bindings: clockgen: Add compatible string for LS1012A Documentation: DT: add LS1012A compatible for SCFG and DCFG Documentation: DT: Add entry for FSL LS1012A RDB, FRDM, QDS boards arm64: dts: marvell: add generic-ahci compatibles for CP110 ahci arm64: tegra: Use symbolic reset identifiers arm64: dts: r8a7796: Mark EthernetAVB device node disabled arm64: dts: r8a7795: Mark EthernetAVB device node disabled arm64: dts: r8a7795: tidyup audma definition order arm64: dts: r8a7796: Link ARM GIC to clock and clock domain arm64: dts: r8a7795: Link ARM GIC to clock and clock domain arm64: dts: r8a7796: Add R-Car Gen3 thermal support arm64: dts: r8a7795: Add R-Car Gen3 thermal support ...
| * \ Merge tag 'mvebu-dt64-4.11-3' of git://git.infradead.org/linux-mvebu into ↵Arnd Bergmann2017-02-092-2/+2
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | next/dt64 Pull "mvebu dt for 4.11 (part 3)" from Gregory CLEMENT: adjust name of sd-mmc-gop clock in sysco for Armada 7K/8K * tag 'mvebu-dt64-4.11-3' of git://git.infradead.org/linux-mvebu: arm64: dts: marvell: adjust name of sd-mmc-gop clock in syscon
| | * | arm64: dts: marvell: adjust name of sd-mmc-gop clock in sysconThomas Petazzoni2017-01-312-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit adjusts the names of gatable clock #18 of the Marvell Armada CP110 system controller. This clock not only controls SD/MMC, but also the GOP (Group Of Ports) used for networking. So the clock is renamed to {cpm,cps}-sd-mmc-gop instead of {cpm,cps}-sd-mmc. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
| * | | Merge tag 'qcom-arm64-for-4.11-2' of ↵Arnd Bergmann2017-02-091-0/+240
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux into next/dt64 Pull "Qualcomm ARM64 Updates for v4.11 Part 2" from Andy Gross: * Add CoreSight nodes for MSM8916 * tag 'qcom-arm64-for-4.11-2' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux: arm64: dts: qcom: Add msm8916 CoreSight components
| | * | | arm64: dts: qcom: Add msm8916 CoreSight componentsIvan T. Ivanov2017-02-011-0/+240
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add initial set of CoreSight components found on Qualcomm msm8916 and apq8016 based platforms, including the DragonBoard 410c board. Signed-off-by: Ivan T. Ivanov <ivan.ivanov@linaro.org> Acked-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
| * | | | Merge tag 'sunxi-dt64-for-4.11' of ↵Arnd Bergmann2017-02-094-4/+297
| |\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into next/dt64 Pull "Allwinner arm64 changes for 4.11" from Maxime Ripard: Some patches related the arm64 Allwinner SoCs, most notably: - Support for the MMC - Suport for the USB and mUSB controllers - New boards: Bananapi M64 * tag 'sunxi-dt64-for-4.11' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux: arm64: allwinner: add BananaPi-M64 support arm64: allwinner: a64: add UART1 pin nodes arm64: allwinner: pine64: add MMC support arm64: allwinner: a64: Increase the MMC max frequency arm64: allwinner: a64: Add MMC pinctrl nodes arm64: allwinner: a64: Add MMC nodes arm64: dts: allwinner: Remove no longer used pinctrl/sun4i-a10.h header arm64: dts: enable the MUSB controller of Pine64 in host-only mode arm64: dts: add MUSB node to Allwinner A64 dtsi arm64: dts: allwinner: enable EHCI1, OHCI1 and USB PHY nodes in Pine64 arm64: dts: allwinner: sort the nodes in sun50i-a64-pine64.dts arm64: dts: allwinner: add USB1-related nodes of Allwinner A64
| | * | | | arm64: allwinner: add BananaPi-M64 supportAndre Przywara2017-01-302-0/+121
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Banana Pi M64 board is a typical single board computer based on the Allwinner A64 SoC. Aside from the usual peripherals it features eMMC storage, which is connected to the 8-bit capable SDHC2 controller. Also it has a soldered WiFi/Bluetooth chip, so we enable UART1 and SDHC1 as those two interfaces are connected to it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org>
| | * | | | arm64: allwinner: a64: add UART1 pin nodesAndre Przywara2017-01-301-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On many boards UART1 connects to a Bluetooth chip, so add the pinctrl nodes for the only pins providing access to that UART. That includes those pins for hardware flow control (RTS/CTS). Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org>
| | * | | | arm64: allwinner: pine64: add MMC supportAndre Przywara2017-01-301-0/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | All Pine64 boards connect an micro-SD card slot to the first MMC controller. Enable the respective DT node and specify the (always-on) regulator and card-detect pin. As a micro-SD slot does not feature a write-protect switch, we disable this feature. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org>
| | * | | | arm64: allwinner: a64: Increase the MMC max frequencyMaxime Ripard2017-01-301-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The eMMC controller seem to have a maximum frequency of 200MHz, while the regular MMC controllers are capped at 150MHz. Since older SoCs cannot go that high, we cannot change the default maximum frequency, but fortunately for us we have a property for that in the DT. This also has the side effect of allowing to use the MMC HS200 and SD SDR104 modes for the boards that support it (with either 1.2v or 1.8v IOs). Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Tested-by: Florian Vaussard <florian.vaussard@heig-vd.ch> Acked-by: Chen-Yu Tsai <wens@csie.org>
| | * | | | arm64: allwinner: a64: Add MMC pinctrl nodesMaxime Ripard2017-01-301-0/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The A64 only has a single set of pins for each MMC controller. Since we already have boards that require all of them, let's add them to the DTSI. Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Tested-by: Florian Vaussard <florian.vaussard@heig-vd.ch> Acked-by: Chen-Yu Tsai <wens@csie.org>
| | * | | | arm64: allwinner: a64: Add MMC nodesAndre Przywara2017-01-301-0/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The A64 has 3 MMC controllers, one of them being especially targeted to eMMC. Among other things, it has a data strobe signal and a 8 bits data width. The two other are more usual controllers that will have a 4 bits width at most and no data strobe signal, which limits it to more usual SD or MMC peripherals. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Tested-by: Florian Vaussard <florian.vaussard@heig-vd.ch> Acked-by: Chen-Yu Tsai <wens@csie.org>
| | * | | | arm64: dts: allwinner: Remove no longer used pinctrl/sun4i-a10.h headerChen-Yu Tsai2017-01-261-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | All dts files for the sunxi platform have been switched to the generic pinconf bindings. As a result, the sunxi specific pinctrl macros are no longer used. Remove the #include entry with the following command: sed -i -e '/pinctrl\/sun4i-a10.h/D' \ arch/arm64/boot/dts/allwinner/*.dts? Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
| | * | | | arm64: dts: enable the MUSB controller of Pine64 in host-only modeIcenowy Zheng2017-01-051-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A64 has a MUSB controller wired to the USB PHY 0, which is connected to the upper USB Type-A port of Pine64. As the port is a Type-A female port, enable it in host-only mode in the device tree, which makes devices with USB Type-A male port can work on this port (which is originally designed by Pine64 team). Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
| | * | | | arm64: dts: add MUSB node to Allwinner A64 dtsiIcenowy Zheng2017-01-051-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Allwinner A64 SoC has a MUSB controller like the one in A33, so add a node for it, just use the compatible of A33 MUSB. Host mode is tested to work properly on Pine64 and will be added into the device tree of Pine64 in next patch. Peripheral mode is also tested on Pine64, by changing dr_mode property of usb_otg node and use a non-standard USB Type-A to Type-A cable. Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
| | * | | | arm64: dts: allwinner: enable EHCI1, OHCI1 and USB PHY nodes in Pine64Icenowy Zheng2017-01-051-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pine64 have two USB Type-A ports, which are wired to the two ports of A64 USB PHY, and the lower port is the EHCI/OHCI1 port. Enable the necessary nodes to enable the lower USB port to work. Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
| | * | | | arm64: dts: allwinner: sort the nodes in sun50i-a64-pine64.dtsIcenowy Zheng2017-01-051-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In this dts file, uart0 node is put before i2c1. Move the uart0 node to the end to satisfy alphebetical order. Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
| | * | | | arm64: dts: allwinner: add USB1-related nodes of Allwinner A64Icenowy Zheng2017-01-051-0/+46
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Allwinner A64 have two HCI USB controllers, a OTG controller and a USB PHY device which have two ports. One of the port is wired to both a HCI USB controller and the OTG controller, which is currently not supported. The another one is only wired to a HCI controller, and the device node of OHCI/EHCI controller of the port can be added now. Also the A64 USB PHY device node is also added for the HCI controllers to work. Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
| * | | | | Merge tag 'samsung-dt64-4.11-2' of ↵Olof Johansson2017-01-315-15/+46
| |\ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/dt64 Samsung DeviceTree ARM64 update for v4.11, second round: 1. Use proper drive strengths on Exynos7. 2. Fix significant current leak on Exynos5433-based TM2/TM2E due to disabled regulator. 3. Add touchkey to TM2, set display clocks for Ultra HD modes. 4. Cleanups and minor fixes for Exynos5433, TM2 and TM2E. * tag 'samsung-dt64-4.11-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: arm64: dts: exynos: Add clocks to Exynos5433 LPASS module arm64: dts: exynos: set LDO7 regulator as always on arm64: dts: exynos: configure TV path clocks for Ultra HD modes arm64: dts: exynos: Fix drive strength of sd0_xxx pin definitions arm64: dts: exynos: Disable pull down for audio pins in Exynos5433 SoCs arm64: dts: exynos: Add TM2 touchkey node arm64: dts: exynos: Remove unneeded unit names in Exynos5433 nodes Signed-off-by: Olof Johansson <olof@lixom.net>
| | * | | | | arm64: dts: exynos: Add clocks to Exynos5433 LPASS moduleMarek Szyprowski2017-01-261-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Exynos5433 LPASS module requires some clocks for proper operation with power domain. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
| | * | | | | arm64: dts: exynos: set LDO7 regulator as always onAndrzej Hajda2017-01-241-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | LDO7 regulator beside DSI and HDMI provides power for core blocks in Exynos 5433 SoC. Disabling it causes serious current leak - about 200mA. Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
| | * | | | | arm64: dts: exynos: configure TV path clocks for Ultra HD modesAndrzej Hajda2017-01-231-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Ultra HD modes requires clock ticking at increased rate. Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
| | * | | | | arm64: dts: exynos: Fix drive strength of sd0_xxx pin definitionsPankaj Dubey2017-01-211-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As per Exynos7 datasheet FSYS1 pinctrl block does not support drive strength value of 0x3. This patch fixes this and update the correct drive strength for sd0_xxx pin definitions. Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com> Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
| | * | | | | arm64: dts: exynos: Disable pull down for audio pins in Exynos5433 SoCsMarek Szyprowski2017-01-201-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Common definition for I2S, PMC, SPDIF buses should not define any pull control for the individual pins. Correct this by changing samsung,pin-pud property to EXYNOS_PIN_PULL_NONE like it is defined for other Exynos SoCs. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
| | * | | | | arm64: dts: exynos: Add TM2 touchkey nodeJaechul Lee2017-01-191-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add DT node for TM2 touchkey device. Signed-off-by: Beomho Seo <beomho.seo@samsung.com> Signed-off-by: Jaechul Lee <jcsing.lee@samsung.com> Signed-off-by: Andi Shyti <andi.shyti@samsung.com> Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com> Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com> Tested-by: Chanwoo Choi <cw00.choi@samsung.com> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
| | * | | | | arm64: dts: exynos: Remove unneeded unit names in Exynos5433 nodesJavier Martinez Canillas2017-01-181-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The "samsung,exynos5433-mipi-video-phy" and "samsung,exynos5250-dwusb3" DT bindings don't specify a reg property for these nodes, so having a unit name leads to the following DTC warnings: Node /soc/video-phy@105c0710 has a unit name, but no reg property Node /soc/usb@15400000 has a unit name, but no reg property Node /soc/usb@15a00000 has a unit name, but no reg property Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
| * | | | | | Merge tag 'zte-dt64-4.11' of ↵Olof Johansson2017-01-301-0/+39
| |\ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt64 ZTE arm64 device tree update for 4.11: - Enable cpufreq support for zx296718 by using new operating-points-v2 bindings, so that it works with the generic cpufreq-dt driver. * tag 'zte-dt64-4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: arm64: dts: zx: support cpu-freq for zx296718 Signed-off-by: Olof Johansson <olof@lixom.net>
| | * | | | | | arm64: dts: zx: support cpu-freq for zx296718Baoyou Xie2017-01-031-0/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the CPU clock phandle in CPU's node and uses operating-points-v2 to register operating points. So it can be used by cpufreq-dt driver. Signed-off-by: Baoyou Xie <baoyou.xie@linaro.org> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Reviewed-by: Jun Nie <jun.nie@linaro.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| * | | | | | | Merge tag 'imx-dt64-4.11' of ↵Olof Johansson2017-01-307-1/+632
| |\ \ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt64 Freescale arm64 device tree updates for 4.11: - Add support for LS1012A SoC which is an ARMv8 SoC with single Cortex-A53 core, and the corresponding board support: FRDM, QDS and RDB. - Enable TMU (Thermal Monitoring Unit) support for LS1046A SoC. - Enable PCA9547 device for ls2080a-rdb board by removing 'disabled' status setting. * tag 'imx-dt64-4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: dt-bindings: clockgen: Add compatible string for LS1012A Documentation: DT: add LS1012A compatible for SCFG and DCFG Documentation: DT: Add entry for FSL LS1012A RDB, FRDM, QDS boards arm64: dts: ls1046a: Add TMU device tree support arm64: dts: Add support for FSL's LS1012A SoC arm64: dts: ls2080a-rdb: remove disable status of pca9547 Signed-off-by: Olof Johansson <olof@lixom.net>
| | * | | | | | | arm64: dts: ls1046a: Add TMU device tree supportJia Hongtao2017-01-101-0/+80
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Also add nodes and properties for thermal management support. Signed-off-by: Jia Hongtao <hongtao.jia@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| | * | | | | | | arm64: dts: Add support for FSL's LS1012A SoCHarninder Rai2017-01-105-0/+552
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | LS1012A features an advanced 64-bit ARM v8 CortexA53 processor with 32 KB of parity protected L1-I cache, 32 KB of ECC protected L1-D cache, as well as 256 KB of ECC protected L2 cache. Features summary One 64-bit ARM-v8 Cortex-A53 core with the following capabilities - Arranged as a cluster of one core supporting a 256 KB L2 cache with ECC protection - Speed up to 800 MHz - Parity-protected 32 KB L1 instruction cache and 32 KB L1 data cache - Neon SIMD engine - ARM v8 cryptography extensions One 16-bit DDR3L SDRAM memory controller ARM core-link CCI-400 cache coherent interconnect Cryptography acceleration (SEC) One Configurable x3 SerDes One PCI Express Gen2 controller, supporting x1 operation One serial ATA (SATA Gen 3.0) controller One USB 3.0/2.0 controller with integrated PHY Following levels of DTSI/DTS files have been created for the LS1012A SoC family: - fsl-ls1012a.dtsi: DTS-Include file for FSL LS1012A SoC. - fsl-ls1012a-frdm.dts: DTS file for FSL LS1012A FRDM board. - fsl-ls1012a-qds.dts: DTS file for FSL LS1012A QDS board. - fsl-ls1012a-rdb.dts: DTS file for FSL LS1012A RDB board. Signed-off-by: Harninder Rai <harninder.rai@nxp.com> Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| | * | | | | | | arm64: dts: ls2080a-rdb: remove disable status of pca9547Meng Yi2017-01-031-1/+0
| | |/ / / / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | pca9547 won't probed since its status property is disabled. while there are devices connected to it, we need remove status property to let ds3232 and adt7461 probed correctly. Signed-off-by: Meng Yi <meng.yi@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| * | | | | | | Merge tag 'mvebu-dt64-4.11-2' of git://git.infradead.org/linux-mvebu into ↵Olof Johansson2017-01-304-2/+143
| |\ \ \ \ \ \ \ | | | |_|_|_|/ / | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | next/dt64 mvebu dt64 for 4.11 (part 2) - Add a new Armada 8K based board: MACCHIATOBin - Enable AHCI on the Armada 7K/8K SoCs * tag 'mvebu-dt64-4.11-2' of git://git.infradead.org/linux-mvebu: arm64: dts: marvell: add generic-ahci compatibles for CP110 ahci arm64: dts: marvell: Add DT for MACCHIATOBin board Signed-off-by: Olof Johansson <olof@lixom.net>
| | * | | | | | arm64: dts: marvell: add generic-ahci compatibles for CP110 ahciRussell King2017-01-272-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Testing with an Armada 8040 board shows that adding the generic-ahci compatible to the CP110 AHCI nodes gets us working AHCI on the board. A previous patch series posted by Thomas Petazzoni was retracted when it was realised that the IP was supposed to be, and is, compatible with the standard register layout. Add this compatible. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Acked-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
| | * | | | | | arm64: dts: marvell: Add DT for MACCHIATOBin boardRussell King2017-01-192-0/+139
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a cut-down version of the DTS file for the community board MACCHIATOBin from SolidRun based on Marvell Armada 8040 SoC to suit the current mainlined Armada 8040 state. This brings support for mainly SATA, SPI flash and UART. The USB descriptions are included but are not tested in this form due to the lack of mainline GPIO. Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Acked-by: Rabeeh Khoury <rabeeh@solid-run.com> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
| * | | | | | | Merge tag 'tegra-for-4.11-arm64-dt' of ↵Olof Johansson2017-01-301-41/+45
| |\ \ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt64 arm64: tegra: Device tree changes for v4.11-rc1 This contains three patches that reintroduce symbolic identifiers for clocks, resets and mailboxes. These had been converted to literals in the v4.10 release to avoid complicated dependencies between branches. * tag 'tegra-for-4.11-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: arm64: tegra: Use symbolic reset identifiers arm64: tegra: Use symbolic clock identifiers arm64: tegra: Use symbolic HSP identifiers Signed-off-by: Olof Johansson <olof@lixom.net>
| | * | | | | | | arm64: tegra: Use symbolic reset identifiersThierry Reding2017-01-271-20/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that the corresponding device tree binding include has been merged, convert the DTS files to use symbolic names instead of numeric ones. Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | | | | | | arm64: tegra: Use symbolic clock identifiersThierry Reding2017-01-251-20/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that the corresponding device tree binding include has been merged, convert the DTS files to use symbolic names instead of numeric ones. Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | | | | | | arm64: tegra: Use symbolic HSP identifiersThierry Reding2017-01-251-1/+3
| | | |/ / / / / | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that the corresponding device tree binding include has been merged, convert the DTS files to use symbolic names instead of numeric ones. Signed-off-by: Thierry Reding <treding@nvidia.com>
| * | | | | | | Merge tag 'renesas-arm64-dt2-for-v4.11' of ↵Olof Johansson2017-01-303-66/+193
| |\ \ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt64 Second Round of Renesas ARM64 Based SoC DT Updates for v4.11 r8a779[56] SoCs: * Mark EthernetAVB device node disabled in DT for r8a779[56] SoCs - They are enabled as appropriate in board DT files * Link ARM GIC to clock and clock domain on r8a779[56] SoCs * Add thermal support r8a7795 SoC: * Tidyup audma definition order on r8a7795 SoC * Add missing power-domains property for SATA r8a7795/h3ulcb board: * Add MIX/CTU support as per support present in DT for r8a7796 * tag 'renesas-arm64-dt2-for-v4.11' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: arm64: dts: r8a7796: Mark EthernetAVB device node disabled arm64: dts: r8a7795: Mark EthernetAVB device node disabled arm64: dts: r8a7795: tidyup audma definition order arm64: dts: r8a7796: Link ARM GIC to clock and clock domain arm64: dts: r8a7795: Link ARM GIC to clock and clock domain arm64: dts: r8a7796: Add R-Car Gen3 thermal support arm64: dts: r8a7795: Add R-Car Gen3 thermal support arm64: dts: r8a7795: Add missing power-domains property for sata arm64: dts: h3ulcb: follow sound CTU/MIX supports Signed-off-by: Olof Johansson <olof@lixom.net>
| | * | | | | | | arm64: dts: r8a7796: Mark EthernetAVB device node disabledGeert Uytterhoeven2017-01-271-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Device nodes representing I/O devices should be marked disabled in the SoC-specific DTS, and overridden by board-specific DTSes where needed. Fixes: 8e8b9eaef8fb05d9 ("arm64: dts: renesas: r8a7796: Add EthernetAVB instance") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * | | | | | | arm64: dts: r8a7795: Mark EthernetAVB device node disabledGeert Uytterhoeven2017-01-271-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Device nodes representing I/O devices should be marked disabled in the SoC-specific DTS, and overridden by board-specific DTSes where needed. Fixes: a92843c8a6f8c039 ("arm64: dts: r8a7795: add EthernetAVB device node") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-30 21:12:45 +0100