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* arm64: Delete the space separator in __emit_instFangrui Song2020-04-151-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In assembly, many instances of __emit_inst(x) expand to a directive. In a few places __emit_inst(x) is used as an assembler macro argument. For example, in arch/arm64/kvm/hyp/entry.S ALTERNATIVE(nop, SET_PSTATE_PAN(1), ARM64_HAS_PAN, CONFIG_ARM64_PAN) expands to the following by the C preprocessor: alternative_insn nop, .inst (0xd500401f | ((0) << 16 | (4) << 5) | ((!!1) << 8)), 4, 1 Both comma and space are separators, with an exception that content inside a pair of parentheses/quotes is not split, so the clang integrated assembler splits the arguments to: nop, .inst, (0xd500401f | ((0) << 16 | (4) << 5) | ((!!1) << 8)), 4, 1 GNU as preprocesses the input with do_scrub_chars(). Its arm64 backend (along with many other non-x86 backends) sees: alternative_insn nop,.inst(0xd500401f|((0)<<16|(4)<<5)|((!!1)<<8)),4,1 # .inst(...) is parsed as one argument while its x86 backend sees: alternative_insn nop,.inst (0xd500401f|((0)<<16|(4)<<5)|((!!1)<<8)),4,1 # The extra space before '(' makes the whole .inst (...) parsed as two arguments The non-x86 backend's behavior is considered unintentional (https://sourceware.org/bugzilla/show_bug.cgi?id=25750). So drop the space separator inside `.inst (...)` to make the clang integrated assembler work. Suggested-by: Ilie Halip <ilie.halip@gmail.com> Signed-off-by: Fangrui Song <maskray@google.com> Reviewed-by: Mark Rutland <mark.rutland@arm.com> Link: https://github.com/ClangBuiltLinux/linux/issues/939 Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
* arm64: vdso: don't free unallocated pagesMark Rutland2020-04-151-12/+1
| | | | | | | | | | | | | | | | | | | The aarch32_vdso_pages[] array never has entries allocated in the C_VVAR or C_VDSO slots, and as the array is zero initialized these contain NULL. However in __aarch32_alloc_vdso_pages() when aarch32_alloc_kuser_vdso_page() fails we attempt to free the page whose struct page is at NULL, which is obviously nonsensical. This patch removes the erroneous page freeing. Fixes: 7c1deeeb0130 ("arm64: compat: VDSO setup for compat layer") Cc: <stable@vger.kernel.org> # 5.3.x- Cc: Vincenzo Frascino <vincenzo.frascino@arm.com> Acked-by: Will Deacon <will@kernel.org> Signed-off-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
* mm/memory_hotplug: add pgprot_t to mhp_paramsLogan Gunthorpe2020-04-111-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | devm_memremap_pages() is currently used by the PCI P2PDMA code to create struct page mappings for IO memory. At present, these mappings are created with PAGE_KERNEL which implies setting the PAT bits to be WB. However, on x86, an mtrr register will typically override this and force the cache type to be UC-. In the case firmware doesn't set this register it is effectively WB and will typically result in a machine check exception when it's accessed. Other arches are not currently likely to function correctly seeing they don't have any MTRR registers to fall back on. To solve this, provide a way to specify the pgprot value explicitly to arch_add_memory(). Of the arches that support MEMORY_HOTPLUG: x86_64, and arm64 need a simple change to pass the pgprot_t down to their respective functions which set up the page tables. For x86_32, set the page tables explicitly using _set_memory_prot() (seeing they are already mapped). For ia64, s390 and sh, reject anything but PAGE_KERNEL settings -- this should be fine, for now, seeing these architectures don't support ZONE_DEVICE. A check in __add_pages() is also added to ensure the pgprot parameter was set for all arches. Signed-off-by: Logan Gunthorpe <logang@deltatee.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Acked-by: David Hildenbrand <david@redhat.com> Acked-by: Michal Hocko <mhocko@suse.com> Acked-by: Dan Williams <dan.j.williams@intel.com> Cc: Andy Lutomirski <luto@kernel.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Borislav Petkov <bp@alien8.de> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Christoph Hellwig <hch@lst.de> Cc: Dave Hansen <dave.hansen@linux.intel.com> Cc: Eric Badger <ebadger@gigaio.com> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: Ingo Molnar <mingo@redhat.com> Cc: Jason Gunthorpe <jgg@ziepe.ca> Cc: Michael Ellerman <mpe@ellerman.id.au> Cc: Paul Mackerras <paulus@samba.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Will Deacon <will@kernel.org> Link: http://lkml.kernel.org/r/20200306170846.9333-7-logang@deltatee.com Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* mm/memory_hotplug: rename mhp_restrictions to mhp_paramsLogan Gunthorpe2020-04-111-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | The mhp_restrictions struct really doesn't specify anything resembling a restriction anymore so rename it to be mhp_params as it is a list of extended parameters. Signed-off-by: Logan Gunthorpe <logang@deltatee.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Reviewed-by: David Hildenbrand <david@redhat.com> Reviewed-by: Dan Williams <dan.j.williams@intel.com> Acked-by: Michal Hocko <mhocko@suse.com> Cc: Andy Lutomirski <luto@kernel.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Borislav Petkov <bp@alien8.de> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Christoph Hellwig <hch@lst.de> Cc: Dave Hansen <dave.hansen@linux.intel.com> Cc: Eric Badger <ebadger@gigaio.com> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: Ingo Molnar <mingo@redhat.com> Cc: Jason Gunthorpe <jgg@ziepe.ca> Cc: Michael Ellerman <mpe@ellerman.id.au> Cc: Paul Mackerras <paulus@samba.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Will Deacon <will@kernel.org> Link: http://lkml.kernel.org/r/20200306170846.9333-3-logang@deltatee.com Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* mm/vma: introduce VM_ACCESS_FLAGSAnshuman Khandual2020-04-111-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are many places where all basic VMA access flags (read, write, exec) are initialized or checked against as a group. One such example is during page fault. Existing vma_is_accessible() wrapper already creates the notion of VMA accessibility as a group access permissions. Hence lets just create VM_ACCESS_FLAGS (VM_READ|VM_WRITE|VM_EXEC) which will not only reduce code duplication but also extend the VMA accessibility concept in general. Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Reviewed-by: Vlastimil Babka <vbabka@suse.cz> Cc: Russell King <linux@armlinux.org.uk> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Mark Salter <msalter@redhat.com> Cc: Nick Hu <nickhu@andestech.com> Cc: Ley Foon Tan <ley.foon.tan@intel.com> Cc: Michael Ellerman <mpe@ellerman.id.au> Cc: Heiko Carstens <heiko.carstens@de.ibm.com> Cc: Yoshinori Sato <ysato@users.sourceforge.jp> Cc: Guan Xuetao <gxt@pku.edu.cn> Cc: Dave Hansen <dave.hansen@linux.intel.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Rob Springer <rspringer@google.com> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Geert Uytterhoeven <geert@linux-m68k.org> Link: http://lkml.kernel.org/r/1583391014-8170-3-git-send-email-anshuman.khandual@arm.com Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* mm/vma: define a default value for VM_DATA_DEFAULT_FLAGSAnshuman Khandual2020-04-111-3/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are many platforms with exact same value for VM_DATA_DEFAULT_FLAGS This creates a default value for VM_DATA_DEFAULT_FLAGS in line with the existing VM_STACK_DEFAULT_FLAGS. While here, also define some more macros with standard VMA access flag combinations that are used frequently across many platforms. Apart from simplification, this reduces code duplication as well. Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Reviewed-by: Vlastimil Babka <vbabka@suse.cz> Acked-by: Geert Uytterhoeven <geert@linux-m68k.org> Cc: Richard Henderson <rth@twiddle.net> Cc: Vineet Gupta <vgupta@synopsys.com> Cc: Russell King <linux@armlinux.org.uk> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Mark Salter <msalter@redhat.com> Cc: Guo Ren <guoren@kernel.org> Cc: Yoshinori Sato <ysato@users.sourceforge.jp> Cc: Brian Cain <bcain@codeaurora.org> Cc: Tony Luck <tony.luck@intel.com> Cc: Michal Simek <monstr@monstr.eu> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Paul Burton <paulburton@kernel.org> Cc: Nick Hu <nickhu@andestech.com> Cc: Ley Foon Tan <ley.foon.tan@intel.com> Cc: Jonas Bonn <jonas@southpole.se> Cc: "James E.J. Bottomley" <James.Bottomley@HansenPartnership.com> Cc: Michael Ellerman <mpe@ellerman.id.au> Cc: Paul Walmsley <paul.walmsley@sifive.com> Cc: Heiko Carstens <heiko.carstens@de.ibm.com> Cc: Rich Felker <dalias@libc.org> Cc: "David S. Miller" <davem@davemloft.net> Cc: Guan Xuetao <gxt@pku.edu.cn> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Jeff Dike <jdike@addtoit.com> Cc: Chris Zankel <chris@zankel.net> Link: http://lkml.kernel.org/r/1583391014-8170-2-git-send-email-anshuman.khandual@arm.com Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* mm: hugetlb: optionally allocate gigantic hugepages using cmaRoman Gushchin2020-04-111-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 944d9fec8d7a ("hugetlb: add support for gigantic page allocation at runtime") has added the run-time allocation of gigantic pages. However it actually works only at early stages of the system loading, when the majority of memory is free. After some time the memory gets fragmented by non-movable pages, so the chances to find a contiguous 1GB block are getting close to zero. Even dropping caches manually doesn't help a lot. At large scale rebooting servers in order to allocate gigantic hugepages is quite expensive and complex. At the same time keeping some constant percentage of memory in reserved hugepages even if the workload isn't using it is a big waste: not all workloads can benefit from using 1 GB pages. The following solution can solve the problem: 1) On boot time a dedicated cma area* is reserved. The size is passed as a kernel argument. 2) Run-time allocations of gigantic hugepages are performed using the cma allocator and the dedicated cma area In this case gigantic hugepages can be allocated successfully with a high probability, however the memory isn't completely wasted if nobody is using 1GB hugepages: it can be used for pagecache, anon memory, THPs, etc. * On a multi-node machine a per-node cma area is allocated on each node. Following gigantic hugetlb allocation are using the first available numa node if the mask isn't specified by a user. Usage: 1) configure the kernel to allocate a cma area for hugetlb allocations: pass hugetlb_cma=10G as a kernel argument 2) allocate hugetlb pages as usual, e.g. echo 10 > /sys/kernel/mm/hugepages/hugepages-1048576kB/nr_hugepages If the option isn't enabled or the allocation of the cma area failed, the current behavior of the system is preserved. x86 and arm-64 are covered by this patch, other architectures can be trivially added later. The patch contains clean-ups and fixes proposed and implemented by Aslan Bakirov and Randy Dunlap. It also contains ideas and suggestions proposed by Rik van Riel, Michal Hocko and Mike Kravetz. Thanks! Signed-off-by: Roman Gushchin <guro@fb.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Tested-by: Andreas Schaufler <andreas.schaufler@gmx.de> Acked-by: Mike Kravetz <mike.kravetz@oracle.com> Acked-by: Michal Hocko <mhocko@kernel.org> Cc: Aslan Bakirov <aslan@fb.com> Cc: Randy Dunlap <rdunlap@infradead.org> Cc: Rik van Riel <riel@surriel.com> Cc: Joonsoo Kim <js1304@gmail.com> Link: http://lkml.kernel.org/r/20200407163840.92263-3-guro@fb.com Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* Merge tag 'arm64-fixes' of ↵Linus Torvalds2020-04-095-27/+12
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux Pull arm64 fixes from Catalin Marinas: - Ensure that the compiler and linker versions are aligned so that ld doesn't complain about not understanding a .note.gnu.property section (emitted when pointer authentication is enabled). - Force -mbranch-protection=none when the feature is not enabled, in case a compiler may choose a different default value. - Remove CONFIG_DEBUG_ALIGN_RODATA. It was never in defconfig and rarely enabled. - Fix checking 16-bit Thumb-2 instructions checking mask in the emulation of the SETEND instruction (it could match the bottom half of a 32-bit Thumb-2 instruction). * tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: arm64: armv8_deprecated: Fix undef_hook mask for thumb setend arm64: remove CONFIG_DEBUG_ALIGN_RODATA feature arm64: Always force a branch protection mode when the compiler has one arm64: Kconfig: ptrauth: Add binutils version check to fix mismatch init/kconfig: Add LD_VERSION Kconfig
| * arm64: armv8_deprecated: Fix undef_hook mask for thumb setendFredrik Strupe2020-04-081-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For thumb instructions, call_undef_hook() in traps.c first reads a u16, and if the u16 indicates a T32 instruction (u16 >= 0xe800), a second u16 is read, which then makes up the the lower half-word of a T32 instruction. For T16 instructions, the second u16 is not read, which makes the resulting u32 opcode always have the upper half set to 0. However, having the upper half of instr_mask in the undef_hook set to 0 masks out the upper half of all thumb instructions - both T16 and T32. This results in trapped T32 instructions with the lower half-word equal to the T16 encoding of setend (b650) being matched, even though the upper half-word is not 0000 and thus indicates a T32 opcode. An example of such a T32 instruction is eaa0b650, which should raise a SIGILL since T32 instructions with an eaa prefix are unallocated as per Arm ARM, but instead works as a SETEND because the second half-word is set to b650. This patch fixes the issue by extending instr_mask to include the upper u32 half, which will still match T16 instructions where the upper half is 0, but not T32 instructions. Fixes: 2d888f48e056 ("arm64: Emulate SETEND for AArch32 tasks") Cc: <stable@vger.kernel.org> # 4.0.x- Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Fredrik Strupe <fredrik@strupe.net> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
| * arm64: remove CONFIG_DEBUG_ALIGN_RODATA featureArd Biesheuvel2020-04-012-24/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When CONFIG_DEBUG_ALIGN_RODATA is enabled, kernel segments mapped with different permissions (r-x for .text, r-- for .rodata, rw- for .data, etc) are rounded up to 2 MiB so they can be mapped more efficiently. In particular, it permits the segments to be mapped using level 2 block entries when using 4k pages, which is expected to result in less TLB pressure. However, the mappings for the bulk of the kernel will use level 2 entries anyway, and the misaligned fringes are organized such that they can take advantage of the contiguous bit, and use far fewer level 3 entries than would be needed otherwise. This makes the value of this feature dubious at best, and since it is not enabled in defconfig or in the distro configs, it does not appear to be in wide use either. So let's just remove it. Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Acked-by: Mark Rutland <mark.rutland@arm.com> Acked-by: Will Deacon <will@kernel.org> Acked-by: Laura Abbott <labbott@kernel.org> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
| * arm64: Always force a branch protection mode when the compiler has oneMark Brown2020-04-011-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Compilers with branch protection support can be configured to enable it by default, it is likely that distributions will do this as part of deploying branch protection system wide. As well as the slight overhead from having some extra NOPs for unused branch protection features this can cause more serious problems when the kernel is providing pointer authentication to userspace but not built for pointer authentication itself. In that case our switching of keys for userspace can affect the kernel unexpectedly, causing pointer authentication instructions in the kernel to corrupt addresses. To ensure that we get consistent and reliable behaviour always explicitly initialise the branch protection mode, ensuring that the kernel is built the same way regardless of the compiler defaults. Fixes: 7503197562567 (arm64: add basic pointer authentication support) Reported-by: Szabolcs Nagy <szabolcs.nagy@arm.com> Signed-off-by: Mark Brown <broonie@kernel.org> Cc: stable@vger.kernel.org [catalin.marinas@arm.com: remove Kconfig option in favour of Makefile check] Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
| * arm64: Kconfig: ptrauth: Add binutils version check to fix mismatchAmit Daniel Kachhap2020-04-011-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Recent addition of ARM64_PTR_AUTH exposed a mismatch issue with binutils. 9.1+ versions of gcc inserts a section note .note.gnu.property but this can be used properly by binutils version greater than 2.33.1. If older binutils are used then the following warnings are generated, aarch64-linux-ld: warning: arch/arm64/kernel/vdso/vgettimeofday.o: unsupported GNU_PROPERTY_TYPE (5) type: 0xc0000000 aarch64-linux-objdump: warning: arch/arm64/lib/csum.o: unsupported GNU_PROPERTY_TYPE (5) type: 0xc0000000 aarch64-linux-nm: warning: .tmp_vmlinux1: unsupported GNU_PROPERTY_TYPE (5) type: 0xc0000000 This patch enables ARM64_PTR_AUTH when gcc and binutils versions are compatible with each other. Older gcc which do not insert such section continue to work as before. This scenario may not occur with clang as a recent commit 3b446c7d27ddd06 ("arm64: Kconfig: verify binutils support for ARM64_PTR_AUTH") masks binutils version lesser then 2.34. Reported-by: kbuild test robot <lkp@intel.com> Suggested-by: Vincenzo Frascino <Vincenzo.Frascino@arm.com> Signed-off-by: Amit Daniel Kachhap <amit.kachhap@arm.com> [catalin.marinas@arm.com: slight adjustment to the comment] Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
* | Merge tag 'for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mst/vhostLinus Torvalds2020-04-081-2/+0
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull virtio updates from Michael Tsirkin: - Some bug fixes - The new vdpa subsystem with two first drivers * tag 'for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mst/vhost: virtio-balloon: Revert "virtio-balloon: Switch back to OOM handler for VIRTIO_BALLOON_F_DEFLATE_ON_OOM" vdpa: move to drivers/vdpa virtio: Intel IFC VF driver for VDPA vdpasim: vDPA device simulator vhost: introduce vDPA-based backend virtio: introduce a vDPA based transport vDPA: introduce vDPA bus vringh: IOTLB support vhost: factor out IOTLB vhost: allow per device message handler vhost: refine vhost and vringh kconfig virtio-balloon: Switch back to OOM handler for VIRTIO_BALLOON_F_DEFLATE_ON_OOM virtio-net: Introduce hash report feature virtio-net: Introduce RSS receive steering feature virtio-net: Introduce extended RSC feature tools/virtio: option to build an out of tree module
| * | vhost: refine vhost and vringh kconfigJason Wang2020-04-011-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, CONFIG_VHOST depends on CONFIG_VIRTUALIZATION. But vhost is not necessarily for VM since it's a generic userspace and kernel communication protocol. Such dependency may prevent archs without virtualization support from using vhost. To solve this, a dedicated vhost menu is created under drivers so CONIFG_VHOST can be decoupled out of CONFIG_VIRTUALIZATION. While at it, also squash Kconfig.vringh into vhost Kconfig file. This avoids the trick of conditional inclusion from VOP or CAIF. Then it will be easier to introduce new vringh users and common dependency for both vringh and vhost. Signed-off-by: Jason Wang <jasowang@redhat.com> Link: https://lore.kernel.org/r/20200326140125.19794-2-jasowang@redhat.com Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* | | Merge tag 'random_for_linus' of ↵Linus Torvalds2020-04-051-0/+14
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tytso/random Pull /dev/random updates from Ted Ts'o: - Improve getrandom and /dev/random's support for those arm64 architecture variants that have RNG instructions. - Use batched output from CRNG instead of CPU's RNG instructions for better performance. - Miscellaneous bug fixes. * tag 'random_for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tytso/random: random: avoid warnings for !CONFIG_NUMA builds random: fix data races at timer_rand_state random: always use batched entropy for get_random_u{32,64} random: Make RANDOM_TRUST_CPU depend on ARCH_RANDOM arm64: add credited/trusted RNG support random: add arch_get_random_*long_early() random: split primary/secondary crng init paths
| * | | arm64: add credited/trusted RNG supportMark Rutland2020-02-281-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently arm64 doesn't initialize the primary CRNG in a (potentially) trusted manner as we only detect the presence of the RNG once secondary CPUs are up. Now that the core RNG code distinguishes the early initialization of the primary CRNG, we can implement arch_get_random_seed_long_early() to support this. This patch does so. Signed-off-by: Mark Rutland <mark.rutland@arm.com> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Mark Brown <broonie@kernel.org> Cc: Theodore Ts'o <tytso@mit.edu> Cc: Will Deacon <will@kernel.org> Link: https://lore.kernel.org/r/20200210130015.17664-4-mark.rutland@arm.com Signed-off-by: Theodore Ts'o <tytso@mit.edu>
* | | | Merge tag 'arm-dt-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/socLinus Torvalds2020-04-04174-441/+11545
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull ARM devicetree updates from Arnd Bergmann: "Most of the commits are for additional hardware support and minor fixes for existing machines for all the usual platforms: qcom, amlogic, at91, gemini, mediatek, ti, socfpga, i.mx, layerscape, uniphier, rockchip, exynos, ux500, mvebu, tegra, stm32, renesas, sunxi, broadcom, omap, and versatile. The conversion of binding files to machine-readable yaml format continues, along with fixes found during the validation. Andre Przywara takes over maintainership for the old Calxeda Highbank platform and provides a number of updates. The OMAP2+ platforms see a continued move from platform data into dts files, for many devices that relied on a mix of auxiliary data in addition to the DT description A moderate number of new SoCs and machines are added, here is a full list: - Two new Qualcomm SoCs with their evaluation boards: Snapdragon 865 (SM8250) is the current high-end phone chip, and IPQ6018 is a new WiFi-6 router chip. - Mediatek MT8516 application processor SoC for voice assistants, along with the "pumpkin" development board - NXP i.MX8M Plus SoC, a variant of the popular i.MX8M, along with an evaluation board. - Kontron "sl28" board family based on NXP LS1028A - Eleven variations of the new i.MX6 TechNexion Pico board, combining the "dwarf", "hobbit", "nymph" and "pi" baseboards with i.MX6/i.MX7 SoM carriers - Three additional variants of the Toradex Colibri board family, all based on versions of the NXP i.MX7. - The Pinebook Pro laptop based on Rockchip RK3399 - Samsung S7710 Galaxy Xcover 2, a 2013 vintage Android phone based on the ST-Ericsson u8500 platform - DH Electronics DHCOM SoM and PDK2 rev. 400 carrier based on STMicroelectronics stm32mp157 - Renesas M3ULCB starter kit for R-Car M3-W+ - Hoperun HiHope development board with Renesas RZ/G2M - Pine64 PineTab tablet and PinePhone phone, both based on Allwinner A64 - Linutronix Testbox v2 for the Lamobo R1 router, based on Allwinner A20 - PocketBook Touch Lux 3 ebook reader, based on Allwinner A13" * tag 'arm-dt-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (520 commits) ARM: dts: ux500: Fix missing node renames arm64: dts: Revert "specify console via command line" MAINTAINERS: Update Calxeda Highbank maintainership arm: dts: calxeda: Group port-phys and sgpio-gpio items arm: dts: calxeda: Fix interrupt grouping arm: dts: calxeda: Provide UART clock arm: dts: calxeda: Basic DT file fixes arm64: dts: specify console via command line ARM: dts: at91: sama5d27_wlsom1_ek: add USB device node ARM: dts: gemini: Add thermal zone to DIR-685 ARM: dts: gemini: Rename IDE nodes ARM: socfpga: arria10: Add ptp_ref clock to ethernet nodes arm64: dts: ti: k3-j721e-mcu: add scm node and phy-gmii-sel nodes arm64: dts: ti: k3-am65-mcu: add phy-gmii-sel node arm64: dts: ti: k3-am65-mcu: Add DMA entries for ADC arm64: dts: ti: k3-am65-main: Add DMA entries for main_spi0 arm64: dts: ti: k3-j721e-mcu-wakeup: Add DMA entries for ADC arm64: dts: ti: k3-am65: Add clocks to dwc3 nodes arm64: dts: meson-g12b-odroid-n2: add SPIFC controller node arm64: dts: khadas-vim3: add SPIFC controller node ...
| * \ \ \ Merge branch 'arm/late' into arm/dtArnd Bergmann2020-04-0326-69/+2860
| |\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Include originally "late" updates for OMAP and Qualcomm, now that it's not late any more. * arm/late: (122 commits) ARM: OMAP2+: Drop legacy platform data for ti81xx edma ARM: dts: Configure interconnect target module for ti816x edma ARM: dts: Configure interconnect target module for dm814x tptc3 ARM: dts: Configure interconnect target module for dm814x tptc2 ARM: dts: Configure interconnect target module for dm814x tptc1 ARM: dts: Configure interconnect target module for dm814x tptc0 ARM: dts: Configure interconnect target module for dm814x tpcc ARM: OMAP2+: Drop legacy platform data for dm814x cpsw ARM: dts: Configure interconnect target module for dm814x cpsw clk: ti: Fix dm814x clkctrl for ethernet arm64: dts: qcom: sdm845-mtp: Relocate remoteproc firmware arm64: dts: sdm845: add IPA information arm64: dts: qcom: db845c: add analog audio support arm64: dts: qcom: sdm845: add pinctrl nodes for quat i2s arm64: dts: qcom: c630: Enable audio support arm64: dts: qcom: sdm845: add apr nodes arm64: dts: qcom: sdm845: add slimbus nodes arm64: dts: qcom: sc7180: Update reg names for SDHC arm64: dts: qcom: qcs404: Enable CQE support for eMMC arm64: dts: msm8916: Add fastrpc node ...
| | * \ \ \ Merge tag 'qcom-arm64-for-5.7' of ↵Arnd Bergmann2020-03-2626-69/+2860
| | |\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/late Qualcomm ARM64 DT updates for v5.7 This brings initial support for the SM8250 and IPQ6018 platforms. SDM845 gets audio, PCIe and IP-accelerator support, and the interconnect providers are refactored. The Lenovo Yoga C630 has audio enabled and the DB845c has PCIe, analog audio and low-speed interfaces enabled. The SDM845 MTP has its display enabled and firmware location updated to match linux-firmware. SC7180 gains CPU topology and power properties. Interconnect providers, eMMC, SD-card, multimedia clocks, display, Bluetooth, Venus are added. Critical trip points are added as well as various fixes. For MSM8916 FastRPC support is added, ETM power management and reserved memory for Samsung A2015 are corrected. MSM8996 switches to generic QMP phy driver for its UFS support. MSM8998 temporarily disables part of Coresight to boot without clk_ignore_unused. CEQ for eMMC on QCS404 is enabled. Fixes throughout the platforms to fix binding compliance, correct compatibles for SDHCI nodes and add gpio-ranges. * tag 'qcom-arm64-for-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (56 commits) arm64: dts: qcom: sdm845-mtp: Relocate remoteproc firmware arm64: dts: sdm845: add IPA information arm64: dts: qcom: db845c: add analog audio support arm64: dts: qcom: sdm845: add pinctrl nodes for quat i2s arm64: dts: qcom: c630: Enable audio support arm64: dts: qcom: sdm845: add apr nodes arm64: dts: qcom: sdm845: add slimbus nodes arm64: dts: qcom: sc7180: Update reg names for SDHC arm64: dts: qcom: qcs404: Enable CQE support for eMMC arm64: dts: msm8916: Add fastrpc node arm64: dts: qcom: sm8250: Add sm8250 dts file arm64: dts: qcom: msm8998-mtp: Disable funnel 4 and 5 arm64: dts: qcom: db845c: add Low speed expansion i2c and spi nodes arm64: dts: qcom: apq8016-sbc: Remove wrong regulator supply arm64: dts: qcom: sc7180: Added critical trip point Thermal-zones node arm64: dts: qcom: msm8998: Fix cpu compatible arm64: dts: qcom: sc7180: Add OSM L3 interconnect provider arm64: dts: qcom: sdm845: Add OSM L3 interconnect provider arm64: dts: sc7180: Add interconnect provider DT nodes arm64: dts: qcom: msm8996: Use generic QMP driver for UFS ... Link: https://lore.kernel.org/r/20200318043823.GA470201@yoga Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| | | * | | | arm64: dts: qcom: sdm845-mtp: Relocate remoteproc firmwareBjorn Andersson2020-03-171-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update the firmware-name of the remoteproc nodes to mimic the firmware structure on other 845 devices. Reviewed-by: Sibi Sankar <sibis@codeaurora.org> Link: https://lore.kernel.org/r/20200302020757.551483-1-bjorn.andersson@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
| | | * | | | arm64: dts: sdm845: add IPA informationAlex Elder2020-03-172-0/+54
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add IPA-related nodes and definitions to "sdm845.dtsi". Signed-off-by: Alex Elder <elder@linaro.org> Link: https://lore.kernel.org/r/20200313115237.10491-2-elder@linaro.org [bjorn: Moved modem-init to cheza.dtsi] Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
| | | * | | | arm64: dts: qcom: db845c: add analog audio supportSrinivas Kandagatla2020-03-151-0/+158
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support to Analog audio via WSA881x speakers. Reviewed-by: Vinod Koul <vkoul@kernel.org> Tested-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Link: https://lore.kernel.org/r/20200312143024.11059-6-srinivas.kandagatla@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
| | | * | | | arm64: dts: qcom: sdm845: add pinctrl nodes for quat i2sSrinivas Kandagatla2020-03-151-0/+136
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add pinctrl nodes required for QUAT I2S Reviewed-by: Vinod Koul <vkoul@kernel.org> Tested-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Link: https://lore.kernel.org/r/20200312143024.11059-5-srinivas.kandagatla@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
| | | * | | | arm64: dts: qcom: c630: Enable audio supportSrinivas Kandagatla2020-03-151-0/+114
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch add support to audio via WSA881x Speakers and Headset. Reviewed-by: Vinod Koul <vkoul@kernel.org> Tested-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Link: https://lore.kernel.org/r/20200312143024.11059-4-srinivas.kandagatla@linaro.org [bjorn: Sorted nodes] Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
| | | * | | | arm64: dts: qcom: sdm845: add apr nodesSrinivas Kandagatla2020-03-151-0/+52
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Reviewed-by: Vinod Koul <vkoul@kernel.org> Tested-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Link: https://lore.kernel.org/r/20200312143024.11059-3-srinivas.kandagatla@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
| | | * | | | arm64: dts: qcom: sdm845: add slimbus nodesSrinivas Kandagatla2020-03-151-0/+93
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Reviewed-by: Vinod Koul <vkoul@kernel.org> Tested-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Link: https://lore.kernel.org/r/20200312143024.11059-2-srinivas.kandagatla@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
| | | * | | | arm64: dts: qcom: sc7180: Update reg names for SDHCVeerabhadrarao Badiganti2020-03-121-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove the redundant _mem suffix for SDHC reg names. For SDcard instance, no need supply reg names since hc reg map is accessed with index. So remove reg names for SDcard. Signed-off-by: Veerabhadrarao Badiganti <vbadigan@codeaurora.org> Link: https://lore.kernel.org/r/1583946863-24308-2-git-send-email-vbadigan@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
| | | * | | | arm64: dts: qcom: qcs404: Enable CQE support for eMMCVeerabhadrarao Badiganti2020-03-122-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enabling CQE support for eMMC by supplying the correct reg name and flag which indicates CQE support. Also remove the redundant _mem suffix for reg names. Signed-off-by: Veerabhadrarao Badiganti <vbadigan@codeaurora.org> Link: https://lore.kernel.org/r/1583946863-24308-1-git-send-email-vbadigan@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
| | | * | | | arm64: dts: msm8916: Add fastrpc nodeSrinivas Kandagatla2020-03-121-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add fastrpc device node for adsp with one compute bank. Tested-by: Loic Poulain <loic.poulain@linaro.org> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Link: https://lore.kernel.org/r/20200310175452.7503-1-srinivas.kandagatla@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
| | | * | | | arm64: dts: qcom: sm8250: Add sm8250 dts fileVenkata Narendra Kumar Gutta2020-03-103-0/+474
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add sm8250 devicetree file for SM8250 SoC and SM8250 MTP platform. This file adds the basic nodes like cpu, psci and other required configuration for booting up to the serial console. Signed-off-by: Venkata Narendra Kumar Gutta <vnkgutta@codeaurora.org> Signed-off-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20200310050910.506854-1-vkoul@kernel.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
| | | * | | | arm64: dts: qcom: msm8998-mtp: Disable funnel 4 and 5Bjorn Andersson2020-03-091-2/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Disable Coresight funnel 4 and 5, for now, as these causes the MTP to crash when clock late_initcall disables unused clocks. Reviewed-by: Jeffrey Hugo <jeffrey.l.hugo@gmail.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20200308055445.1992189-1-bjorn.andersson@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
| | | * | | | arm64: dts: qcom: db845c: add Low speed expansion i2c and spi nodesSrinivas Kandagatla2020-03-071-0/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support UART0, I2C0, I2C1 and SPI0 available on Low Speed expansion connector. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Link: https://lore.kernel.org/r/20200305145344.14670-5-srinivas.kandagatla@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
| | | * | | | arm64: dts: qcom: apq8016-sbc: Remove wrong regulator supplyLoic Poulain2020-03-071-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As specified in the smd-rpm-regulator binding and confirmed by the pm8616 device specification, there is no vdd_l5. l5 vdd comes from vdd_l4_l5_l6. Fix that (though it does not cause any issue since the supply is not requested). Signed-off-by: Loic Poulain <loic.poulain@linaro.org> Link: https://lore.kernel.org/r/1583516368-29593-1-git-send-email-loic.poulain@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
| | | * | | | arm64: dts: qcom: sc7180: Added critical trip point Thermal-zones nodeRajeshwari2020-03-061-0/+78
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To enable kernel critical shutdown feature added critical trip point to all non CPU sensors to perform shutdown in orderly manner. Reviewed-by: Amit Kucheria <amit.kucheria@linaro.org> Signed-off-by: Rajeshwari <rkambl@codeaurora.org> Link: https://lore.kernel.org/r/1583394547-12779-2-git-send-email-rkambl@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
| | | * | | | arm64: dts: qcom: msm8998: Fix cpu compatibleAmit Kucheria2020-03-061-8/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | "arm,armv8" compatible should only be used for software models. Replace it with the real cpu type. Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org> Link: https://lore.kernel.org/r/0535d640e9cd01887b5532f893ce4d61feca6d6d.1583445235.git.amit.kucheria@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
| | | * | | | arm64: dts: qcom: sc7180: Add OSM L3 interconnect providerSibi Sankar2020-03-061-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add Operation State Manager (OSM) L3 interconnect provider on SC7180 SoCs. Acked-by: Georgi Djakov <georgi.djakov@linaro.org> Reviewed-by: Evan Green <evgreen@chromium.org> Signed-off-by: Sibi Sankar <sibis@codeaurora.org> Link: https://lore.kernel.org/r/20200227105632.15041-8-sibis@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
| | | * | | | arm64: dts: qcom: sdm845: Add OSM L3 interconnect providerSibi Sankar2020-03-061-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add Operation State Manager (OSM) L3 interconnect provider on SDM845 SoCs. Acked-by: Georgi Djakov <georgi.djakov@linaro.org> Reviewed-by: Evan Green <evgreen@chromium.org> Signed-off-by: Sibi Sankar <sibis@codeaurora.org> Link: https://lore.kernel.org/r/20200227105632.15041-7-sibis@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
| | | * | | | arm64: dts: sc7180: Add interconnect provider DT nodesOdelu Kukatla2020-03-061-0/+95
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the DT nodes for the network-on-chip interconnect buses found on sc7180-based platforms. Signed-off-by: Odelu Kukatla <okukatla@codeaurora.org> Link: https://lore.kernel.org/r/1582646384-1458-4-git-send-email-okukatla@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
| | | * | | | arm64: dts: qcom: msm8996: Use generic QMP driver for UFSBjorn Andersson2020-03-062-14/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With support for the MSM8996 UFS PHY added to the common QMP driver, migrate the DTS to use the common QMP binding. Reviewed-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20200125001234.435384-1-bjorn.andersson@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
| | | * | | | arm64: dts: qcom: msm8996: Define parent clocks for gccBjorn Andersson2020-03-061-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The CLKREF clocks in GCC are parented by RPM_SMD_LN_BB_CLK, through the CXO2 pad. Wire this up so that this is properly enabled when need by the various PHYs. Reviewed-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20200106080546.3192125-3-bjorn.andersson@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
| | | * | | | arm64: dts: sdm845: Redefine interconnect provider DT nodesDavid Dai2020-03-051-5/+60
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the DT nodes for each of the Network-On-Chip interconnect buses found on SDM845 based platform and redefine the rsc_hlos child node as a bcm-voter device to better represent the hardware. Reviewed-by: Evan Green <evgreen@chromium.org> Acked-by: Georgi Djakov <georgi.djakov@linaro.org> Signed-off-by: David Dai <daidavid1@codeaurora.org> Signed-off-by: Odelu Kukatla <okukatla@codeaurora.org> Signed-off-by: Sibi Sankar <sibis@codeaurora.org> Link: https://lore.kernel.org/r/20200209183411.17195-7-sibis@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
| | | * | | | arm64: dts: sc7180: Add unit name to soc nodeDouglas Anderson2020-03-051-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is just like commit a1875bf98290 ("arm64: dts: qcom: sdm845: Add unit name to soc node") but for sc7180. For reference, the warning being fixed was: Warning (unit_address_vs_reg): /soc: node has a reg or ranges property, but no unit name Reviewed-by: Stephen Boyd <swboyd@chromium.org> Fixes: 90db71e48070 ("arm64: dts: sc7180: Add minimal dts/dtsi files for SC7180 soc") Signed-off-by: Douglas Anderson <dianders@chromium.org> Link: https://lore.kernel.org/r/20200304105638.1.I9ea0d337fcb927f52a28b20613b2377b6249c222@changeid Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
| | | * | | | arm64: dts: qcom: msm8996:: Add qcom,tsens-v2 to msm8996.dtsi compatibleAmit Kucheria2020-02-281-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The qcom-tsens binding requires a SoC-specific and a TSENS family-specific binding to be specified in the compatible string. Since them family-specific binding is not listed in the .dtsi file, we see the following warnings in 'make dtbs_check'. Fix them. /home/amit/work/builds/build-aarch64/arch/arm64/boot/dts/qcom/msm8996-mtp.dt.yaml: thermal-sensor@4a9000: compatible: ['qcom,msm8996-tsens'] is not valid under any of the given schemas (Possible causes of the failure): /home/amit/work/builds/build-aarch64/arch/arm64/boot/dts/qcom/msm8996-mtp.dt.yaml: thermal-sensor@4a9000: compatible: ['qcom,msm8996-tsens'] is too short /home/amit/work/builds/build-aarch64/arch/arm64/boot/dts/qcom/msm8996-mtp.dt.yaml: thermal-sensor@4a9000: compatible:0: 'qcom,msm8996-tsens' is not one of ['qcom,msm8916-tsens', 'qcom,msm8974-tsens'] /home/amit/work/builds/build-aarch64/arch/arm64/boot/dts/qcom/msm8996-mtp.dt.yaml: thermal-sensor@4a9000: compatible:0: 'qcom,msm8996-tsens' is not one of ['qcom,msm8976-tsens', 'qcom,qcs404-tsens'] /home/amit/work/builds/build-aarch64/arch/arm64/boot/dts/qcom/msm8996-mtp.dt.yaml: thermal-sensor@4ad000: compatible: ['qcom,msm8996-tsens'] is not valid under any of the given schemas (Possible causes of the failure): /home/amit/work/builds/build-aarch64/arch/arm64/boot/dts/qcom/msm8996-mtp.dt.yaml: thermal-sensor@4ad000: compatible: ['qcom,msm8996-tsens'] is too short /home/amit/work/builds/build-aarch64/arch/arm64/boot/dts/qcom/msm8996-mtp.dt.yaml: thermal-sensor@4ad000: compatible:0: 'qcom,msm8996-tsens' is not one of ['qcom,msm8916-tsens', 'qcom,msm8974-tsens'] /home/amit/work/builds/build-aarch64/arch/arm64/boot/dts/qcom/msm8996-mtp.dt.yaml: thermal-sensor@4ad000: compatible:0: 'qcom,msm8996-tsens' is not one of ['qcom,msm8976-tsens', 'qcom,qcs404-tsens'] Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org> Reviewed-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/ebaa801adade53c567857db2f74af7d2e00f935b.1582871139.git.amit.kucheria@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
| | | * | | | arm64: dts: qcom: msm8916:: Add qcom,tsens-v0_1 to msm8916.dtsi compatibleAmit Kucheria2020-02-281-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The qcom-tsens binding requires a SoC-specific and a TSENS family-specific binding to be specified in the compatible string. Since them family-specific binding is not listed in the .dtsi file, we see the following warnings in 'make dtbs_check'. Fix them. /home/amit/work/builds/build-aarch64/arch/arm64/boot/dts/qcom/msm8916-mtp.dt.yaml: thermal-sensor@4a9000: compatible: ['qcom,msm8916-tsens'] is not valid under any of the given schemas (Possible causes of the failure): /home/amit/work/builds/build-aarch64/arch/arm64/boot/dts/qcom/msm8916-mtp.dt.yaml: thermal-sensor@4a9000: compatible: ['qcom,msm8916-tsens'] is too short /home/amit/work/builds/build-aarch64/arch/arm64/boot/dts/qcom/msm8916-mtp.dt.yaml: thermal-sensor@4a9000: compatible:0: 'qcom,msm8916-tsens' is not one of ['qcom,msm8976-tsens', 'qcom,qcs404-tsens'] /home/amit/work/builds/build-aarch64/arch/arm64/boot/dts/qcom/msm8916-mtp.dt.yaml: thermal-sensor@4a9000: compatible:0: 'qcom,msm8916-tsens' is not one of ['qcom,msm8996-tsens', 'qcom,msm8998-tsens', 'qcom,sdm845-tsens'] Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org> Reviewed-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/8cea8c0036703bcc4dd2b87a8ca3913c4a28d16e.1582871139.git.amit.kucheria@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
| | | * | | | arm64: dts: qcom: sdm845-mtp: Add Truly displayBjorn Andersson2020-02-281-0/+82
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Bring in the Truly display and enable the DSI channels to make the mdss/gpu probe, even though we're lacking LABIB, preventing us from seeing anything on the screen. Tested-by: Vivek Gautam <vivek.gautam@codeaurora.org> Reviewed-by: Vivek Gautam <vivek.gautam@codeaurora.org> Link: https://lore.kernel.org/r/20190513210747.22429-1-bjorn.andersson@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
| | | * | | | arm64: dts: ipq6018: Add a few device nodesSivaprakash Murugesan2020-02-282-0/+260
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | add i2c, spi, crypto, rng, watchdog, peripheral nodes, also add support for wcss Q6 remoteproc driver and enable hw mutex, smem, mailbox, smp2p and rpmsg drivers Signed-off-by: Sivaprakash Murugesan <sivaprak@codeaurora.org> Link: https://lore.kernel.org/r/1582199446-29890-1-git-send-email-sivaprak@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
| | | * | | | arm64: dts: sc7180: Move venus node to the correct positionMatthias Kaehlcke2020-02-281-26/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Per convention device nodes for SC7180 should be ordered by address. This is currently not the case for the venus node, move it to the correct position. Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Matthias Kaehlcke <mka@chromium.org> Link: https://lore.kernel.org/r/20200227092649.v3.1.I15e0f7eff0c67a2b49d4992f9d80fc1d2fdadf63@changeid Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
| | | * | | | arm64: dts: sdm845: follow venus-sdm845v2 DT bindingStanimir Varbanov2020-02-281-12/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move all pmdomain and clock resources to Venus DT node. And make possible to support dynamic core assignment on v4. Signed-off-by: Stanimir Varbanov <stanimir.varbanov@linaro.org> Link: https://lore.kernel.org/r/20200106154929.4331-12-stanimir.varbanov@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
| | | * | | | arm64: dts: sc7180: add display dt nodesHarigovindan P2020-02-261-2/+134
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add display, DSI hardware DT nodes for sc7180. Tested-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Co-developed-by: Kalyan Thota <kalyan_t@codeaurora.org> Signed-off-by: Kalyan Thota <kalyan_t@codeaurora.org> Signed-off-by: Harigovindan P <harigovi@codeaurora.org> Link: https://lore.kernel.org/r/1580825707-27115-1-git-send-email-harigovi@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
| | | * | | | arm64: dts: qcom: sc7180: Correct qmp phy reset entriesSandeep Maheswaram2020-02-261-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The phy reset entries were incorrect.so swapped them. Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Signed-off-by: Sandeep Maheswaram <sanm@codeaurora.org> Link: https://lore.kernel.org/r/1581506488-26881-5-git-send-email-sanm@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
generated by cgit v1.2.3 (git 2.39.1) at 2025-01-25 14:23:16 +0100