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* ARM: i.MX clk: Move clock check function in common locationAlexander Shiyan2014-07-1813-73/+32
| | | | | | | | This patch moves clock check function in common i.MX location and switch i.MX clk drivers to use this new function. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ARM: i.MX27 clk: Use of_clk_init() for DT caseAlexander Shiyan2014-07-183-35/+29
| | | | | | | Replace .init_time() hook with of_clk_init() for DT targets. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ARM: i.MX27 clk: Separate DT and non-DT init procedureAlexander Shiyan2014-07-181-15/+24
| | | | | | | | This patch separates DT and non-DT clock initialization procedure, so we can avoid a lot of unneeded clk_register_clkdev() for DT case. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ARM: i.MX: Remove excess variableAlexander Shiyan2014-07-181-8/+7
| | | | | | | | Base address for driver is global, there are no need to use intermediate variable for it. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ARM: i.MX: Use of_clk_get_by_name() for timer clocks for DT case.Alexander Shiyan2014-07-187-28/+25
| | | | | | | | | Use of_clk_get_by_name() for timer clocks for DT case. This patch eliminates a lot of unneeded clk_register_clkdev() calls for GPT. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ARM: imx: defconfig: Select CONFIG_FHANDLEFabio Estevam2014-07-183-0/+3
| | | | | | | | CONFIG_FHANDLE=y is needed when running systemd with version >=210, so that it can spawn a serial tty via getty. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ARM: imx5: remove mx51.h and mx53.hShawn Guo2014-07-185-654/+0
| | | | | | | Now all the macros in mx51.h and mx53.h are used nowhere, so remove them. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ARM: imx5: clean function declarations in mx51.hShawn Guo2014-07-182-5/+1
| | | | | | | The mx51_display_revision() is a dead declaration. Remove it. Also, move mx51_revision() into common.h. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ARM: imx5: remove file mm-imx5.cShawn Guo2014-07-186-67/+1
| | | | | | | | The only code left in mm-imx5.c is to create static mapping. While all IMX platform code are moved to use dynamic mapping, the file can just be removed now. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ARM: imx5: move init hooks into mach-imx5x.cShawn Guo2014-07-184-48/+50
| | | | | | | | | | | | | | | These imx5 init_early[late] hooks are called only from mach-imx5x.c. Let's move them into mach-imx5x.c. While at it, replace the static mapping in imx51_ipu_mipi_setup() with dynamic mapping. Also this function and imx_src_init() do not necessarily to be called at .init_early hook, so move them into .init_machine. The mxc_iomux_v3_init() is dropped from imx51_init_early() in the moving, since it's only needed by non-DT boot. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ARM: imx5: use dynamic mapping for Cortex and GPC blockShawn Guo2014-07-183-34/+60
| | | | | | | | The imx5 pm code uses static mapping to access Cortex and GPC registers. The patch create struct imx5_pm_data to encode physical address of Cortex and GPC block, and create dynamic mapping for them at run-time. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ARM: imx5: reuse clock CCM mapping in pm codeShawn Guo2014-07-183-4/+17
| | | | | | | | The imx5 pm code needs to access CCM registers. Let's remove the use of CCM static mapping in pm code by reusing the dynamic mapping created in clock code. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ARM: imx5: use dynamic mapping for DPLL blockShawn Guo2014-07-181-17/+48
| | | | | | | | | | | Replace the static mapping of DPLL block with dynamic mapping by calling ioremap(). Ideally, this should be done by calling of_iomap(), so that the physical address of DPLL can also be retrieved from device tree. But unfortunately, DPLL blocks are not defined in DT in the first place. So to maintain the compatibility of existing DTB, we use ioremap() with physical address defines in the code. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ARM: imx5: use dynamic mapping for CCM blockShawn Guo2014-07-181-39/+51
| | | | | | | | | Replace the static mapping of CCM block with dynamic mapping and retrieve CCM base address from device tree. Though it's not nice to encode the variable ccm_base in macros, it helps to avoid a massive churn on the code. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ARM: imx5: remove header crm-regs-imx5.hShawn Guo2014-07-183-602/+70
| | | | | | | Most of the macros in crm-regs-imx5.h are used nowhere. Let's move the needed ones into the C files, and remove the header. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ARM: imx5: retrieve iim base from device treeShawn Guo2014-07-181-4/+21
| | | | | | | | Instead of using static define and mapping, the patch changes imx5 code that reads chip revision from IIM to retrieve base address from device tree and use dynamic mapping. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ARM: imx5: call mxc_timer_init_dt() on imx51Shawn Guo2014-07-181-1/+1
| | | | | | | Since i.MX51 supports DT only, it's more appropriate to call mxc_timer_init_dt() than mxc_timer_init() to initialize timer. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ARM: imx5: remove function imx51_soc_init()Shawn Guo2014-07-182-34/+0
| | | | | | | The function imx51_soc_init() was used by non-DT boot only. Since i.MX51 supports DT only, the function can be removed now. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ARM: imx5: tzic_init_irq() can directly be .init_irq hookShawn Guo2014-07-186-26/+10
| | | | | | | | After i.MX51 supports DT only, tzic_init_irq() can figure out the tzic_base on its own. Thus, it can directly be .init_irq hook, and mx51[53]_init_irq() can be saved. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ARM: imx5: drop arguments from mx5_clocks_common_init()Shawn Guo2014-07-181-10/+8
| | | | | | | | | The function mx5_clocks_common_init() was created with a number of arguments to pass oscillator clock rate in non-DT boot. Since i.MX5 is DT only platform, the arguments can be dropped, and the clock rate can just be retrieved from device tree. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ARM: imx5: make mx51_clocks_init() a DT callShawn Guo2014-07-182-15/+3
| | | | | | | Since i.MX51 becomes a DT only platform, we can make mx51_clocks_init() a DT call and save function mx51_clocks_init_dt() now. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ARM: imx5: remove i.MX5 non-DT device registration helpersShawn Guo2014-07-1813-190/+1
| | | | | | | i.MX5 is DT only platforms, so these non-DT device registration helpers is used nowhere. Remove them. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ARM: imx5: remove imx51 non-DT support filesShawn Guo2014-07-185-1073/+1
| | | | | | | Since i.MX51 becomes a DT only platform, those non-DT support files can be removed now. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ARM: imx5: drop option MACH_IMX51_DTShawn Guo2014-07-185-10/+6
| | | | | | | | | Since i.MX51 becomes DT only now, we can drop option MACH_IMX51_DT and just use SOC_IMX51 instead. While at it, rename imx51-dt.c to mach-imx51.c to align with the name schema of other IMX DT only platforms. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ARM: imx5: move SOC_IMX5 and SOC_IMX51 into 'Device tree only'Shawn Guo2014-07-181-12/+11
| | | | | | | | | | | After moving SOC_IMX51 support over to device tree, all i.MX5 support becomes device tree only now. So options SOC_IMX5 and SOC_IMX51 can just be under 'Device tree only'. While at it, 'select ARCH_MXC_IOMUX_V3' is dropped, since it's only needed by non-DT build before. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ARM: imx: move EHCI platform defines out of platform_data headerShawn Guo2014-07-1826-0/+75
| | | | | | | | The platform_data header usb-ehci-mxc.h has a lot of stuff used by only IMX platform code. They shouldn't be really in this header but a IMX platform local header. Create ehci.h and move these stuff into it. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ARM: i.MX: Remove registration helper for i.MX1 USB UDCAlexander Shiyan2014-07-184-95/+0
| | | | | | | | | imx_udc driver was removed from the kernel of about 10 months ago. This patch removes a registration helper for this driver and orphaned driver header. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ARM: i.MX1 clk: Add devicetree supportAlexander Shiyan2014-07-181-71/+82
| | | | | | | This patch adds devicetree support CCM module for i.MX1 (MC9328MX1) CPUs. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ARM: imx: remove unused definesPaul Bolle2014-07-181-33/+0
| | | | | | | | | None of the defines "for modules using static and dynamic DMA channels" are used. Remove these. Signed-off-by: Paul Bolle <pebolle@tiscali.nl> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ARM: i.MX: Select HAVE_IMX_SRC for i.MX5 globallyAlexander Shiyan2014-07-181-3/+1
| | | | | | | | No reason to choose a symbol HAVE_IMX_SRC separately for each supported i.MX5 CPU, this patch selects this symbol globally for i.MX5. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ARM: clk-imx6q: parent lvds_sel input from upstream clock gatesLucas Stach2014-07-181-2/+2
| | | | | | | | | | | | | | | | | | | | The i.MX6 reference manual doesn't make a clear distinction between the fixed clock divider and the enable gate for the pcie and sata reference clocks. This lead to the lvds mux inputs in the imx6q clk driver to be parented from the ref clock (which is the divider) instead of the actual gate, which in turn prevents the upstream clock to actually be enabled when lvds clk out is active. This fixes a hard machine hang regression in kernel 3.16 for boards where only pcie is active but no sata, as with this kernel version the imx6-pcie driver is no longer enabling the upstream clock directly but only lvds clk out. Reported-by: Arne Ruhnau <arne.ruhnau@target-sg.com> Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Tested-by: Arne Ruhnau <arne.ruhnau@target-sg.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* Merge branch 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-armLinus Torvalds2014-06-295-6/+42
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull ARM fixes from Russell King: "Another round of ARM fixes. The largest change here is the L2 changes to work around problems for the Armada 37x/380 devices, where most of the size comes down to comments rather than code. The other significant fix here is for the ptrace code, to ensure that rewritten syscalls work as intended. This was pointed out by Kees Cook, but Will Deacon reworked the patch to be more elegant. The remainder are fairly trivial changes" * 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm: ARM: 8087/1: ptrace: reload syscall number after secure_computing() check ARM: 8086/1: Set memblock limit for nommu ARM: 8085/1: sa1100: collie: add top boot mtd partition ARM: 8084/1: sa1100: collie: revert back to cfi_probe ARM: 8080/1: mcpm.h: remove unused variable declaration ARM: 8076/1: mm: add support for HW coherent systems in PL310 cache
| * ARM: 8087/1: ptrace: reload syscall number after secure_computing() checkWill Deacon2014-06-291-3/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On the syscall tracing path, we call out to secure_computing() to allow seccomp to check the syscall number being attempted. As part of this, a SIGTRAP may be sent to the tracer and the syscall could be re-written by a subsequent SET_SYSCALL ptrace request. Unfortunately, this new syscall is ignored by the current code unless TIF_SYSCALL_TRACE is also set on the current thread. This patch slightly reworks the enter path of the syscall tracing code so that we always reload the syscall number from current_thread_info()->syscall after the potential ptrace traps. Acked-by: Kees Cook <keescook@chromium.org> Tested-by: Kees Cook <keescook@chromium.org> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: 8086/1: Set memblock limit for nommuLaura Abbott2014-06-291-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | Commit 1c2f87c (ARM: 8025/1: Get rid of meminfo) changed find_limits to use memblock_get_current_limit for calculating the max_low pfn. nommu targets never actually set a limit on memblock though which means memblock_get_current_limit will just return the default value. Set the memblock_limit to be the end of DDR to make sure bounds are calculated correctly. Signed-off-by: Laura Abbott <lauraa@codeaurora.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: 8085/1: sa1100: collie: add top boot mtd partitionAndrea Adami2014-06-291-0/+5
| | | | | | | | | | | | | | | | The CFI mapping is now perfect so we can expose the top block, read only. There isn't much to read, though, just the sharpsl_params values. Signed-off-by: Andrea Adami <andrea.adami@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: 8084/1: sa1100: collie: revert back to cfi_probeAndrea Adami2014-06-291-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Reverts commit d26b17edafc45187c30cae134a5e5429d58ad676 ARM: sa1100: collie.c: fall back to jedec_probe flash detection Unfortunately the detection was challenged on the defective unit used for tests: one of the NOR chips did not respond to the CFI query. Moreover that bad device needed extra delays on erase-suspend/resume cycles. Tested personally on 3 different units and with feedback of two other users. Signed-off-by: Andrea Adami <andrea.adami@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: 8080/1: mcpm.h: remove unused variable declarationNicolas Pitre2014-06-291-2/+0
| | | | | | | | | | | | | | | | The sync_phys variable has been replaced by link time computation in mcpm_head.S before the code was submitted upstream. Signed-off-by: Nicolas Pitre <nico@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: 8076/1: mm: add support for HW coherent systems in PL310 cacheThomas Petazzoni2014-06-291-0/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When a PL310 cache is used on a system that provides hardware coherency, the outer cache sync operation is useless, and can be skipped. Moreover, on some systems, it is harmful as it causes deadlocks between the Marvell coherency mechanism, the Marvell PCIe controller and the Cortex-A9. To avoid this, this commit introduces a new Device Tree property 'arm,io-coherent' for the L2 cache controller node, valid only for the PL310 cache. It identifies the usage of the PL310 cache in an I/O coherent configuration. Internally, it makes the driver disable the outer cache sync operation. Note that technically speaking, a fully coherent system wouldn't require any of the other .outer_cache operations. However, in practice, when booting secondary CPUs, these are not yet coherent, and therefore a set of cache maintenance operations are necessary at this point. This explains why we keep the other .outer_cache operations and only ->sync is disabled. While in theory any write to a PL310 register could cause the deadlock, in practice, disabling ->sync is sufficient to workaround the deadlock, since the other cache maintenance operations are only used in very specific situations. Contrary to previous versions of this patch, this new version does not simply NULL-ify the ->sync member, because the l2c_init_data structures are now 'const' and therefore cannot be modified, which is a good thing. Therefore, this patch introduces a separate l2c_init_data instance, called of_l2c310_coherent_data. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | Merge tag 'fixes-for-linus' of ↵Linus Torvalds2014-06-2536-136/+137
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC fixes from Arnd Bergmann: "A new set of bug fixes for 3.16, containing patches for seven platforms: at91: - drivers/misc fix for Kconfig PWM symbol - correction of several values in DT after conversion to CCF - fix at91sam9261/at91sam9261ek mistake in slow crystal vs. slow RC osc imx: - Use GPIO for card CD/WP on imx51-babbage and eukrea-mbimxsd51, because controller base CD/WP is not working in esdhc driver due to runtime PM support - A couple of random ventana gw5xxx board fixes - Add IMX_IPUV3_CORE back to defconfig, which gets lost when moving IPUv3 driver out of staging tree - Fix enet/fec clock selection on imx6sl - Fix display node on imx53-m53evk board - A couple of Cubox-i updates from Russell, which were omitted from the merge window due to dependency integrator: - fix an OF-related regression against 3.15 mvebu: - mvebu (v7) - Fix broken SoC ID detection - Select ARM_CPU_SUSPEND for v7 - Remove armada38x compatible string (no users yet) - Enable Dove SoC in mvebu_v7_defconfig - kirkwood - Fix phy-connection-type on GuruPlug board qcom: - enable gsbi driver in defconfig - fix section mismatch warning in serial driver samsung: - use WFI macro in platform_do_lowpower because exynos cpuhotplug includes a hardcoded WFI instruction and it causes compile error in Thumb-2 mode. - fix GIC reg sizes for exynos4 SoCs - remove reset timer counter value during boot and resume for mct to fix a big jump in printk timestamps - fix pm code to check cortex-A9 for another exynos SoCs - don't rely on firmware's secondary_cpu_start for mcpm sti: - Ethernet clocks were wrongly defined for STiH415/416 platforms - STiH416 B2020 revision E DTS file name contained uppercase, change to lowercase" * tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (33 commits) ARM: at91/dt: sam9261: remove slow RC osc ARM: at91/dt: define sam9261ek slow crystal frequency ARM: at91/dt: sam9261: correctly define mainck ARM: at91/dt: sam9n12: correct PLLA ICPLL and OUT values ARM: at91/dt: sam9x5: correct PLLA ICPLL and OUT values misc: atmel_pwm: fix Kconfig symbols ARM: integrator: fix OF-related regression ARM: mvebu: Fix the improper use of the compatible string armada38x using a wildcard ARM: dts: kirkwood: fix phy-connection-type for Guruplug ARM: EXYNOS: Don't rely on firmware's secondary_cpu_start for mcpm ARM: dts: imx51-eukrea-mbimxsd51-baseboard: unbreak esdhc. ARM: dts: imx51-babbage: Fix esdhc setup ARM: dts: mx5: Move the display out of soc {} node ARM: dts: mx5: Fix IPU port node placement ARM: mvebu: select ARM_CPU_SUSPEND for Marvell EBU v7 platforms ARM: mvebu: Fix broken SoC ID detection ARM: imx_v6_v7_defconfig: Enable CONFIG_IMX_IPUV3_CORE ARM: multi_v7_defconfig: Add QCOM GSBI driver ARM: stih41x: Rename stih416-b2020-revE.dts to stih416-b2020e.dts tty: serial: msm: Fix section mismatch warning ...
| * \ Merge tag 'at91-fixes' of git://github.com/at91linux/linux-at91 into fixesArnd Bergmann2014-06-254-18/+15
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Merge "First AT91 fixes batch for 3.16" from Nicolas Ferre: - drivers/misc fix for Kconfig PWM symbol - correction of several values in DT after conversion to CCF - fix at91sam9261/at91sam9261ek mistake in slow crystal vs. slow RC osc * tag 'at91-fixes' of git://github.com/at91linux/linux-at91: ARM: at91/dt: sam9261: remove slow RC osc ARM: at91/dt: define sam9261ek slow crystal frequency ARM: at91/dt: sam9261: correctly define mainck ARM: at91/dt: sam9n12: correct PLLA ICPLL and OUT values ARM: at91/dt: sam9x5: correct PLLA ICPLL and OUT values misc: atmel_pwm: fix Kconfig symbols
| | * | ARM: at91/dt: sam9261: remove slow RC oscAlexandre Belloni2014-06-251-15/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The at91sam9261 doesn't actually have a slow RC oscillator, remove it from the dtsi. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Boris BREZILLON <boris.brezillon@free-electrons.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
| | * | ARM: at91/dt: define sam9261ek slow crystal frequencyAlexandre Belloni2014-06-251-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Define at91sam9261ek's slow crystal frequencies. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Boris BREZILLON <boris.brezillon@free-electrons.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
| | * | ARM: at91/dt: sam9261: correctly define mainckAlexandre Belloni2014-06-251-2/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | mainck (CKGR_MCFR register) is actually using main_osc (CKGR_MOR register). Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Boris BREZILLON <boris.brezillon@free-electrons.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
| | * | ARM: at91/dt: sam9n12: correct PLLA ICPLL and OUT valuesAlexandre Belloni2014-06-251-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ICPLL can only take 0 or 1, it got mixed with OUT which can be in the [0-3] range. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Boris BREZILLON <boris.brezillon@free-electrons.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
| | * | ARM: at91/dt: sam9x5: correct PLLA ICPLL and OUT valuesAlexandre Belloni2014-06-251-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ICPLL can only take 0 or 1, it got mixed with OUT which can be in the [0-3] range. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Boris BREZILLON <boris.brezillon@free-electrons.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
| * | | Merge tag 'mvebu-fixes-3.16' of git://git.infradead.org/linux-mvebu into fixesArnd Bergmann2014-06-257-7/+9
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Merge "mvebu fixes for v3.16" from Jason Cooper: - mvebu - Fix broken SoC ID detection - Select ARM_CPU_SUSPEND for v7 - Remove armada38x compatible string (no users yet) - kirkwood - Fix phy-connection-type on GuruPlug board * tag 'mvebu-fixes-3.16' of git://git.infradead.org/linux-mvebu: ARM: mvebu: Fix the improper use of the compatible string armada38x using a wildcard ARM: dts: kirkwood: fix phy-connection-type for Guruplug ARM: mvebu: select ARM_CPU_SUSPEND for Marvell EBU v7 platforms ARM: mvebu: Fix broken SoC ID detection
| | * | | ARM: mvebu: Fix the improper use of the compatible string armada38x using a ↵Gregory CLEMENT2014-06-245-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | wildcard Wildcards in compatible strings should be avoid. "marvell,armada38x" was recently introduced but was not yet used. The armada 385 SoC is a superset of the armada 380 SoC (with more CPUs and more PCIe slots). So this patch replaces the use of "marvell,armada38x" by the "marvell,armada380" string. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Link: https://lkml.kernel.org/r/1403533011-21339-1-git-send-email-gregory.clement@free-electrons.com Acked-by: Andrew Lunn <andrew@lunn.ch> Cc: <stable@vger.kernel.org> # v3.15+ Signed-off-by: Jason Cooper <jason@lakedaemon.net>
| | * | | ARM: dts: kirkwood: fix phy-connection-type for GuruplugSebastian Hesselbarth2014-06-231-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit eeb845459a72e792a959278b858f9c417e9995bd ("ARM: dts: kirkwood: set Guruplug phy-connection-type to rgmii-id") added phy-connection-type properties to ethernet PHY nodes. Actually, the property has to be set for the ethernet port node instead. Fix it by moving the corresponding properties to the correct nodes. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Link: https://lkml.kernel.org/r/1403555115-13111-1-git-send-email-sebastian.hesselbarth@gmail.com Fixes: eeb845459a72: ('ARM: dts: kirkwood: set Guruplug phy-connection-type to rgmii-id') Cc: <stable@vger.kernel.org> # v3.16+ Signed-off-by: Jason Cooper <jason@lakedaemon.net>
| | * | | ARM: mvebu: select ARM_CPU_SUSPEND for Marvell EBU v7 platformsThomas Petazzoni2014-06-201-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On Marvell Armada platforms, the PMSU (Power Management Service Unit) controls a number of power management related activities, needed for things like suspend/resume, CPU hotplug, cpuidle or even simply SMP. Since cpuidle support was added for Armada XP, the pmsu.c file in arch/arm/mach-mvebu/ calls the cpu_suspend() and cpu_resume() ARM functions, which are only available when CONFIG_ARM_CPU_SUSPEND=y. Therefore, configurations that have CONFIG_ARM_CPU_SUSPEND disabled due to PM_SLEEP being disabled no longer build properly, due to undefined references to cpu_suspend() and cpu_resume(). To fix this, this patch simply ensures CONFIG_ARM_CPU_SUSPEND is always enabled for Marvell EBU v7 platforms. Doing things in a more fine-grained way would require a lot of #ifdef-ery in pmsu.c to isolate the parts that use cpu_suspend()/cpu_resume(), and those parts would anyway have been needed as soon as either one of suspend/resume, CPU hotplug or cpuidle was enabled. Reported-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Link: https://lkml.kernel.org/r/1402488397-31381-1-git-send-email-thomas.petazzoni@free-electrons.com Acked-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
| | * | | ARM: mvebu: Fix broken SoC ID detectionEzequiel Garcia2014-06-201-0/+1
| | |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently the mvebu boards need to detect the SoC revision in order to apply some quirks needed to workaround issues found on I2C and thermal controllers present only in very early SoC. This detection requires PCI address translation to work, so we need to explicitly select OF_ADDRESS_PCI. This can be considered a partial revert of the following commit, that wrongly removed the option selection: commit 55400f3a1f89e39761f45c19f6e4235a329c400b Author: Rob Herring <robh@kernel.org> Date: Tue Apr 22 14:15:52 2014 -0500 ARM: mvebu: clean-up unneeded kconfig selects Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Link: https://lkml.kernel.org/r/1402347165-19988-1-git-send-email-ezequiel.garcia@free-electrons.com Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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