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* OMAP4: PRM: Remove MPU internal code name and apply PRCM naming conventionBenoit Cousson2010-05-206-39/+45
| | | | | | | | | | | | | | The MPU subsystem was named based on internal code name (CHIRON). This patch will remove all the occurences of the chiron name are replace it with PRCM_MPU in order to differentiate the MPU local PRCM to the global one. Remove PDA_ from PRCM_MPU registers names to stick to the global PRM naming convention. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Rajendra Nayak <rnayak@ti.com>
* OMAP4: CM: Remove non-functional registers in ES1.0Benoit Cousson2010-05-201-39/+2
| | | | | | | | | | | | | | The automatic HW restore from OFF mode is not functional at all in OMAP4430 ES1.0. Because of that, it will be extensively changed in the next Si revision, and the compatibilty will not be maintained with ES1.0. Remove the current XXX_RESTORE registers definition to avoid future conflicts with the next Si revision. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Rajendra Nayak <rnayak@ti.com>
* OMAP: hwmod: Replace WARN by pr_warning for clockdomain checkBenoit Cousson2010-05-201-7/+6
| | | | | | | | | | Most of the clock nodes belong to a clock domain, but it is perfectly valid to have clock without clock domain. Root clocks for example does not belong to any clock domain. Keep the warning but reduce the verbosity. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
* OMAP: hwmod: Rename hwmod name for the MPUBenoit Cousson2010-05-204-4/+4
| | | | | | | | | | | | | In the lastest OMAP4 hwmod data file, the _hwmod was removed in order to save some memory space and because it does not bring a lot. The same cleanup will be have to done for other hwmods in OMAP2 & 3 data files. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Rajendra Nayak <rnayak@ti.com>
* OMAP: hwmod: Do not exit the iteration if one clock init failedBenoit Cousson2010-05-201-2/+3
| | | | | | | | | | | | | | During the _init_clocks phase, the iteration is stopped but the status is still change from _HWMOD_STATE_REGISTERED to _HWMOD_STATE_CLKS_INITED. Since the _setup phase will be done nevertheless, it might be better to keep initializing the others clocks nodes and just keep the warning. It is much easier to debug when a important number of clocks name are wrong during the early debug phase of a new platform. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
* OMAP: hwmod: Replace WARN by pr_warning if clock lookup failedBenoit Cousson2010-05-201-6/+6
| | | | | | | | The WARN is a little bit too verbose and is not providing usefull information in that case. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
* OMAP: hwmod: Remove IS_ERR check with omap_clk_get_by_name return valueBenoit Cousson2010-05-201-13/+13
| | | | | | | | | | | The previous clock API was returning a standard linux error code in case of failure. This is not the case anymore with the new omap_clk_get_by_name API. A NULL value means that the clock node does not exist. Replace all the IS_ERR check by a !clk check. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
* OMAP: hwmod: Fix wrong pointer iteration in oh->slavesBenoit Cousson2010-05-201-14/+16
| | | | | | | | | | The iteration is currently done on the omap_hwmod_ocp_if pointer and not on the table pointer that reference them. It worked most of the time because the structure are contiguous in memory. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
* OMAP4: hwmod: Replace OCPIF_HAS_IDLEST by HWMOD_NO_IDLESTBenoit Cousson2010-05-202-4/+6
| | | | | | | | | | | | | | Some initiator modules in OMAP2 & 3 does not have IDLEST bit, in that case we cannot detect the module readiness by polling that bit and must exist the function immediately assuming that the module is ready. The previous flag was affected to the OCP interface. While it is technically true that the idlest is related to the L4 slave interface of the module, the PRCM status belong to the module. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
* OMAP4: hwmod & CM: Implement the omap4_cm_wait_module_ready functionBenoit Cousson2010-05-203-21/+50
| | | | | | | | | | | | | | | | | | | | | | The return of the omap4_cm_wait_module_ready function is checked in order to avoid accessing the sysconfig register if the module is not in the correct state. In that case the _setup will exit without trying to reset using sysconfig. For the moment a warning is printed. A proper management of fclk and module reset will have to be done in order to init correctly the problematic IPs listed below. <4>omap_hwmod: ivahd: cannot be enabled (3) <4>omap_hwmod: iss: cannot be enabled (3) <4>omap_hwmod: tesla: cannot be enabled (3) <4>omap_hwmod: sdma: cannot be enabled (3) <4>omap_hwmod: sl2: cannot be enabled (3) <4>omap_hwmod: sad2d: cannot be enabled (3) <4>omap_hwmod: ducati: cannot be enabled (3) Signed-off-by: Benoit Cousson <b-cousson@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
* OMAP: CM: Move MAX_MODULE_READY_TIME to cm.hBenoit Cousson2010-05-203-20/+10
| | | | | | | | | | | The maximum timeout to wait for the PRCM to request that a module exit idle or reach functionnal state is common to OMAP2/3/4 SoCs, so, move it to the chip family-common cm.h include file. Reduce the timeout from 20 ms to 2 ms. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
* OMAP4: hwmod: Replace module & device offsets by absolute clkctrl addressBenoit Cousson2010-05-201-5/+3
| | | | | | | | | | | | | Accessing the clkctrl register using offset of module & device is hard to do in OMAP4 due to the way the CM1, CM2, PRM and PRCM_MPU are located in the address space. There is no common base address anymore for all the CM registers. The easiest way to handle that on OMAP4 is to provide the absolute address of the XXX_CLKCTRL register per hwmod. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Rajendra Nayak <rnayak@ti.com>
* OMAP clock: resolve old checkpatch and CodingStyle issues with plat-omap/clock.cPaul Walmsley2010-05-201-13/+15
| | | | | | | Clean up comment style, remove unnecessary includes, and resolve some checkpatch warnings in plat-omap/clock.c. Signed-off-by: Paul Walmsley <paul@pwsan.com>
* OMAP3 clock: remove unnecessary duplicate of dpll4_m2_ck, added for 36xxPaul Walmsley2010-05-201-127/+36
| | | | | | | | | | | | | Commit 678bc9a2eabb7f444ef8ad1cfc5ef394e2bd8bf2 split dpll4_m2_ck, creating a 34xx and a 36xx variant, to handle the additional 16 divider steps provided on the 36xx. This in turn required dynamic rewriting of the clock tree during initialization, which is undesirable. All this seems to be unnecessary, though, since the additional 16 divider steps can simply be marked with RATE_IN_36XX. This patch does so and re-merges the affected structures. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Vishwanath Sripathy <vishwanath.bs@ti.com>
* OMAP3 clock: rename RATE_IN_343X, RATE_IN_3430ES2 to match realityPaul Walmsley2010-05-203-125/+127
| | | | | | | | | | | | | | | | Rename the RATE_IN_343X clksel_rate.rate flag to be RATE_IN_3XXX, to reflect that these rates are valid on all OMAP3 platforms, not just 343X. Also rename the RATE_IN_OMAP3430ES2 clksel_rate.rate flag to be RATE_IN_OMAP3430ES2PLUS, to reflect that these flags are valid on all OMAP3 platforms after 3430ES2. This patch should not result in any functional changes. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Richard Woodruff <r-woodruff2@ti.com> Cc: Rajendra Nayak <rnayak@ti.com> Cc: Ranjith Lohithakshan <ranjithl@ti.com>
* OMAP2+ clock: clean up clkt_clksel.cPaul Walmsley2010-05-203-177/+266
| | | | | | | | | | | | | | | | | | | This patch cleans up arch/arm/mach-omap2/clkt_clksel.c. It: - makes several functions static that are not called outside the file; - adds documentation; - makes some code paths easier to read (hopefully), by breaking up compound statements and removing redundant checks; - converts some pr_err()s that indicate clock tree data problems into WARN()s, so they are more likely to be noticed; - and moves omap2_clk_round_rate() back into mach-omap2/clock.c, its proper home, since it is not clksel-specific. Signed-off-by: Paul Walmsley <paul@pwsan.com>
* OMAP2+ clock: remove DEFAULT_RATE clksel_rate flagPaul Walmsley2010-05-206-115/+135
| | | | | | | | | | | | | | | | | | The DEFAULT_RATE clksel_rate flag is essentially useless. It was set on some of the lowest divisors, which, when switching to a much higher-rate parent, could have potentially resulted in rates that exceeded the hardware specifications for downstream clocks in the window between the clk_set_parent(), and a subsequent clk_set_rate(). It seems much safer to just remove the flag and always use the highest available divisor (resulting in the lowest possible rate) after the switch, and this patch does so. Ideally, it would be best to first attempt to switch to a divisor that matches the clock's rate with the previous parent, if at all possible. But that is a project for some other day or some other person. The parent changing code is rarely used. Signed-off-by: Paul Walmsley <paul@pwsan.com>
* OMAP3: PM: PM_MPUGRPSEL writes should use GRPSEL macros, not EN macrosPaul Walmsley2010-05-201-7/+12
| | | | | | | | | | Writes to the PM_*GRPSEL registers should use _GRPSEL_ macros, not _EN_ macros, to match the TRM and guard against inadvertent error. This patch should not cause any functional change. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Kevin Hilman <khilman@deeprootsystems.com> Cc: Jouni Högander <jouni.hogander@nokia.com>
* OMAP2+ PRCM: convert remaining PRCM macros to the _SHIFT/_MASK suffixesPaul Walmsley2010-05-207-112/+114
| | | | | | | | | | | Fix all of the remaining PRCM register shift/bitmask macros that did not use the _SHIFT/_MASK suffixes to use them. This makes the use of these macros consistent. It is intended to reduce error, as code can be inspected visually by reviewers to ensure that bitshifts and bitmasks are used in the appropriate places. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Kevin Hilman <khilman@deeprootsystems.com>
* OMAP3 PRCM: convert OMAP3 PRCM macros to the _SHIFT/_MASK suffixesPaul Walmsley2010-05-205-393/+398
| | | | | | | | | | | Fix all of the remaining OMAP3 PRCM register shift/bitmask macros that did not use the _SHIFT/_MASK suffixes to use them. This makes the use of these macros consistent. It is intended to reduce error, as code can be inspected visually by reviewers to ensure that bitshifts and bitmasks are used in the appropriate places. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Kevin Hilman <khilman@deeprootsystems.com>
* OMAP2 PRCM: convert OMAP2 PRCM macros to the _SHIFT/_MASK suffixesPaul Walmsley2010-05-207-240/+241
| | | | | | | | | | | Fix all of the remaining OMAP2 PRCM register shift/bitmask macros that did not use the _SHIFT/_MASK suffixes to use them. This makes the use of these macros consistent. It is intended to reduce error, as code can be inspected visually by reviewers to ensure that bitshifts and bitmasks are used in the appropriate places. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Kevin Hilman <khilman@deeprootsystems.com>
* OMAP1 clock: fix section mismatch on clk_initFelipe Balbi2010-05-202-2/+2
| | | | | | | | remove the section annotation from omap1_clk_disable_unused() to kill the section mismatch warning. Signed-off-by: Felipe Balbi <felipe.balbi@nokia.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
* AM3517: rename the i2c boardinfo to make it more readablestanley.miao2010-05-201-10/+10
| | | | | | | | | | | There are three i2c buses on am3517, and each i2c bus has several devices on it, so we can't name the i2c boardinfo structures with one of these devices. In order to make it more readable, now rename these three boardinfo structures based on i2c indexes. Signed-off-by: Stanley.Miao <stanley.miao@windriver.com> Acked-By: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* omap: GPIO: Fix OMAP4 GPIO reg access issuesCharulatha V2010-05-201-12/+47
| | | | | | | | | | | Access to some of the OMAP4 GPIO registers are not properly handled. This patch fixes it. This patch is tested on 3430SDP and 4430SDP boards Signed-off-by: Charulatha V <charu@ti.com> Acked-by: Kevin Hilman <khilman@deeprootsystems.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* omap4: Move SOC specific code from board fileSantosh Shilimkar2010-05-207-54/+101
| | | | | | | | | | This patch moves OMAP4 soc specific code from 4430sdp board file. The change is necessary so that newer board support can be added with minimal changes. This will be also problematic for multi-board, multi-omap builds. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* OMAP4: Networking: Defconfig SupportAbraham Arce2010-05-201-2/+55
| | | | | | | | | | | | | | | Enable KS8851 SPI support + Networking Support - Packet Socket - TCP/IP Network Filesystems - NFS Client - Root Filesystem on NFS Signed-off-by: Abraham Arce <x0066660@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* OMAP4: Ethernet: KS8851 Board SupportAbraham Arce2010-05-201-0/+81
| | | | | | | Enable Micrel KS8851 SPI network chip for OMAP4430 Signed-off-by: Abraham Arce <x0066660@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* omap: hsmmc: fix the hsmmc driver for am3517stanley.miao2010-05-202-6/+25
| | | | | | | | AM3517 don't have the register OMAP343X_CONTROL_PBIAS_LITE and the regulators like "vmmc", so we set a noop "set_power" function for it. Signed-off-by: Stanley.Miao <stanley.miao@windriver.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* omap: init the gpio pinmux for mmcstanley.miao2010-05-201-0/+9
| | | | | | | | | There is two gpio for mmc use, one is for card detecting, another is used for checking write protect. Intialize its pinmux in case the bootloader doesn't set it. Signed-off-by: Stanley.Miao <stanley.miao@windriver.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* omap: DMA: Fix multi-line commentsmanjugk manjugk2010-05-201-6/+12
| | | | | | | | | Multi line comments are fixed as per CodingStyle guidelines. Cc: Kevin Hilman <khilman@deeprootsystems.com> Signed-off-by: Manjunatha GK <manjugk@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* OMAP2/3/4: DMA: disable channel interrupts in omap_init_dma()Mika Westerberg2010-05-201-8/+19
| | | | | | | | | | | | | | | | | | | If we are softbooting another kernel using kexec, DMA controller state is not known when we are performing omap_init_dma(). It is possible that some DMA channels are already active. For example after kexec we get: <4>IRQ 0020 for non-allocated DMAchannel 5 <4>IRQ 0020 for non-allocated DMAchannel 5 <4>IRQ 0020 for non-allocated DMAchannel 5 <4>IRQ 0020 for non-allocated DMAchannel 5 <4>IRQ 0020 for non-allocated DMAchannel 5 To prevent any weird things happening, we disable all channel interrupts during init. Signed-off-by: Mika Westerberg <ext-mika.1.westerberg@nokia.com> Acked-by: Kevin Hilman <khilman@deeprootsystems.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* Merge branch 'v2.6.34-rc7.iommu' of git://gitorious.org/~doyu/lk/mainline ↵Tony Lindgren2010-05-208-151/+244
|\ | | | | | | into omap-for-linus
| * omap iommu: Reject unaligned addresses at setting page table entryHiroshi DOYU2010-05-141-0/+18
| | | | | | | | | | | | | | | | | | This rejects unaligned device virtual address('da') and physical address('pa') and informs error to caller when a page table entry is set. Otherwise, a wrong address can be used by IO device. Signed-off-by: Hiroshi DOYU <Hiroshi.DOYU@nokia.com> Cc: Hari Kanigeri <h-kanigeri2@ti.com>
| * omap iommu: Exit iteration if no possibility of available areaHiroshi DOYU2010-05-141-1/+4
| | | | | | | | | | | | | | Searching avaialable spaces should be stopped as soon as it turns out that there's no possibility with the rest of it. Signed-off-by: Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
| * omap iommu: Insert a gap page between IOVMAs against overrideHiroshi DOYU2010-05-141-3/+3
| | | | | | | | | | | | | | | | | | | | Inserting a gap page between IOVMAs could detect an override on other IOVMA with iommu fault. This was originally suggested by Sakari Ailus and based on the work and comment by David Cohen. Signed-off-by: Hiroshi DOYU <Hiroshi.DOYU@nokia.com> Cc: David Cohen <david.cohen@nokia.com> Cc: Sakari Ailus <Sakari.Ailus@nokia.com>
| * omap iommu: Make CONFIG_OMAP_IOMMU_DEBUG selectableHiroshi DOYU2010-05-141-2/+7
| | | | | | | | | | | | | | | | This CONFIG_OMAP_IOMMU_DEBUG option cannot be selected because it's not visible on menu. Make this option selectable. Signed-off-by: Hiroshi DOYU <Hiroshi.DOYU@nokia.com> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
| * omap iommu: Introduce iteration macro for iotlb entry scanHiroshi DOYU2010-05-141-27/+31
| | | | | | | | | | | | | | | | | | There are some places to scan iotlb entries. This iteration macro could make these code a bit simpler with proceeding iotlb entries transparently. Signed-off-by: Hiroshi DOYU <Hiroshi.DOYU@nokia.com> Tested-by: Hari Kanigeri <h-kanigeri2@ti.com>
| * omap iommu: add TLB preservation supportKanigeri, Hari2010-05-142-18/+29
| | | | | | | | | | | | | | This patch adds TLB preservation support to IOMMU module Signed-off-by: Hari Kanigeri <h-kanigeri2@ti.com> Signed-off-by: Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
| * omap iommu: missing check for TLB valid entryKanigeri, Hari2010-05-141-1/+1
| | | | | | | | | | | | | | Added the missing TLB valid entry setting for cam register Signed-off-by: Hari Kanigeri <h-kanigeri2@ti.com> Signed-off-by: Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
| * omap iommu: support for OMAP4Kanigeri, Hari2010-05-142-5/+57
| | | | | | | | | | | | | | This patch provides the iommu support for OMAP4 co-processors. Signed-off-by: Hari Kanigeri <h-kanigeri2@ti.com> Signed-off-by: Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
| * omap iommu: renamed omap3-iommu to omap-iommuKanigeri, Hari2010-05-142-14/+14
| | | | | | | | | | | | | | | | | | | | This patch includes changes to omap3-iommu.c file to make it generic for all OMAPs. Renamed omap3-iommu.c to omap-iommu.c [Hiroshi DOYU: Remove unnecessary "iommu-y" in Makefile] Signed-off-by: Hari Kanigeri <h-kanigeri2@ti.com> Signed-off-by: Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
* | OMAP: RX51: Add "vdds_sdi" supply voltage for SDIRoger Quadros2010-05-201-0/+15
| | | | | | | | | | | | | | | | The SDI Display subsystem needs access to the vdds_sdi supply regulator. This is TWL4030's VAUX1 supply on RX-51. Signed-off-by: Roger Quadros <roger.quadros@nokia.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@nokia.com>
* | Merge branch 'pm-next' of ↵Tony Lindgren2010-05-205-28/+41
|\ \ | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap-pm into omap-for-linus
| * | OMAP3: PM: Remove PER wakeup dependency on CORE.Mike Chan2010-05-121-8/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We can remove this wakeup dependency since now, when GPIO2-6 are enabled for IO-pad wakeup, PER domain is gauranteed to be awake or be woken up to service. The previous dependency did not handle all corner cases. Since there was no sleep dependency between CORE and PER domains, if PER enters RET and CORE is ON, PER will not be active for GPIO handling. Signed-off-by: Mike Chan <mike@android.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * | OMAP3: PM: Enable IO / IO-CHAIN wakeups for PERMike Chan2010-05-121-5/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | IO events can also come from GPIO modules, which reside in the PER domain. It is possible for the PER to enter RET while CORE is still in ON. If GPIO 2-6 are enabled for IO-pad wakeups, the PER domain will not wakeup in this case, unless we enable it. Signed-off-by: Mike Chan <mike@android.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * | OMAP3: PM: Enable wakeup from ads7846 touchscreenRanjith Lohithakshan2010-05-122-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch enables the wakeup capabilities of ads7846 touchscreen driver. ads7846 driver can now wakeup the system from suspend on OMAP3430 EVM and SDP boards. The earlier approach of enabling wakeup on the touchscreen GPIO pin during board level mux init is removed. Instead the wakeup flag in ads7846_platform_data is enabled. Based on the flag, the ads7846 driver will do an enable_irq_wake which will eventually call into the OMAP GPIO layer and will enable the wakeup capability on the GPIO pin. Signed-off-by: Ranjith Lohithakshan <ranjithl@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * | OMAP3EVM: Update pad configuration for wakeup enabled padsRanjith Lohithakshan2010-05-121-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | OMAP3530 TRM section 7.4.4.4.2 requires OFFOUTENABLE to be set (active low) if wakeup capabilities are enabled on a pad. During OFF mode testing on OMAP3530 EVM, it was observed that the device was not residing in the OFF state. The device enters into the OFF state and immediately exits from that state as if an IO wakeup event has occured. The issue was traced down to the pad configuration of wkaeup enabled pad's. Signed-off-by: Ranjith Lohithakshan <ranjithl@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * | OMAP3: PM: Add milliseconds interface to suspend wakeup timerAri Kauppi2010-05-123-7/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Millisecond resolution is possible and there are use cases for it (automatic testing). Seconds-based interface is preserved for compatibility. Signed-off-by: Ari Kauppi <Ext-Ari.Kauppi@nokia.com> Reviewed-by: Phil Carmody <ext-phil.2.carmody@nokia.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * | OMAP3: PRCM interrupt: only check and clear enabled PRCM IRQsKevin Hilman2010-05-121-5/+12
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | While handling PRCM IRQs, mask out interrupts that are not enabled in PRM_IRQENABLE_MPU. If these are not masked out, non-enabled interrupts are caught, a WARN() is printed due to no 'handler' and the events are cleared. In addition to being noisy, this can also interfere with independent polling of this register by SR/VP code. This was noticed using SmartReflex transitions which cause the VPx_* interrupts to be handled since they are set in PRM_IRQSTATUS_MPU even but not enabled in PRM_IRQENABLE_MPU. Acked-by: Mike Turquette <mturquette@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* | Merge branch 'gpio-2.6.35' of ↵Tony Lindgren2010-05-204-136/+53
|\ \ | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap-pm into omap-for-linus
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