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* [ARM] tegra: Add cpufreq supportColin Cross2010-10-223-0/+187
| | | | | | | | | Implement cpufreq support for the Tegra SOC. DVFS is handled by the core virtual cpu clock. The frequencies of the two cores are tied together, the highest frequency requested by either core determines the actual frequency. Signed-off-by: Colin Cross <ccross@android.com>
* [ARM] tegra: common: Update common clock init tableColin Cross2010-10-221-2/+2
| | | | | | Renames clocks in the clock init table to match the datasheet names Signed-off-by: Colin Cross <ccross@android.com>
* [ARM] tegra: clock: Add dvfs support, bug fixes, and cleanupsColin Cross2010-10-227-210/+1005
| | | | | | | | | | | | | | | | | | | | | | | | | | | | - Add drivers to clock lookup table - Add new pll_m entries - Support I2C U16 divider - Fix rate reporting on 32.768kHz clock - Call propagate rate only if set_rate succeeds - Add support for audio_sync clock - Add 24MHz to PLLA frequency list - Correct i2s1/2/spdifout mux - Add suspend support - Fix enable/disable parent clocks in set_parent - Add max_rate parameter to all clocks - DVFS support - Add virtual cpu clock with dvfs - Support clk_round_rate - Fix requesting very high periph frequencies - Add quirks for PLLU: PLLU is slightly different from the rest of the PLLs. The lock enable bit is at bit 22 instead of 18 in the MISC register, and the post divider field is a single bit with reversed values from other PLLs. - Simplify recalculating clock rates - Fix UART divider flags - Remove unused clock ops Signed-off-by: Colin Cross <ccross@android.com>
* [ARM] tegra: Add support for reading fusesColin Cross2010-10-224-0/+111
| | | | | | | | The Tegra SOC contains fuses to identify the CPU type and bin, and a unique id. The CPU info is required to determine the correct voltages for each cpu and core frequency. Signed-off-by: Colin Cross <ccross@android.com>
* [ARM] tegra: gpio: Add suspend and wake supportColin Cross2010-10-222-13/+95
| | | | | | | Includes checkpatch fixes and TEGRA_NR_GPIOS changes from Mike Rapoport <mike@compulab.co.il> Signed-off-by: Colin Cross <ccross@android.com>
* [ARM] tegra: pinmux: add safe values, move tegra2, add suspendColin Cross2010-10-225-396/+603
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - the reset values for some pin groups in the tegra pin mux can result in functional errors due to conflicting with actively-configured pin groups muxing from the same controller. this change adds a known safe, non- conflicting mux for every pin group, which can be used on platforms where the pin group is not routed to any peripheral - also add each pin group's I/O voltage rail, to enable platform code to map from the pin groups used by each interface to the regulators used for dynamic voltage control - add routines to individually configure the tristate, pin mux and pull- ups for a pingroup_config array, so that it is possible to program individual values at run-time without modifying other values. this allows driver power-management code to reprogram individual interfaces into lower power states during idle / suspend, or to reprogram the pin mux to support multiple physical busses per internal controller (e.g., sharing a single I2C or SPI controller across multiple pin groups) - move chip-specific data like pingroups and drive-pingroups out of the common code and into chip-specific code - fix debug output for group with no pullups - add a TEGRA_MUX_SAFE function. Setting a pingroup to TEGRA_MUX_SAFE will automatically select a mux setting that is guaranteed not to conflict with any of the hardware blocks. Signed-off-by: Gary King <gking@nvidia.com>
* [ARM] tegra: add suspend and mirror irqs to legacy controllerGary King2010-10-222-0/+139
| | | | | | | | | | mirror IRQ enable and disable operations on the legacy PPI system interrupt controller, since the legacy controller is responsible for responding to wakeup interrupts when the CPU is in LP2 idle mode save the irq controller state on suspend and restore on resume Signed-off-by: Gary King <gking@nvidia.com>
* [ARM] tegra: Add legacy irq supportColin Cross2010-10-223-1/+146
| | | | | | | | The "legacy irq controller" duplicates the functionality of the GIC, but remains powered during the cpu suspend and idle modes that power down the CPU and the GIC. Signed-off-by: Colin Cross <ccross@android.com>
* [ARM] tegra: update iomapColin Cross2010-10-223-6/+39
| | | | | | | | Add missing io address map entries from datasheet. Add the IRAM area to the statically mapped io regions. Correct the onewire, USB, and statmon addresses Signed-off-by: Colin Cross <ccross@android.com>
* Merge branch 'devel' of master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds2010-10-22814-6582/+24047
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm: (278 commits) arm: remove machine_desc.io_pg_offst and .phys_io arm: use addruart macro to establish debug mappings arm: return both physical and virtual addresses from addruart arm/debug: consolidate addruart macros for CONFIG_DEBUG_ICEDCC ARM: make struct machine_desc definition coherent with its comment eukrea_mbimxsd-baseboard: Pass the correct GPIO to gpio_free cpuimx27: fix compile when ULPI is selected mach-pcm037_eet: fix compile errors Fixing ethernet driver compilation error for i.MX31 ADS board cpuimx51: update board support mx5: add cpuimx51sd module and its baseboard iomux-mx51: fix GPIO_1_xx 's IOMUX configuration imx-esdhc: update devices registration mx51: add resources for SD/MMC on i.MX51 iomux-mx51: fix SD1 and SD2's iomux configuration clock-mx51: rename CLOCK1 to CLOCK_CCGR for better readability clock-mx51: factorize clk_set_parent and clk_get_rate eukrea_mbimxsd: add support for DVI displays cpuimx25 & cpuimx35: fix OTG port registration in host mode i.MX31 and i.MX35 : fix errate TLSbo65953 and ENGcm09472 ...
| * arm: remove machine_desc.io_pg_offst and .phys_ioNicolas Pitre2010-10-20361-852/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since we're now using addruart to establish the debug mapping, we can remove the io_pg_offst and phys_io members of struct machine_desc. The various declarations were removed using the following script: grep -rl MACHINE_START arch/arm | xargs \ sed -i '/MACHINE_START/,/MACHINE_END/ { /\.\(phys_io\|io_pg_offst\)/d }' [ Initial patch was from Jeremy Kerr, example script from Russell King ] Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org> Acked-by: Eric Miao <eric.miao at canonical.com>
| * arm: use addruart macro to establish debug mappingsJeremy Kerr2010-10-201-4/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | Since we can get both physical and virtual addresses from the addruart macro, we can use this to establish the debug mappings. In the case of CONFIG_DEBUG_ICEDCC, we don't need any mappings, but may still need to setup r7 correctly. Incorporating ASM changes from Nicolas Pitre <npitre@fluxnic.net>. Signed-off-by: Jeremy Kerr <jeremy.kerr@canonical.com> Tested-by: Kevin Hilman <khilman@deeprootsystems.com>
| * arm: return both physical and virtual addresses from addruartJeremy Kerr2010-10-2056-454/+440
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rather than checking the MMU status in every instance of addruart, do it once in kernel/debug.S, and change the existing addruart macros to return both physical and virtual addresses. The main debug code can then select the appropriate address to use. This will also allow us to retreive the address of a uart for the MMU state that we're not current in. Updated with fixes for OMAP from Jason Wang <jason77.wang@gmail.com> and Tony Lindgren <tony@atomide.com>, and fix for versatile express from Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>. Signed-off-by: Jeremy Kerr <jeremy.kerr@canonical.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Jason Wang <jason77.wang@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com> Tested-by: Kevin Hilman <khilman@deeprootsystems.com>
| * arm/debug: consolidate addruart macros for CONFIG_DEBUG_ICEDCCJeremy Kerr2010-10-201-11/+2
| | | | | | | | | | | | | | We have the same (empty) macro for all IDEDCC flavours, so consolidate it to one. Signed-off-by: Jeremy Kerr <jeremy.kerr@canonical.com>
| * ARM: make struct machine_desc definition coherent with its commentNicolas Pitre2010-10-201-1/+2
| | | | | | | | | | | | | | | | As mentioned in the comment right at the top, the first four fields are directly accessed by assembly code in head.S. Move nr_irqs so the comment is true again. Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| * Merge branch 'devel-stable' into develRussell King2010-10-19374-4397/+18210
| |\
| | * Merge branch 'for-rmk' of git://git.pengutronix.de/git/imx/linux-2.6 into ↵Russell King2010-10-1933-190/+1101
| | |\ | | | | | | | | | | | | devel-stable
| | | * eukrea_mbimxsd-baseboard: Pass the correct GPIO to gpio_freeFabio Estevam2010-10-191-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pass the correct GPIO to gpio_free Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Eric Bénard <eric@eukrea.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| | | * cpuimx27: fix compile when ULPI is selectedEric Bénard2010-10-191-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | without this patch we get : arch/arm/mach-imx/built-in.o: In function `eukrea_cpuimx27_init': eukrea_mbimx27-baseboard.c:(.init.text+0x44c): undefined reference to `mxc_ulpi_access_ops' Signed-off-by: Eric Bénard <eric@eukrea.com> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
| | | * mach-pcm037_eet: fix compile errorsEric Bénard2010-10-191-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | this patch fix the following errors : arch/arm/mach-mx3/mach-pcm037_eet.c:62: error: implicit declaration of function 'MXC_SPI_CS' arch/arm/mach-mx3/mach-pcm037_eet.c:185: error: implicit declaration of function 'imx35_add_spi_imx0' from the Kconfig pcm037 is i.MX31 based and not i.MX35 so replace imx35_add_spi_imx0 by imx31_add_spi_imx0 Signed-off-by: Eric Bénard <eric@eukrea.com> [ukl: remove unneeded #include <mach/spi.h>] Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
| | | * Fixing ethernet driver compilation error for i.MX31 ADS boardIan Lartey2010-10-192-6/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is only a partial revert of "ARM: mx3/mx31ads: fold board header in its only user" [commit ccfa7c269843001077df02d98918c6c9bde91395)] As some of the the board defines are also used in the cs89x0 ethernet driver by the i.MX31 ADS. Signed-off-by: Ian Lartey <ian@opensource.wolfsonmicro.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| | | * cpuimx51: update board supportEric Bénard2010-10-193-1/+34
| | | | | | | | | | | | | | | | | | | | | | | | add NAND, SDHC Signed-off-by: Eric Bénard <eric@eukrea.com>
| | | * mx5: add cpuimx51sd module and its baseboardEric Bénard2010-10-196-1/+531
| | | | | | | | | | | | | | | | Signed-off-by: Eric Bénard <eric@eukrea.com>
| | | * iomux-mx51: fix GPIO_1_xx 's IOMUX configurationEric Bénard2010-10-191-10/+10
| | | | | | | | | | | | | | | | | | | | | | | | this patch really configure the GPIO in GPIO mode. Signed-off-by: Eric Bénard <eric@eukrea.com>
| | | * imx-esdhc: update devices registrationEric Bénard2010-10-1911-45/+80
| | | | | | | | | | | | | | | | | | | | | | | | Tested on i.MX25 and i.MX35 and i.MX51 Signed-off-by: Eric Bénard <eric@eukrea.com>
| | | * mx51: add resources for SD/MMC on i.MX51Eric Bénard2010-10-192-0/+113
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | the attached patch allows SD to work on i.MX51 with Wolfram's drivers Tested on i.MX51. Based on original patch from: Richard Zhu <r65037@freescale.com> Signed-off-by: Eric Bénard <eric@eukrea.com>
| | | * iomux-mx51: fix SD1 and SD2's iomux configurationEric Bénard2010-10-191-12/+27
| | | | | | | | | | | | | | | | | | | | Based on original patch from: Richard Zhu <r65037@freescale.com> Signed-off-by: Eric Bénard <eric@eukrea.com>
| | | * clock-mx51: rename CLOCK1 to CLOCK_CCGR for better readabilityEric Bénard2010-10-191-2/+2
| | | | | | | | | | | | | | | | Signed-off-by: Eric Bénard <eric@eukrea.com>
| | | * clock-mx51: factorize clk_set_parent and clk_get_rateEric Bénard2010-10-191-94/+48
| | | | | | | | | | | | | | | | Signed-off-by: Eric Bénard <eric@eukrea.com>
| | | * eukrea_mbimxsd: add support for DVI displaysEric Bénard2010-10-192-2/+68
| | | | | | | | | | | | | | | | Signed-off-by: Eric Bénard <eric@eukrea.com>
| | | * cpuimx25 & cpuimx35: fix OTG port registration in host modeEric Bénard2010-10-192-20/+8
| | | | | | | | | | | | | | | | | | | | | | | | the PHY is UTMI so don't create an ULPI viewpoint. Signed-off-by: Eric Bénard <eric@eukrea.com>
| | | * i.MX31 and i.MX35 : fix errate TLSbo65953 and ENGcm09472Eric Bénard2010-10-191-3/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Without this exiting WFI can result in cache corruption. Code taken from Freescale's 2.6.27 BSP and tested on i.MX35 Signed-off-by: Eric Bénard <eric@eukrea.com>
| | | * mx25: fix compile error in platform-imx-dma.cEric Bénard2010-10-191-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | this patch fix the following errors : arch/arm/plat-mxc/devices/platform-imx-dma.c:44: error: ‘MX25_SDMA_BASE_ADDR’ undeclared here (not in a function) arch/arm/plat-mxc/devices/platform-imx-dma.c:44: error: ‘MX25_INT_SDMA’ undeclared here (not in a function) Signed-off-by: Eric Bénard <eric@eukrea.com> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
| | | * mx25: fix clock's calculationEric Bénard2010-10-191-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * get_rate_arm : when 400MHz clock is selected (cctl & 1<<14), ARM clock is 400MHz (MPLL * 3 / 4) and not 800MHz * get_rate_per : peripherals's clock is derived from AHB and not from IPG (ref manual : figure 5-1) * can2_clk : use the correct ID * without this patch, peripherals getting their clock from PER clocks work fine because of the 2 errors which fix themselves (ARM clock x 2 and per clock actually based on IPG which is AHB/2) but flexcan can't work as it gets its clock from IPG and thus calculates its bitrate using a reference value which is twice what it really is. Signed-off-by: Eric Bénard <eric@eukrea.com>
| | | * ARM: imx: add lost 3rd imx-i2c device for mx35Marc Kleine-Budde2010-10-191-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | During the reorganisation of the imx-i2c devices (in 64de5ec168d9743903e6ec482c3e9f37af49f9c1) the 3rd imx-i2c device for the mx35 got lost. This patch adds the missing device. Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| | | * ARM: imx: Add iram allocator functionsDinh Nguyen2010-10-194-0/+119
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add IRAM(Internal RAM) allocation functions using GENERIC_ALLOCATOR. The allocation size is 4KB multiples to guarantee alignment. The idea for these functions is for i.MX platforms to use them to dynamically allocate IRAM usage. Applies on 2.6.36-rc7 Signed-off-by: Dinh Nguyen <Dinh.Nguyen@freescale.com> Reviewed-by: Amit Kucheria <amit.kucheria@canonical.com> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| | * | Merge branch 'for-rmk' of ↵Russell King2010-10-1995-2067/+3798
| | |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into devel-stable Conflicts: arch/arm/mach-at91/include/mach/system.h arch/arm/mach-imx/mach-cpuimx27.c AT91 conflict resolution: Acked-by: Anders Larsen <al@alarsen.net> IMX conflict resolution confirmed by Uwe Kleine-König.
| | | * | ARM: S5PV310: Fix build error on GPIO mapKukjin Kim2010-10-192-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes build error about GPIO address due to conflict of commit 4d914705 and 19a2c065. - commit 4d914705: Fix on GPIO base addresses - commit 19a2c065: Moves initial map for merging S5P64X0 Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| | | * | ARM: S5P64X0: Bug fix on errors of build with CONFIG_PREEMPT_NONESeungChull Suh2010-10-181-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds header <linux/sched.h> into the below files for build with CONFIG_PREEMPT_NONE. arch/arm/mach-s5p64x0/cpu.c Signed-off-by: Seung-Chull Suh <sc.suh@samsung.com> [kgene.kim@samsung.com: edited title and message] Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| | | * | ARM: S5P64X0: Fix GPIO rbank supportAtul Dahiya2010-10-181-5/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The patch removes s3c_gpio_lock/unlock to avoid acquiring the lock recursively as lock is already acquired by calling function. Signed-off-by: Atul Dahiya <atul.dahiya@samsung.com> Signed-off-by: Sangbeom Kim <sbkim73@samsung.com> [kgene.kim@samsung.com: removed useless variable due to this] Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| | | * | ARM: S5P64X0: Replace the 6440 system device class definition with 64x0Abhilash Kesavan2010-10-181-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The s5p64x0_sysclass should be used in place of the obselete s5p6440_sysclass. Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: Sangbeom Kim <sbkim73@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| | | * | ARM: S5P64X0: FIX typo in the ADC device nameNaveen Krishna Ch2010-10-181-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix the touch screen device name from s3c64x0-adc to s3c64xx-adc. Signed-off-by: Naveen Krishna Ch <ch.naveen@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| | | * | ARM: s5p64x0_defconfig: Update for support S5P6440 and S5P6450Kukjin Kim2010-10-181-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch updates s5p64x0_defconfig and changes the name from s5p6440_defconfig so that can support S5P6440 and S5P6450 with one kernel. Tested on SMDK6440(S5P6440) and SMDK6450(S5P6450). Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| | | * | ARM: S5P64X0: Add UART serial support for S5P6450Kukjin Kim2010-10-181-0/+58
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds UART serial port support for S5P6450 SoC. The S5P6450 has 6 UARTs, so adds resource of UART4 and UART5. And to fix membase which is in serial/samsung.c is from Ben Dooks. Signed-off-by: Kukjin Kim <kgene.kim@samsung.com> Cc: Ben Dooks <ben-linux@fluff.org>
| | | * | ARM: S5P64X0: Move SMDK6440 board file and Add SMDK6450 board fileKukjin Kim2010-10-182-35/+234
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch moves smdk6440 board file from mach-s5p6440 into the new mach-s5p64x0 directory and adds smdk6450 board file. Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| | | * | ARM: S5P64X0: Move GPIO support files for merge S5P64X0Kukjin Kim2010-10-184-138/+208
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch moves S5P6440 GPIO support files from mach-s5p6440 into the new mach-s5p64x0 for merge S5P6440 and S5P6450 SocS. NOTE: Not supported S5P6450 GPIO yet. Will be supported soon. Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| | | * | ARM: S5P64X0: Add S5P6450 I2C supportKukjin Kim2010-10-183-10/+51
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds S5P6450 I2C support in the ARCH_S5P64X0. And moves S5P6440 I2C support files into the mach-s5p64x0 together. Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| | | * | ARM: S5P64X0: Move DMA support for S5P64X0Kukjin Kim2010-10-183-21/+85
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch moves DMA support files in the mach-s5p64x0 for S5P6440 and S5P6450 SoCs. Signed-off-by: Kukjin Kim <kgene.kim@samsung.com> Cc: Jassi Brar <jassi.brar@samsung.com>
| | | * | ARM: S5P64X0: Update Audio supportKukjin Kim2010-10-188-321/+422
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch updates Audio and SPI for S5P6440 and S5P6450 SoCs. Signed-off-by: Kukjin Kim <kgene.kim@samsung.com> Cc: Jassi Brar <jassi.brar@samsung.com>
| | | * | ARM: S5P64X0: Update Timer supportKukjin Kim2010-10-182-10/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch updates timer support for S5P6440 and S5P6450 SoCs. Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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