| Commit message (Collapse) | Author | Age | Files | Lines |
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* 'blk-end-request' of git://git.kernel.dk/linux-2.6-block: (30 commits)
blk_end_request: changing xsysace (take 4)
blk_end_request: changing ub (take 4)
blk_end_request: cleanup of request completion (take 4)
blk_end_request: cleanup 'uptodate' related code (take 4)
blk_end_request: remove/unexport end_that_request_* (take 4)
blk_end_request: changing scsi (take 4)
blk_end_request: add bidi completion interface (take 4)
blk_end_request: changing ide-cd (take 4)
blk_end_request: add callback feature (take 4)
blk_end_request: changing ide normal caller (take 4)
blk_end_request: changing cpqarray (take 4)
blk_end_request: changing cciss (take 4)
blk_end_request: changing ide-scsi (take 4)
blk_end_request: changing s390 (take 4)
blk_end_request: changing mmc (take 4)
blk_end_request: changing i2o_block (take 4)
blk_end_request: changing viocd (take 4)
blk_end_request: changing xen-blkfront (take 4)
blk_end_request: changing viodasd (take 4)
blk_end_request: changing sx8 (take 4)
...
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This patch converts arm's OMAP mailbox driver to use
blk_end_request interfaces.
If the original code was converted literally, blk_end_request would
be called with '-EIO' because end_that_request_last() were called
with '0' (i.e. failure).
But I think these '0's are bugs in the original code because it's
unlikely that all requests are treated as failure.
(The bugs should have no effect unless these requests have an end_io
callback.)
So I changed them to pass '0' (i.e. success) to blk_end_request.
Cc: Toshihiro Kobayashi <toshihiro.kobayashi@nokia.com>
Cc: Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
Signed-off-by: Kiyoshi Ueda <k-ueda@ct.jp.nec.com>
Signed-off-by: Jun'ichi Nomura <j-nomura@ce.jp.nec.com>
Signed-off-by: Jens Axboe <jens.axboe@oracle.com>
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* pxa-plat: (53 commits)
[ARM] 4762/1: Basic support for Toradex Colibri module
[ARM] pxa: fix mci_init functions returning -1
[ARM] 4737/1: Refactor corgi_lcd to improve readability + bugfix
[ARM] 4747/1: pcm027: support for pcm990 baseboard for phyCORE-PXA270
[ARM] 4746/1: pcm027: network support for phyCORE-PXA270
[ARM] 4745/1: pcm027: default configuration
[ARM] 4744/1: pcm027: add support for phyCORE-PXA270 CPU module
[NET] smc91x: Make smc91x use IRQ resource trigger flags
[ARM] pxa: add default config for littleton
[ARM] pxa: add basic support for Littleton (PXA3xx Form Factor Platform)
[ARM] 4664/1: Add basic support for HTC Magician PDA phones
[ARM] 4649/1: Base support for pxa-based Toshiba e-series PDAs.
[ARM] pxa: skip registers saving/restoring if entering standby mode
[ARM] pxa: fix PXA27x resume
[ARM] pxa: Avoid fiddling with CKEN register on suspend
[ARM] pxa: Add PXA3 standby code hooked into the IRQ wake scheme
[ARM] pxa: Add zylonite MFP wakeup configurations
[ARM] pxa: program MFPs for low power mode when suspending
[ARM] pxa: make MFP configuration processor independent
[ARM] pxa: remove un-used pxa3xx_mfp_set_xxx() functions
...
Conflicts:
arch/arm/mach-pxa/ssp.c
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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This patch adds support for Toradex' PXA27x based Colibri module.
It's kept as simple as possible to only provide basic functionality.
A default config is also included.
Signed-off-by: Daniel Mack <daniel@caiaq.de>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Fix all those PXA mci_init functions which return -1 rather than
propagating the error code to the higher levels. Remove the silly
set_irq_type() calls as well - use the flags for request_irq()
instead.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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This patch refactors the code in corgi_lcd.c moving it to the board
specific corgi and spitz files where appropriate instead of the
existing ifdef mess which hinders readability.
Fix spitz_get_hsync_len() to call get_hsync_invperiod so pxafb can be
compiled as a module.
The confusing variables which represent the inverse horizintal sync
period are renamed to "invperiod" consistently.
An incorrect comment in corgi_ts.c is also corrected.
Signed-off-by: Richard Purdie <rpurdie@rpsys.net>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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This patch adds baseboard support for the phyCORE-PXA270 development
kit (aka PCM-990).
This example shows how to use some phyCORE-PXA270 CPU module features
on a baseboard in a standard manner. It could be used as a starting
point for custom baseboard development.
V2:
After comments by Eric Miao:
- IRQ chained handler fixed
- video/graphic support moved to separate patch
- ifdef/endif hell reduced ;-)
V3:
After comments by Russell King
- initialise the mmci platform data statically
V4:
After comments by Russell King
- wrong return value in pcm990_mci_init() fixed
Signed-off-by: Juergen Beisert <j.beisert@pengutronix.de>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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This patch adds a basic configration for the phyCORE-PXA270 development kit. In this case development kit means PCM-990 (main baseboard).
Signed-off-by: Juergen Beisert <j.beisert@pengutronix.de>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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This patch adds main support for the generic phyCORE-PXA270 CPU module
(aka PCM-027). Its as generic as possible to support any kind of baseboard.
Note: Neither the CPU module nor the pcm027.c implementation can work without
a baseboard support. Baseboard support can be added by the PCM-990 or any
custom variant.
V2:
After comments by Eric Miao:
- Currently unsupported devices moved into separate patch
- direct call of baseboard initialisation
V3:
After comments by Russell King
- sort include files
- setting RTC bit for power control removed
- style problems fixed (discovered by checkpatch.pl)
Signed-off-by: Juergen Beisert <j.beisert@pengutronix.de>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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smc91x is shared between many different platforms. Each platform needs
to specify the interrupt type, and in some cases the irq type depends
on more than just the build configuration - it depends on runtime
checks.
Rather than throwing this code into the SMC_IRQ_FLAGS definition, provide
a way for these flags to be passed via the IRQ resource itself.
Note that IRQF_TRIGGER_* constants are intentionally defined to correspond
with the IORESOURCE_IRQ_* interrupt type flags, in much the same way that
the low bits of PCI iomem resources correspond with the BAR flag bits.
Also provide a way to configure smc91x to read the IRQ flags from the
resource. Once all platforms have been converted over (signified
by all definitions of SMC_IRQ_FLAGS being -1) SMC_IRQ_FLAGS should
be removed.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Acked-by: Nicolas Pitre <nico@cam.org>
Acked-by: Jeff Garzik <jgarzik@redhat.com>
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default to
- PXA300/PXA310 support only (there isn't any littleton board with PXA320
processor for now)
- smc91x ethernet support with NFS rootfs
- LCD framebuffer support with graphics console
Signed-off-by: eric miao <eric.miao>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Signed-off-by: eric miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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This includes irda, gpio keys, pxafb, backlight, ohci and flash
(read-only).
Signed-off-by: Philipp Zabel <philipp.zabel@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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This patch contains the base code to boot the Toshiba e330, e740,
e750, e400, and e800 PDAs.
Signed-off-by: Ian Molton <spyro@f2s.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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registers are retained during standby mode, thus it's not necessary
to save/restore and checksum
Signed-off-by: eric miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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When PXA27x wakes up, tick_resume_oneshot() tries to set a timer
interrupt to occur immediately. Since PXA27x requires at least
MIN_OSCR_DELTA, this causes us to flag an error.
tick_program_event() then increments the next event time by
min_delta_ns. However, by the time we get back to programming
the next event, the OSCR has incremented such that we fail again.
We repeatedly retry, but the OSCR is too fast for us - we never
catch up, so we never break out of the loop - resulting in us
never apparantly resuming.
Fix this by doubling min_delta_ns.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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The PXA manuals indicate that when in standby or sleep modes, clocks to
peripherals are shut off by the processor itself. Eg:
PXA270 standby: "In standby mode, all clocks are disabled except those
for the power manager and the RTC."
PXA270 sleep: "In sleep mode, all clocks are disabled to the processor
and to all peripherals except the RTC."
PXA255 sleep: "In Sleep Mode, all processor and peripheral clocks are
disabled, except the RTC."
Therefore, it should be safe to leave the clock enable register alone
prior to entering low power modes for these SoCs.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Wakeup sources on PXA3 are enabled at two levels. First, the MFP
configuration has to be set to enable which edges a specific pin
will trigger a wakeup. The pin also has to be routed to a functional
unit. Lastly, the functional unit must be enabled as a wakeup source
in the appropriate AD*ER registers (AD2D0ER for standby resume.)
This doesn't fit well with the IRQ wake scheme - we currently do a
best effort conversion from IRQ numbers to functional unit wake enable
bits. For instance, there's several USB client related enable bits but
there's no corresponding IRQs to determine which you'd want. Conversely,
there's a single enable bit covering several functional units.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Hook the MFP code into the power management code so that the MFPs can
be reconfigured when suspending and resuming. However, note the FIXME
- low power mode MFP configuration may depend on the system state being
entered.
Also note that we have to clear any detected edge events prior to
entering a low power mode - otherwise we immediately wake up.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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There are two reasons for making the MFP configuration to be processor
independent, i.e. removing the relationship of configuration bits with
actual MFPR register settings:
1. power management sometimes requires the MFP to be configured
differently when in run mode or in low power mode
2. for future integration of pxa{25x,27x} GPIO configurations
The modifications include:
1. introducing of processor independent MFP configuration bits, as
defined in [include/asm-arm/arch-pxa/mfp.h]:
bit 0.. 9 - MFP Pin Number (1024 Pins Maximum)
bit 10..12 - Alternate Function Selection
bit 13..15 - Drive Strength
bit 16..18 - Low Power Mode State
bit 19..20 - Low Power Mode Edge Detection
bit 21..22 - Run Mode Pull State
and so on,
2. moving the processor dependent code from mfp.h into mfp-pxa3xx.h
3. cleaning up of the MFPR bit definitions
4. mapping of processor independent MFP configuration into processor
specific MFPR register settings is now totally encapsulated within
pxa3xx_mfp_config()
5. using of "unsigned long" instead of invented type of "mfp_cfg_t"
according to Documentation/CodingStyle Chapter 5, usage of this
in platform code will be slowly removed in later patches
Signed-off-by: eric miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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pxa3xx_mfp_set_xxx() functions are originally provided for overwriting
MFP configurations performed by pxa3xx_mfp_config(), the usage of such
a dirtry trick is not recommended, since there is currently no user of
these functions, they are safely removed
Signed-off-by: eric miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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There's no point building standby/sleep code for processors which
aren't configured.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Signed-off-by: eric miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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PXA3 has a different memory controller from PXA2 platforms. Avoid
clashing definitions by moving the PXA2 definitions to pxa2xx-regs.h
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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The mapping for physical address 0x48000000 is not sufficient
to allow access to the dynamic memory controller configuration
registers on PXA3. These registers need to be accessed to
reconfigure the SDRAM when waking from a low power mode.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Signed-off-by: eric miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Signed-off-by: eric miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Signed-off-by: eric miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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This patch is to add the third mmc controller support _only_
for pxa310.
On zylonite, the third controller support one slot.
Signed-off-by: Bridge Wu <bridge.wu@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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This patch is to add the second mmc controller support for pxa3xx.
It's valid for pxa3[0|1|2]0.
On zylonite, the second controller has no slot.
Signed-off-by: Bridge Wu <bridge.wu@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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This patchis to add the first mmc controller support for pxa3xx.
It's valid for pxa3[0|1|2]0.
On zylonite, the first controller supports two slots, this patch
only support the first one right now.
Signed-off-by: Bridge Wu <bridge.wu@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Considering that generic.c is getting more and more bloated by device
information, moving that part out side will be much cleaner.
Signed-off-by: eric miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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This patch is to move pxamci DMA specific code to corresponding
platform layer because using DRCMRRXMMC/DRCMRTXMMC in pxamci.c makes
the driver code dedicated to platform which is not extensible.
It is applicable to all pxa platforms.
Signed-off-by: Bridge Wu <bridge.wu@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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There have been patches hanging around for ages to add support for
cpufreq to PXA255 processors. It's about time we applied one.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Initialise the SSP driver at arch_initcall() time, so it's available
for other drivers to use it.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Only register the "cpld_irq" sysclass for mainstone/lubbock if we're
running on one of those platforms.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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1. make pxa2xx_spi.c use ssp_request() and ssp_free() to get the common
information of the designated SSP port.
2. remove those IRQ/memory request code, ssp_request() has done that for
the driver
3. the SPI platform device is thus made psuedo, no resource (memory/IRQ)
has to be defined, all will be retreived by ssp_request()
4. introduce ssp_get_clk_div() to handle controller difference in clock
divisor setting
5. use clk_xxx() API for clock enable/disable, and clk_get_rate() to
handle the different SSP clock frequency between different processors
Signed-off-by: eric miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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1. change SSP register definitions from absolute virtual addresses to
offsets
2. use __raw_writel()/__raw_readl() for functions of ssp_xxxx()
Signed-off-by: eric miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Signed-off-by: eric miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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1. define "struct ssp_device" for SSP information, which is requested
and released by function ssp_request()/ssp_free()
2. modify the ssp_init() and ssp_exit() to use the interface
Signed-off-by: eric miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Signed-off-by: eric miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Signed-off-by: eric miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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OSCR is supposed to monotonically increment; however restoring it
to a time prior to OSMR0 may result in it being wound backwards.
Instead, if OSMR0 is within the minimum expiry time, wind OSMR0
forwards.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Apparantly, the generic time subsystem can accurately emulate periodic
mode via the one-shot support code, so we don't need our own periodic
emulation code anymore. Just ensure that we build support for one shot
into the generic time subsystem.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Linux has framebuffer backlight support infrastructure which should
be used to expose backlight attributes. Mainstone should use it.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Only register the MMC, framebuffer, I2C and FICP devices when the
platform supplies the necessary platform data structures for the
devices.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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* orion: (26 commits)
[ARM] Orion: implement power-off method for QNAP TS-109/209
[ARM] Orion: add support for QNAP TS-109/TS-209
[ARM] Orion: I2C support
[I2C] i2c-mv64xxx: Don't set i2c_adapter.retries
[I2C] Split mv643xx I2C platform support
[ARM] Orion: enable CONFIG_RTC_DRV_M41T80 for D-Link DNS-323
[ARM] Orion defconfig
[ARM] Orion: add support for Orion/MV88F5181 based D-Link DNS-323
[ARM] Orion: MV88F5181 support bits
[ARM] Orion: Buffalo/Revogear Kurobox Pro support
[ARM] OrionNAS RD board support
[ARM] Orion: support for Marvell Orion-2 (88F5281) Development Board
[ARM] Orion: common platform setup for Gigabit Ethernet port
[ARM] Orion: platform device registration for UART, USB and NAND
[ARM] Orion: system timer support
[ARM] Orion edge GPIO IRQ support
[ARM] Orion: IRQ support
[ARM] Orion: provide GPIO method for enabling hardware assisted blinking
[ARM] Orion: GPIO support
[ARM] Orion: programable address map support
...
Conflicts:
arch/arm/Kconfig
arch/arm/Makefile
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Since the PIC is attached to UART1, it doesn't need a kernel device driver
of its own; but powering off is something that the kernel should do, so
this patch forcefully configures the UART1 for 19200 baud and sends the
character that tells the PIC to cut the power.
Signed-off-by: Herbert Valerio Riedel <hvr@gnu.org>
Cc: Byron Bradley <byron.bbradley@gmail.com>
Acked-by: Nicolas Pitre <nico@marvell.com>
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This patch adds support for the Orion/MV88F5182 based QNAP
TS-109/TS-209 NAS device. The driver for the S-35390A RTC
chip on this board has been submitted to LKML separately.
Signed-off-by: Byron Bradley <byron.bbradley@gmail.com>
Tested-by: Oyvind Repvik <repvik@kynisk.com>
Tested-by: Tim Ellis <timtimred@foonas.org>
Tested-by: Herbert Valerio Riedel <hvr@gnu.org>
Acked-by: Tzachi Perelstein <tzachi@marvell.com>
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