| Commit message (Collapse) | Author | Age | Files | Lines |
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Christoph reported a nice splat which illustrated a race in the new stack
based kmap_atomic implementation.
The problem is that we pop our stack slot before we're completely done
resetting its state -- in particular clearing the PTE (sometimes that's
CONFIG_DEBUG_HIGHMEM). If an interrupt happens before we actually clear
the PTE used for the last slot, that interrupt can reuse the slot in a
dirty state, which triggers a BUG in kmap_atomic().
Fix this by introducing kmap_atomic_idx() which reports the current slot
index without actually releasing it and use that to find the PTE and delay
the _pop() until after we're completely done.
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Reported-by: Christoph Hellwig <hch@infradead.org>
Acked-by: Rik van Riel <riel@redhat.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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Use the new {max,min}3 macros to save some cycles and bytes on the stack.
This patch substitutes trivial nested macros with their counterpart.
Signed-off-by: Hagen Paul Pfeifer <hagen@jauu.net>
Cc: Joe Perches <joe@perches.com>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: Hartley Sweeten <hsweeten@visionengravers.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Herbert Xu <herbert@gondor.apana.org.au>
Cc: Roland Dreier <rolandd@cisco.com>
Cc: Sean Hefty <sean.hefty@intel.com>
Cc: Pekka Enberg <penberg@cs.helsinki.fi>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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Since we no longer need to provide KM_type, the whole pte_*map_nested()
API is now redundant, remove it.
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Acked-by: Chris Metcalf <cmetcalf@tilera.com>
Cc: David Howells <dhowells@redhat.com>
Cc: Hugh Dickins <hughd@google.com>
Cc: Rik van Riel <riel@redhat.com>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: Steven Rostedt <rostedt@goodmis.org>
Cc: Russell King <rmk@arm.linux.org.uk>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: David Miller <davem@davemloft.net>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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Keep the current interface but ignore the KM_type and use a stack based
approach.
The advantage is that we get rid of crappy code like:
#define __KM_PTE \
(in_nmi() ? KM_NMI_PTE : \
in_irq() ? KM_IRQ_PTE : \
KM_PTE0)
and in general can stop worrying about what context we're in and what kmap
slots might be appropriate for that.
The downside is that FRV kmap_atomic() gets more expensive.
For now we use a CPP trick suggested by Andrew:
#define kmap_atomic(page, args...) __kmap_atomic(page)
to avoid having to touch all kmap_atomic() users in a single patch.
[ not compiled on:
- mn10300: the arch doesn't actually build with highmem to begin with ]
[akpm@linux-foundation.org: coding-style fixes]
[akpm@linux-foundation.org: fix up drivers/gpu/drm/i915/intel_overlay.c]
Acked-by: Rik van Riel <riel@redhat.com>
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Acked-by: Chris Metcalf <cmetcalf@tilera.com>
Cc: David Howells <dhowells@redhat.com>
Cc: Hugh Dickins <hughd@google.com>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: Steven Rostedt <rostedt@goodmis.org>
Cc: Russell King <rmk@arm.linux.org.uk>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: David Miller <davem@davemloft.net>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Dave Airlie <airlied@linux.ie>
Cc: Li Zefan <lizf@cn.fujitsu.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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* git://git.infradead.org/battery-2.6:
power_supply: Makefile cleanup
bq27x00_battery: Add missing kfree(di->bus) in bq27x00_battery_remove()
power_supply: Introduce maximum current property
power_supply: Add types for USB chargers
ds2782_battery: Fix units
power_supply: Add driver for TWL4030/TPS65950 BCI charger
bq20z75: Add support for more power supply properties
wm831x_power: Add missing kfree(wm831x_power) in wm831x_power_remove()
jz4740-battery: Add missing kfree(jz_battery) in jz_battery_remove()
ds2760_battery: Add missing kfree(di) in ds2760_battery_remove()
olpc_battery: Fix endian neutral breakage for s16 values
ds2760_battery: Fix W1 and W1_SLAVE_DS2760 dependency
pcf50633-charger: Add missing sysfs_remove_group()
power_supply: Add driver for TI BQ20Z75 gas gauge IC
wm831x_power: Remove duplicate chg mask
omap: rx51: Add support for USB chargers
power_supply: Add isp1704 charger detection driver
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This enables isp1704 power supply driver on RX51, allowing
USB charger detection with N900.
Signed-off-by: Heikki Krogerus <ext-heikki.krogerus@nokia.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Anton Vorontsov <cbouatmailru@gmail.com>
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* 'for_linus' of git://github.com/at91linux/linux-2.6-at91:
AT91: rtc: enable built-in RTC in Kconfig for at91sam9g45 family
at91/atmel-mci: inclusion of sd/mmc driver in at91sam9g45 chip and board
AT91: pm: make sure that r0 is 0 when dealing with cache operations
AT91: pm: use plain cpu_do_idle() for "wait for interrupt"
AT91: reset: extend alternate reset procedure to several chips
AT91: reset routine cleanup, remove not needed icache flush
AT91: trivial: align comment of at91sam9g20_reset with one more tab
AT91: Fix AT91SAM9G20 reset as per the errata in the data sheet
AT91: add board support for Pcontrol_G20
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This adds the support of atmel-mci sd/mmc driver in at91sam9g45 devices and
board files. This also configures the DMA controller slave interface for
at_hdmac dmaengine driver.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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When using CP15 cache operations (c7), we make sure that Rd (r0)
is actually 0 as ARM 926 TRM is saying.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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For power management at91_pm_enter() routine, use the cpu_do_idle() for a
rock solid "wait for interrupt" implementation.
For AT91SAM9 ARM 926 based chips, we can exceed the cache line length as
we can access RAM even while in self-refresh mode.
We keep plain access to CP15 for at91rm9200 as this feature is not
available: instructions have to be in a single cache line.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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Several at91sam9 chips need the alternate reset procedure to be sure to halt
SDRAM smoothly before resetting the chip.
This is an extension of previous patch "Fix AT91SAM9G20 reset" to all chips
affected.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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Generalize assembler reset routine to allow use on several at91sam9 chips.
This patch replace double definitions of SDRAM controller registers and RSTC
registers with use of classical header files.
For this rework, we remove the not needed icache flush as it is already
done in the calling function: arm_machine_restart().
Rename at91sam9g20_reset.S to generalize to several chips.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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Preparing next patch with longer names
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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If the SDRAM is not cleanly shutdown before reset it can be left driving
the bus, which then stops the bootloader booting from NAND.
Signed-off-by: Peter Horton <phorton@bitbox.co.uk>
[nicolas.ferre@atmel.com: change file header line order]
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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Board is a carrier board for Stamp9G20, with additional peripherals
for a building automation system
Signed-off-by: Peter Gsellmann <pgsellmann@portner-elektronik.at>
[nicolas.ferre@atmel.com: remove machine_desc.io_pg_offst and .phys_io]
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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* 'for-linus' of git://gitorious.org/linux-omap-dss2/linux:
OMAP: DSS2: don't power off a panel twice
OMAP: DSS2: OMAPFB: Allow usage of def_vrfb only for omap2,3
OMAP: DSS2: OMAPFB: make VRFB depends on OMAP2,3
OMAP: DSS2: OMAPFB: Allow FB_OMAP2 to build without VRFB
arm/omap: simplify conditional
OMAP: DSS2: DSI: Remove extra iounmap in error path
OMAP: DSS2: Use dss_features framework on DSS2 code
OMAP: DSS2: Introduce dss_features files
video/omap: remove mux.h include
ARM: omap/fb: move get_fbmem_region() to .init.text
ARM: omap/fb: move omapfb_reserve_sram to .init.text
ARM: omap/fb: move omap_init_fb to .init.text
OMAP: DSS2: OMAPFB: swap front and back porches for both hsync and vsync
OMAP: DSS2: make filter coefficient tables human readable
OMAP: DSS2: Add SPI dependency to Kconfig of ACX565AKM panel
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FB_OMAP2 can work without VRFB, but currently does not build. Fix this.
Signed-off-by: Senthilvadivu Guruswamy <svadivu@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@nokia.com>
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Simplify conditional: (a || (!a && !b)) => (a || !b)
Signed-off-by: Nicolas Kaiser <nikai@nikai.net>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@nokia.com>
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Calls init functions of dss_features during dss_probe, and the following
features are made omapxxxx independent:
- number of managers, overlays
- supported color modes for each overlay
- supported displays for each manager
- global aplha, and restriction of global alpha for video1 pipeline
- The register field ranges : FIRHINC, FIRVINC, FIFOHIGHTHRESHOLD
FIFOLOWTHRESHOLD and FIFOSIZE
Signed-off-by: Archit Taneja <archit@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@nokia.com>
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get_fbmem_region() is only called by omapfb_reserve_sdram_memblock() and
omapfb_reserve_sram() that both live in .init.text. So get_fbmem_region
can go there, too.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@nokia.com>
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This function is only called by omap_detect_sram which lives in .init.text,
too.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@nokia.com>
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omap_init_fb() is only called as arch_initcall and so can live in
.init.text.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@nokia.com>
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* 'for-next' of git://android.git.kernel.org/kernel/tegra:
spi: tegra: fix error setting on timeout
spi: add spi_tegra driver
tegra: harmony: enable PCI Express
tegra: add PCI Express support
tegra: add PCI Express clocks
[ARM] tegra: Add APB DMA support
[ARM] tegra: Add cpufreq support
[ARM] tegra: common: Update common clock init table
[ARM] tegra: clock: Add dvfs support, bug fixes, and cleanups
[ARM] tegra: Add support for reading fuses
[ARM] tegra: gpio: Add suspend and wake support
[ARM] tegra: pinmux: add safe values, move tegra2, add suspend
[ARM] tegra: add suspend and mirror irqs to legacy controller
[ARM] tegra: Add legacy irq support
[ARM] tegra: update iomap
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Signed-off-by: Mike Rapoport <mike@compulab.co.il>
CC: Olof Johansson <olof@lixom.net>
CC: Gary King <GKing@nvidia.com>
Signed-off-by: Colin Cross <ccross@android.com>
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Change-Id: Ibd0bcd46895eb88952b9db29e1f68572d39aae01
Signed-off-by: Mike Rapoport <mike@compulab.co.il>
Acked-by: Arnd Bergmann <arnd@arndb.de>
CC: Russell King <linux@arm.linux.org.uk>
CC: Gary King <GKing@nvidia.com>
Signed-off-by: Colin Cross <ccross@android.com>
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Signed-off-by: Mike Rapoport <mike@compulab.co.il>
CC: Gary King <GKing@nvidia.com>
Signed-off-by: Colin Cross <ccross@android.com>
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The APB DMA block handles DMA transfers to and from some peripherals
in the Tegra SOC. It reads from sequential addresses on the memory
bus, and writes repeatedly to the same address on the APB bus.
Two transfer modes are supported, oneshot for transferring a known
size to or from a peripheral, and continuous for streaming data.
In continuous mode, a callback occurs when the buffer is half full
to allow the existing data to be handled and a new request queued.x
v2 changes:
dma API no longer uses PTR_ERR
Signed-off-by: Erik Gilling <konkers@android.com>
Signed-off-by: Colin Cross <ccross@android.com>
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Implement cpufreq support for the Tegra SOC. DVFS is handled by the
core virtual cpu clock. The frequencies of the two cores are tied
together, the highest frequency requested by either core determines
the actual frequency.
Signed-off-by: Colin Cross <ccross@android.com>
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Renames clocks in the clock init table to match the datasheet names
Signed-off-by: Colin Cross <ccross@android.com>
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- Add drivers to clock lookup table
- Add new pll_m entries
- Support I2C U16 divider
- Fix rate reporting on 32.768kHz clock
- Call propagate rate only if set_rate succeeds
- Add support for audio_sync clock
- Add 24MHz to PLLA frequency list
- Correct i2s1/2/spdifout mux
- Add suspend support
- Fix enable/disable parent clocks in set_parent
- Add max_rate parameter to all clocks
- DVFS support
- Add virtual cpu clock with dvfs
- Support clk_round_rate
- Fix requesting very high periph frequencies
- Add quirks for PLLU:
PLLU is slightly different from the rest of the PLLs. The
lock enable bit is at bit 22 instead of 18 in the MISC
register, and the post divider field is a single bit with
reversed values from other PLLs.
- Simplify recalculating clock rates
- Fix UART divider flags
- Remove unused clock ops
Signed-off-by: Colin Cross <ccross@android.com>
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The Tegra SOC contains fuses to identify the CPU type and
bin, and a unique id. The CPU info is required to determine
the correct voltages for each cpu and core frequency.
Signed-off-by: Colin Cross <ccross@android.com>
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Includes checkpatch fixes and TEGRA_NR_GPIOS changes from
Mike Rapoport <mike@compulab.co.il>
Signed-off-by: Colin Cross <ccross@android.com>
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- the reset values for some pin groups in the tegra pin mux can result in
functional errors due to conflicting with actively-configured pin groups
muxing from the same controller. this change adds a known safe, non-
conflicting mux for every pin group, which can be used on platforms
where the pin group is not routed to any peripheral
- also add each pin group's I/O voltage rail, to enable platform code to
map from the pin groups used by each interface to the regulators used
for dynamic voltage control
- add routines to individually configure the tristate, pin mux and pull-
ups for a pingroup_config array, so that it is possible to program
individual values at run-time without modifying other values.
this allows driver power-management code to reprogram individual
interfaces into lower power states during idle / suspend, or to
reprogram the pin mux to support multiple physical busses per
internal controller (e.g., sharing a single I2C or SPI controller
across multiple pin groups)
- move chip-specific data like pingroups and drive-pingroups
out of the common code and into chip-specific code
- fix debug output for group with no pullups
- add a TEGRA_MUX_SAFE function. Setting a pingroup to TEGRA_MUX_SAFE
will automatically select a mux setting that is guaranteed not to
conflict with any of the hardware blocks.
Signed-off-by: Gary King <gking@nvidia.com>
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mirror IRQ enable and disable operations on the legacy PPI system
interrupt controller, since the legacy controller is responsible
for responding to wakeup interrupts when the CPU is in LP2 idle mode
save the irq controller state on suspend and restore on resume
Signed-off-by: Gary King <gking@nvidia.com>
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The "legacy irq controller" duplicates the functionality of the GIC,
but remains powered during the cpu suspend and idle modes that power
down the CPU and the GIC.
Signed-off-by: Colin Cross <ccross@android.com>
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Add missing io address map entries from datasheet.
Add the IRAM area to the statically mapped io regions.
Correct the onewire, USB, and statmon addresses
Signed-off-by: Colin Cross <ccross@android.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/groeck/staging
* 'hwmon-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/groeck/staging: (24 commits)
hwmon: lis3: Release resources in case of failure
hwmon: lis3: Short explanations of platform data fields
hwmon: lis3: Enhance lis3 selftest with IRQ line test
hwmon: lis3: use block read to access data registers
hwmon: lis3: Adjust fuzziness for 8 bit device
hwmon: lis3: New parameters to platform data
hwmon: lis3: restore axis enabled bits
hwmon: lis3: Power on corrections
hwmon: lis3: Update coordinates at polled device open
hwmon: lis3: Cleanup interrupt handling
hwmon: lis3: regulator control
hwmon: lis3: pm_runtime support
Kirkwood: add fan support for Network Space Max v2
hwmon: add generic GPIO fan driver
hwmon: (coretemp) fix reading of microcode revision (v2)
hwmon: ({core, pkg, via-cpu}temp) remove unnecessary CONFIG_HOTPLUG_CPU ifdefs
hwmon: (pkgtemp) align driver initialization style with coretemp
hwmon: LTC4261 Hardware monitoring driver
hwmon: (lis3) add axes module parameter for custom axis-mapping
hwmon: (hp_accel) Add HP Mini 510x family support
...
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Signed-off-by: Simon Guinot <sguinot@lacie.com>
Acked-by: Nicolas Pitre <nico@fluxnic.net>
Signed-off-by: Guenter Roeck <guenter.roeck@ericsson.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6
* 'omap-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6: (163 commits)
omap: complete removal of machine_desc.io_pg_offst and .phys_io
omap: UART: fix wakeup registers for OMAP24xx UART2
omap: Fix spotty MMC voltages
ASoC: OMAP4: MCPDM: Remove unnecessary include of plat/control.h
serial: omap-serial: fix signess error
OMAP3: DMA: Errata i541: sDMA FIFO draining does not finish
omap: dma: Fix buffering disable bit setting for omap24xx
omap: serial: Fix the boot-up crash/reboot without CONFIG_PM
OMAP3: PM: fix scratchpad memory accesses for off-mode
omap4: pandaboard: enable the ehci port on pandaboard
omap4: pandaboard: Fix the init if CONFIG_MMC_OMAP_HS is not set
omap4: pandaboard: remove unused hsmmc definition
OMAP: McBSP: Remove null omap44xx ops comment
OMAP: McBSP: Swap CLKS source definition
OMAP: McBSP: Fix CLKR and FSR signal muxing
OMAP2+: clock: reduce the amount of standard debugging while disabling unused clocks
OMAP: control: move plat-omap/control.h to mach-omap2/control.h
OMAP: split plat-omap/common.c
OMAP: McBSP: implement functional clock switching via clock framework
OMAP: McBSP: implement McBSP CLKR and FSR signal muxing via mach-omap2/mcbsp.c
...
Fixed up trivial conflicts in arch/arm/mach-omap2/
{board-zoom-peripherals.c,devices.c} as per Tony
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Commit ab69bcd66fb4be64edfc767365cb9eb084961246 (arm: remove
machine_desc.io_pg_offst and .phys_io) could not update
the new boards in the omap tree. This causes the build of
omap2plus_defconfig to fail. Fix this.
Signed-off-by: Anand Gadiyar <gadiyar@ti.com>
Cc: Nicolas Pitre <nicolas.pitre@linaro.org>
Cc: Eric Miao <eric.miao at canonical.com>
[tony@atomide.com: updated description]
Signed-off-by: Tony Lindgren <tony@atomide.com>
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On OMAP24xx, UART2 WKEN and WKST registers are in PM_WKEN2_CORE and
PM_WKST2_CORE respecitvely. Fix the OMAP2 register init to use the
correct registers on OMAP24xx.
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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As noted by Michał Mirosław <mirqus@gmail.com>, the voltages should
cover the supported voltage range, or support only one voltage.
As all these boards are using a GPIO to enable the power, chances
are that only 3.3V cards are supported on these boards.
Reported-by: Michał Mirosław <mirqus@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Implement the suggested workaround for OMAP3 regarding to sDMA draining
issue, when the channel is disabled on the fly.
This errata affects the following configuration:
sDMA transfer is source synchronized
Buffering is enabled
SmartStandby is selected.
The issue can be easily reproduced by creating overrun situation while
recording audio.
Either introduce load to the CPU:
nice -19 arecord -D hw:0 -M -B 10000 -F 5000 -f dat > /dev/null & \
dd if=/dev/urandom of=/dev/null
or suspending the arecord, and resuming it:
arecord -D hw:0 -M -B 10000 -F 5000 -f dat > /dev/null
CTRL+Z; fg; CTRL+Z; fg; ...
In case of overrun audio stops DMA, and restarts it (without reseting
the sDMA channel). When we hit this errata in stop case (sDMA drain did
not complete), at the coming start the sDMA will not going to be
operational (it is still draining).
This leads to DMA stall condition.
On OMAP3 we can recover with sDMA channel reset, it has been observed
that by introducing unrelated sDMA activity might also help (reading
from MMC for example).
The same errata exists for OMAP2, where the suggestion is to disable the
buffering to avoid this type of error.
On OMAP3 the suggestion is to set sDMA to NoStandby before disabling
the channel, and wait for the drain to finish, than configure sDMA to
SmartStandby again.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@nokia.com>
Acked-by: Jarkko Nikula <jhnikula@gmail.com>
Acked-by : Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by : Manjunath Kondaiah G <manjugk@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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An errata workaround for omap24xx is not setting the buffering disable bit
25 what is the purpose but channel enable bit 7 instead.
Background for this fix is the DMA stalling issue with ASoC omap-mcbsp
driver. Peter Ujfalusi <peter.ujfalusi@nokia.com> has found an issue in
recording that the DMA stall could happen if there were a buffer overrun
detected by ALSA and the DMA was stopped and restarted due that. This
problem is known to occur on both OMAP2420 and OMAP3. It can recover on
OMAP3 after dma free, dma request and reconfiguration cycle. However, on
OMAP2420 it seems that only way to recover is a reset.
Problem was not visible before the commit c12abc0. That commit changed that
the McBSP transmitter/receiver is released from reset only when needed. That
is, only enabled McBSP transmitter without transmission was able to prevent
this DMA stall problem in receiving side and underlying problem did not show
up until now. McBSP transmitter itself seems to no be reason since DMA
stall does not recover by enabling the transmission after stall.
Debugging showed that there were a DMA write active during DMA stop time and
it never completed even when restarting the DMA. Experimenting showed that
the DMA buffering disable bit could be used to avoid stalling when using
source synchronized transfers. However that could have performance hit and
OMAP3 TRM states that buffering disable is not allowed for destination
synchronized transfers so subsequent patch will implement a method to
complete DMA writes when stopping.
This patch is based on assumtion that complete lock-up on OMAP2420 is
different but related problem. I don't have access to OMAP2420 errata but
I believe this old workaround here is put for a reason but unfortunately
a wrong bit was typed and problem showed up only now.
Signed-off-by: Jarkko Nikula <jhnikula@gmail.com>
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@nokia.com>
Acked-by: Manjunath Kondaiah G <manjugk@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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The omap2plus_defconfig doesn't boot up when built with CONFIG_PM
disabled on the latest linux-omap master. Below are the observations
1. OMAP3 reboots in the middle of boot
--------------------------------------------------
[ 0.000000] Calibrating delay loop... 494.72 BogoMIPS (lpj=1933312)
[ 0.000000] pid_max: default: 32768 minimum: 301
[ 0.000000] Security Framework initialized
[ 0.000000] Mount-cache hash table entries: 512
[ 0.000000] CPU: Testing write buffer coherency: ok
[ 0.000000] Brought up 1 CPUs
[ 0.000000] SMP: Total of 1 processors activated (494.72 BogoMIPS).
[ 0.000000] regulator: core version 0.5
[ 0.000000] NET: Registered protocol family 16
U-Boot 1.1.4 (Feb 11 2009 - 16:10:23)
OMAP3430-GP rev 2, CPU-OPP2 L3-165MHz
TI 3430SDP 1.0 Version + mDDR (Boot NOR)
DRAM: 128 MB
Flash: 128 MB
NAND:128 MiB
--------------------------------------------------
2. OMAP4 does a kernel PANIC
-------------------------------------
[ 0.000000] Calibrating delay loop... 1195.29 BogoMIPS (lpj=4669440)
[ 0.000000] pid_max: default: 32768 minimum: 301
[ 0.000000] Security Framework initialized
[ 0.000000] Mount-cache hash table entries: 512
[ 0.000000] CPU: Testing write buffer coherency: ok
[ 0.000000] L310 cache controller enabled
[ 0.000000] l2x0: 16 ways, CACHE_ID 0x410000c2, AUX_CTRL 0x0e050000
[ 0.000000] CPU1: Booted secondary processor
[ 0.000000] Brought up 2 CPUs
[ 0.000000] SMP: Total of 2 processors activated (2395.78 BogoMIPS).
[ 0.000000] regulator: core version 0.5
[ 0.000000] NET: Registered protocol family 16
[ 0.000000] mux: Could not set signal i2c2_scl.i2c2_scl
[ 0.000000] mux: Could not set signal i2c2_sda.i2c2_sda
[ 0.000000] mux: Could not set signal i2c3_scl.i2c3_scl
[ 0.000000] mux: Could not set signal i2c3_sda.i2c3_sda
[ 0.000000] mux: Could not set signal i2c4_scl.i2c4_scl
[ 0.000000] mux: Could not set signal i2c4_sda.i2c4_sda
-------------------------------------
This is happening because 'omap_serial_init()' is hanging in the boot.
On OMAP3 the watchdog is generating reboot because devices_init doesn't
happens where as on OMAP4 it just hangs without reboot.
The uart clock is not getting enabled after omap_device_idle as part
of omap_serial_init.
The omap_device_idle(will disable the clock) then omap_uart_block_sleep()
should enable clock back disabled during the boot up phase.
But omap_uart_block_sleep() stuffed version is binded only under
CONFIG_PM and other version is just empty. Hence it is not enabling
clock back as expected
This patch adds uart clock enable code to omap_uart_block_sleep() function
built with CONFIG_PM disabled.
Thanks to Charulatha and Govindraj for their help on this debug.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Charulatha V <charu@ti.com>
Signed-off-by: Govindraj.R <govindraj.raja@ti.com>
Acked-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Commit 914bab936fe0388a529079679e2f137aa4ff548d (OMAP: mach-omap2: Fix
incorrect assignment warnings) changed a pointer from 'u32 *' to
'void *' without also fixing up the pointer arithmetic.
Fix the scratchpad offsets so they are byte offsets instead of
word offsets and thus work correctly with a void pointer base.
Special thanks to Jean Pihet for taking the time track down this
problem and propose an initial solution.
Tested with off-idle and off-suspend on 36xx/Zoom3 and 34xx/omap3evm.
Cc: Manjunath Kondaiah G <manjugk@ti.com>
Reported-by: Jean Pihet <jean.pihet@newoldbits.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Tested-by: Jean Pihet <jean.pihet@newoldbits.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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into omap-for-linus
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It seems these comments where accidentally added so remove them.
Signed-off-by: Jarkko Nikula <jhnikula@gmail.com>
Acked-by: Paul Walmsley <paul@pwsan.com>
Acked-by: Peter Ujfalusi <peter.ujfalusi@nokia.com>
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This is just a readability and debugging improvement. As selection bit in
DEVCONF register is cleared when using 96 MHz PRCM source and set when using
external CLKS pin, change definitions to be sync with these.
Signed-off-by: Jarkko Nikula <jhnikula@gmail.com>
Acked-by: Paul Walmsley <paul@pwsan.com>
Acked-by: Peter Ujfalusi <peter.ujfalusi@nokia.com>
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Fix bit clear. Now it clears all other bits than mask bit where it should
clear only it.
Signed-off-by: Jarkko Nikula <jhnikula@gmail.com>
Acked-by: Paul Walmsley <paul@pwsan.com>
Acked-by: Peter Ujfalusi <peter.ujfalusi@nokia.com>
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