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* ARM: Add irqtime accounting supportRussell King2012-09-151-0/+8
| | | | | | | | | | | | | | | Add support for irq time accounting. This commit prepares ARM by adding the call to enable_sched_clock_irqtime() in sched_clock(). We introduce a new kernel parameter - irqtime - which takes an integer. -1 for auto, 0 for disabled, and 1 for enabled. Auto mode selects IRQ accounting if we have a sched_clock() tick rate greater than 1MHz. Frederic Weisbecker is working on a patch set which moves the IRQ_TIME_ACCOUNTING into arch/, so that part is not incorporated into this patch; this facility becomes available on ARM only when both this patch and Frederic's patches are merged. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: Fix bad merge bd1274dc005 (Merge branch 'v6v7' into devel)Russell King2012-09-021-8/+8
| | | | | | | | | | | | Commit 774c096bf9e49 (ARM: v6/v7 cache: allow cache calls to be optimized) got dropped when the merge conflicts for moving the contents of the files in commit 753790e713d (ARM: move cache/processor/fault glue to separate include files) was fixed up in merge bd1274dc005 (Merge branch 'v6v7' into devel). This puts the change back. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: 7500/1: io: avoid writeback addressing modes for __raw_ accessorsWill Deacon2012-08-251-6/+61
| | | | | | | | | | | | | | | | | | | | | | | | Data aborts taken to hyp mode do not provide a valid instruction syndrome field in the HSR if the faulting instruction is a memory access using a writeback addressing mode. For hypervisors emulating MMIO accesses to virtual peripherals, taking such an exception requires disassembling the faulting instruction in order to determine the behaviour of the access. Since this requires manually walking the two stages of translation, the world must be stopped to prevent races against page aging in the guest, where the first-stage translation is invalidated after the hypervisor has translated to an IPA and the physical page is reused for something else. This patch avoids taking this heavy performance penalty when running Linux as a guest by ensuring that our I/O accessors do not make use of writeback addressing modes. Cc: Marc Zyngier <marc.zyngier@arm.com> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Nicolas Pitre <nico@linaro.org> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: 7498/1: mach-shmobile: Use SGI0 to wake secondary CPUsStephen Boyd2012-08-251-1/+1
| | | | | | Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: 7495/1: mutex: use generic atomic_dec-based implementation for ARMv6+Will Deacon2012-08-251-2/+7
| | | | | | | | | | | | | | | | | | | Commit a76d7bd96d65 ("ARM: 7467/1: mutex: use generic xchg-based implementation for ARMv6+") removed the barrier-less, ARM-specific mutex implementation in favour of the generic xchg-based code. Since then, a bug was uncovered in the xchg code when running on SMP platforms, due to interactions between the locking paths and the MUTEX_SPIN_ON_OWNER code. This was fixed in 0bce9c46bf3b ("mutex: place lock in contended state after fastpath_lock failure"), however, the atomic_dec-based mutex algorithm is now marginally more efficient for ARM (~0.5% improvement in hackbench scores on dual A15). This patch moves ARMv6+ platforms to the atomic_dec-based mutex code. Acked-by: Nicolas Pitre <nico@linaro.org> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: 7494/1: use generic termios.hRob Herring2012-08-252-92/+1
| | | | | | | | | | | | | | | | | As pointed out by Arnd Bergmann, this fixes a couple of issues but will increase code size: The original macro user_termio_to_kernel_termios was not endian safe. It used an unsigned short ptr to access the low bits in a 32-bit word. Both user_termio_to_kernel_termios and kernel_termios_to_user_termio are missing error checking on put_user/get_user and copy_to/from_user. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Reviewed-by: Nicolas Pitre <nico@linaro.org> Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: 7493/1: use generic unaligned.hRob Herring2012-08-252-19/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This moves ARM over to the asm-generic/unaligned.h header. This has the benefit of better code generated especially for ARMv7 on gcc 4.7+ compilers. As Arnd Bergmann, points out: The asm-generic version uses the "struct" version for native-endian unaligned access and the "byteshift" version for the opposite endianess. The current ARM version however uses the "byteshift" implementation for both. Thanks to Nicolas Pitre for the excellent analysis: Test case: int foo (int *x) { return get_unaligned(x); } long long bar (long long *x) { return get_unaligned(x); } With the current ARM version: foo: ldrb r3, [r0, #2] @ zero_extendqisi2 @ MEM[(const u8 *)x_1(D) + 2B], MEM[(const u8 *)x_1(D) + 2B] ldrb r1, [r0, #1] @ zero_extendqisi2 @ MEM[(const u8 *)x_1(D) + 1B], MEM[(const u8 *)x_1(D) + 1B] ldrb r2, [r0, #0] @ zero_extendqisi2 @ MEM[(const u8 *)x_1(D)], MEM[(const u8 *)x_1(D)] mov r3, r3, asl #16 @ tmp154, MEM[(const u8 *)x_1(D) + 2B], ldrb r0, [r0, #3] @ zero_extendqisi2 @ MEM[(const u8 *)x_1(D) + 3B], MEM[(const u8 *)x_1(D) + 3B] orr r3, r3, r1, asl #8 @, tmp155, tmp154, MEM[(const u8 *)x_1(D) + 1B], orr r3, r3, r2 @ tmp157, tmp155, MEM[(const u8 *)x_1(D)] orr r0, r3, r0, asl #24 @,, tmp157, MEM[(const u8 *)x_1(D) + 3B], bx lr @ bar: stmfd sp!, {r4, r5, r6, r7} @, mov r2, #0 @ tmp184, ldrb r5, [r0, #6] @ zero_extendqisi2 @ MEM[(const u8 *)x_1(D) + 6B], MEM[(const u8 *)x_1(D) + 6B] ldrb r4, [r0, #5] @ zero_extendqisi2 @ MEM[(const u8 *)x_1(D) + 5B], MEM[(const u8 *)x_1(D) + 5B] ldrb ip, [r0, #2] @ zero_extendqisi2 @ MEM[(const u8 *)x_1(D) + 2B], MEM[(const u8 *)x_1(D) + 2B] ldrb r1, [r0, #4] @ zero_extendqisi2 @ MEM[(const u8 *)x_1(D) + 4B], MEM[(const u8 *)x_1(D) + 4B] mov r5, r5, asl #16 @ tmp175, MEM[(const u8 *)x_1(D) + 6B], ldrb r7, [r0, #1] @ zero_extendqisi2 @ MEM[(const u8 *)x_1(D) + 1B], MEM[(const u8 *)x_1(D) + 1B] orr r5, r5, r4, asl #8 @, tmp176, tmp175, MEM[(const u8 *)x_1(D) + 5B], ldrb r6, [r0, #7] @ zero_extendqisi2 @ MEM[(const u8 *)x_1(D) + 7B], MEM[(const u8 *)x_1(D) + 7B] orr r5, r5, r1 @ tmp178, tmp176, MEM[(const u8 *)x_1(D) + 4B] ldrb r4, [r0, #0] @ zero_extendqisi2 @ MEM[(const u8 *)x_1(D)], MEM[(const u8 *)x_1(D)] mov ip, ip, asl #16 @ tmp188, MEM[(const u8 *)x_1(D) + 2B], ldrb r1, [r0, #3] @ zero_extendqisi2 @ MEM[(const u8 *)x_1(D) + 3B], MEM[(const u8 *)x_1(D) + 3B] orr ip, ip, r7, asl #8 @, tmp189, tmp188, MEM[(const u8 *)x_1(D) + 1B], orr r3, r5, r6, asl #24 @,, tmp178, MEM[(const u8 *)x_1(D) + 7B], orr ip, ip, r4 @ tmp191, tmp189, MEM[(const u8 *)x_1(D)] orr ip, ip, r1, asl #24 @, tmp194, tmp191, MEM[(const u8 *)x_1(D) + 3B], mov r1, r3 @, orr r0, r2, ip @ tmp171, tmp184, tmp194 ldmfd sp!, {r4, r5, r6, r7} bx lr In both cases the code is slightly suboptimal. One may wonder why wasting r2 with the constant 0 in the second case for example. And all the mov's could be folded in subsequent orr's, etc. Now with the asm-generic version: foo: ldr r0, [r0, #0] @ unaligned @,* x bx lr @ bar: mov r3, r0 @ x, x ldr r0, [r0, #0] @ unaligned @,* x ldr r1, [r3, #4] @ unaligned @, bx lr @ This is way better of course, but only because this was compiled for ARMv7. In this case the compiler knows that the hardware can do unaligned word access. This isn't that obvious for foo(), but if we remove the get_unaligned() from bar as follows: long long bar (long long *x) {return *x; } then the resulting code is: bar: ldmia r0, {r0, r1} @ x,, bx lr @ So this proves that the presumed aligned vs unaligned cases does have influence on the instructions the compiler may use and that the above unaligned code results are not just an accident. Still... this isn't fully conclusive without at least looking at the resulting assembly fron a pre ARMv6 compilation. Let's see with an ARMv5 target: foo: ldrb r3, [r0, #0] @ zero_extendqisi2 @ tmp139,* x ldrb r1, [r0, #1] @ zero_extendqisi2 @ tmp140, ldrb r2, [r0, #2] @ zero_extendqisi2 @ tmp143, ldrb r0, [r0, #3] @ zero_extendqisi2 @ tmp146, orr r3, r3, r1, asl #8 @, tmp142, tmp139, tmp140, orr r3, r3, r2, asl #16 @, tmp145, tmp142, tmp143, orr r0, r3, r0, asl #24 @,, tmp145, tmp146, bx lr @ bar: stmfd sp!, {r4, r5, r6, r7} @, ldrb r2, [r0, #0] @ zero_extendqisi2 @ tmp139,* x ldrb r7, [r0, #1] @ zero_extendqisi2 @ tmp140, ldrb r3, [r0, #4] @ zero_extendqisi2 @ tmp149, ldrb r6, [r0, #5] @ zero_extendqisi2 @ tmp150, ldrb r5, [r0, #2] @ zero_extendqisi2 @ tmp143, ldrb r4, [r0, #6] @ zero_extendqisi2 @ tmp153, ldrb r1, [r0, #7] @ zero_extendqisi2 @ tmp156, ldrb ip, [r0, #3] @ zero_extendqisi2 @ tmp146, orr r2, r2, r7, asl #8 @, tmp142, tmp139, tmp140, orr r3, r3, r6, asl #8 @, tmp152, tmp149, tmp150, orr r2, r2, r5, asl #16 @, tmp145, tmp142, tmp143, orr r3, r3, r4, asl #16 @, tmp155, tmp152, tmp153, orr r0, r2, ip, asl #24 @,, tmp145, tmp146, orr r1, r3, r1, asl #24 @,, tmp155, tmp156, ldmfd sp!, {r4, r5, r6, r7} bx lr Compared to the initial results, this is really nicely optimized and I couldn't do much better if I were to hand code it myself. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Reviewed-by: Nicolas Pitre <nico@linaro.org> Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: 7492/1: add strstr declaration for decompressorsRob Herring2012-08-251-0/+3
| | | | | | | | | | | With the generic unaligned.h, more kernel headers get pulled in including dynamic_debug.h which needs strstr. As it is not really used, we only need a declaration here. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: 7491/1: use generic version of identical asm headersRob Herring2012-08-2516-502/+17
| | | | | | | | | | | | | | Inspired by the AArgh64 claim that it should be separate from ARM and one reason was being able to use more asm-generic headers. Doing a diff of arch/arm/include/asm and include/asm-generic there are numerous asm headers which are functionally identical to their asm-generic counterparts. Delete the ARM version and use the generic ones. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Reviewed-by: Nicolas Pitre <nico@linaro.org> Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: Allow arm_memblock_steal() to remove memory from any RAM regionRussell King2012-08-131-1/+1
| | | | | | | | | | | Allow arm_memblock_steal() to remove memory from any RAM region, including highmem areas. This allows memory to be stolen from the very top of declared memory, including highmem areas, rather than our precious lowmem. Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: 7485/1: EXYNOS: use SGI0 to wake secondary CPUsStephen Boyd2012-08-111-1/+1
| | | | | | Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Acked-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* Merge tag 'dt2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-socLinus Torvalds2012-08-0237-556/+1277
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull arm-soc Marvell Orion device-tree updates from Olof Johansson: "This contains a set of device-tree conversions for Marvell Orion platforms that were staged early but took a few tries to get the branch into a format where it was suitable for us to pick up. Given that most people working on these platforms are hobbyists with limited time, we were a bit more flexible with merging it even though it came in late." * tag 'dt2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (21 commits) ARM: Kirkwood: Replace mrvl with marvell ARM: Kirkwood: Describe GoFlex Net LEDs and SATA in DT. ARM: Kirkwood: Describe Dreamplug LEDs in DT. ARM: Kirkwood: Describe iConnects LEDs in DT. ARM: Kirkwood: Describe iConnects temperature sensor in DT. ARM: Kirkwood: Describe IB62x0 LEDs in DT. ARM: Kirkwood: Describe IB62x0 gpio-keys in DT. ARM: Kirkwood: Describe DNS32? gpio-keys in DT. ARM: Kirkwood: Move common portions into a kirkwood-dnskw.dtsi ARM: Kirkwood: Replace DNS-320/DNS-325 leds with dt bindings ARM: Kirkwood: Describe DNS325 temperature sensor in DT. ARM: Kirkwood: Use DT to configure SATA device. ARM: kirkwood: use devicetree for SPI on dreamplug ARM: kirkwood: Add LS-XHL and LS-CHLv2 support ARM: Kirkwood: Initial DTS support for Kirkwood GoFlex Net ARM: Kirkwood: Add basic device tree support for QNAP TS219. ATA: sata_mv: Add device tree support ARM: Orion: DTify the watchdog timer. ARM: Orion: Add arch support needed for I2C via DT. ARM: kirkwood: use devicetree for orion-spi ... Conflicts: drivers/watchdog/orion_wdt.c
| * Merge branch 'marvell/dt' into late2/dtOlof Johansson2012-07-2938-581/+1342
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * marvell/dt: (41 commits) ARM: Kirkwood: Replace mrvl with marvell ARM: Kirkwood: Describe GoFlex Net LEDs and SATA in DT. ARM: Kirkwood: Describe Dreamplug LEDs in DT. ARM: Kirkwood: Describe iConnects LEDs in DT. ARM: Kirkwood: Describe iConnects temperature sensor in DT. ARM: Kirkwood: Describe IB62x0 LEDs in DT. ARM: Kirkwood: Describe IB62x0 gpio-keys in DT. ARM: Kirkwood: Describe DNS32? gpio-keys in DT. ARM: Kirkwood: Move common portions into a kirkwood-dnskw.dtsi ARM: Kirkwood: Replace DNS-320/DNS-325 leds with dt bindings ARM: Kirkwood: Describe DNS325 temperature sensor in DT. ARM: Kirkwood: Use DT to configure SATA device. ARM: kirkwood: use devicetree for SPI on dreamplug ARM: kirkwood: Add LS-XHL and LS-CHLv2 support ARM: Kirkwood: Initial DTS support for Kirkwood GoFlex Net ARM: Kirkwood: Add basic device tree support for QNAP TS219. ATA: sata_mv: Add device tree support ARM: Orion: DTify the watchdog timer. ARM: Orion: Add arch support needed for I2C via DT. ARM: kirkwood: use devicetree for orion-spi ...
| | * ARM: Kirkwood: Replace mrvl with marvellAndrew Lunn2012-07-276-6/+6
| | | | | | | | | | | | | | | | | | | | | It has been decided to use marvell, not mrvl, in the compatibility property. Search & replace. Signed-off-by: Andrew Lunn <andrew@lunn.ch>
| | * ARM: Kirkwood: Describe GoFlex Net LEDs and SATA in DT.Andrew Lunn2012-07-272-84/+50
| | | | | | | | | | | | | | | Signed-off-by: Andrew Lunn <andrew@lunn.ch> Tested-by: Josh Coombs <josh.coombs@gmail.com>
| | * ARM: Kirkwood: Describe Dreamplug LEDs in DT.Andrew Lunn2012-07-272-34/+16
| | | | | | | | | | | | Signed-off-by: Andrew Lunn <andrew@lunn.ch>
| | * ARM: Kirkwood: Describe iConnects LEDs in DT.Andrew Lunn2012-07-272-46/+34
| | | | | | | | | | | | Signed-off-by: Andrew Lunn <andrew@lunn.ch>
| | * ARM: Kirkwood: Describe iConnects temperature sensor in DT.Andrew Lunn2012-07-272-10/+8
| | | | | | | | | | | | | | | | | | | | | Now that we have I2C support in DT, describe the LM63 in the DT file for the iConnect. Signed-off-by: Andrew Lunn <andrew@lunn.ch>
| | * ARM: Kirkwood: Describe IB62x0 LEDs in DT.Andrew Lunn2012-07-272-36/+17
| | | | | | | | | | | | | | | Signed-off-by: Andrew Lunn <andrew@lunn.ch> Tested-by: Simon Baatz <gmbnomis@gmail.com>
| | * ARM: Kirkwood: Describe IB62x0 gpio-keys in DT.Andrew Lunn2012-07-272-31/+16
| | | | | | | | | | | | | | | | | | | | | | | | Now that the GPIO controllers have been converted over to DT, described the gpio-keys in DT. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Tested-by: Simon Baatz <gmbnomis@gmail.com>
| | * ARM: Kirkwood: Describe DNS32? gpio-keys in DT.Jamie Lentin2012-07-272-37/+21
| | | | | | | | | | | | | | | | | | | | | Move description of GPIO keys on both the DNS320 and DNS325 into DT. Signed-off-by: Jamie Lentin <jm@lentin.co.uk> Signed-off-by: Andrew Lunn <andrew@lunn.ch>
| | * ARM: Kirkwood: Move common portions into a kirkwood-dnskw.dtsiJamie Lentin2012-07-273-82/+50
| | | | | | | | | | | | | | | | | | | | | | | | A lot of device setup is shared between DNS-320 and DNS-325, move the definitions into a common include. Signed-off-by: Jamie Lentin <jm@lentin.co.uk> Signed-off-by: Andrew Lunn <andrew@lunn.ch>
| | * ARM: Kirkwood: Replace DNS-320/DNS-325 leds with dt bindingsJamie Lentin2012-07-273-90/+50
| | | | | | | | | | | | | | | | | | | | | Replace code in board-dnskw with the equivalent devicetree bindings. Signed-off-by: Jamie Lentin <jm@lentin.co.uk> Signed-off-by: Andrew Lunn <andrew@lunn.ch>
| | * ARM: Kirkwood: Describe DNS325 temperature sensor in DT.Andrew Lunn2012-07-272-13/+10
| | | | | | | | | | | | | | | | | | | | | | | | Now that we have I2C support in DT, describe the LM75 in the DT file for the DNS325. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Jamie Lentin <jm@lentin.co.uk>
| | * ARM: Kirkwood: Use DT to configure SATA device.Andrew Lunn2012-07-279-20/+24
| | | | | | | | | | | | | | | | | | | | | | | | Convert boards using DT, but the old way of configuring SATA to now use properties in there DT file. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Tested-by: Simon Baatz <gmbnomis@gmail.com>
| | * ARM: kirkwood: use devicetree for SPI on dreamplugMichael Walle2012-07-272-41/+29
| | | | | | | | | | | | | | | | | | | | | Use the device tree for the SPI driver and partition layout. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Andrew Lunn <andrew@lunn.ch>
| | * ARM: kirkwood: Add LS-XHL and LS-CHLv2 supportMichael Walle2012-07-279-0/+291
| | | | | | | | | | | | | | | | | | | | | | | | Add support for Buffalo Linkstation LS-XHL and LS-CHLv2 using the device tree where possible. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Andrew Lunn <andrew@lunn.ch>
| | * ARM: Kirkwood: Initial DTS support for Kirkwood GoFlex NetJosh Coombs2012-07-277-0/+224
| | | | | | | | | | | | | | | | | | | | | | | | This patch supplies the necessary DTS and supporting files to boot up a Seagate GoFlex Net with 3.5.0-rc3. Signed-off-by: Joshua Coombs <josh.coombs@gmail.com> Signed-off-by: Andrew Lunn <andrew@lunn.ch>
| | * ARM: Kirkwood: Add basic device tree support for QNAP TS219.Andrew Lunn2012-07-279-0/+228
| | | | | | | | | | | | | | | | | | | | | | | | | | | The two different variants of QNAP TS devices, varying by SoC, put the GPIO keys on different GPIO lines. Hence we need two different DT board descriptions, which share the same board-ts219.c file. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Acked-by: Jason Cooper <jason@lakedaemon.net>
| | * ATA: sata_mv: Add device tree supportAndrew Lunn2012-07-272-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for instantiating this driver from device tree, and add the necassary DT information to the kirkwood.dtsi file. This is based on previous work by Michael Walle and Jason Cooper. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Tested-by: Josh Coombs <josh.coombs@gmail.com>
| | * ARM: Orion: DTify the watchdog timer.Andrew Lunn2012-07-272-1/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add device tree support to the Orion watchdog timer, and enable its use in the kirkwood devices using device tree. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@googlemail.com> Tested-by: Simon Baatz <gmbnomis@gmail.com>
| | * ARM: Orion: Add arch support needed for I2C via DT.Andrew Lunn2012-07-274-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The MV64XXX I2C driver needs a clock in order to calculate the baud rate factors. So add an clk to the clk tree. Also add the base DT properties for kirkwood devices. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Conflicts: arch/arm/mach-kirkwood/common.c
| | * ARM: kirkwood: use devicetree for orion-spiMichael Walle2012-07-272-1/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Populate the devices with auxdata to set the device names which are used by clkdev to lookup the clocks. Signed-off-by: Michael Walle <micheal@walle.cc> Signed-off-by: Andrew Lunn <andrew@lunn.ch> --- v2: Add interrupts properties, although not used.
| | * ARM: Orion: DT support for IRQ and GPIO ControllersAndrew Lunn2012-07-2711-132/+264
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Both IRQ and GPIO controllers can now be represented in DT. The IRQ controllers are setup first, and then the GPIO controllers. Interrupts for GPIO lines are placed directly after the main interrupts in the interrupt space. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@googlemail.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Tested-by: Josh Coombs <josh.coombs@gmail.com> Tested-by: Simon Baatz <gmbnomis@gmail.com>
* | | Merge tag 'pm2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-socLinus Torvalds2012-08-023-47/+103
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull arm-soc cpuidle enablement for OMAP from Olof Johansson: "Coupled cpuidle was meant to merge for 3.5 through Len Brown's tree, but didn't go in because the pull request ended up rejected. So it just got merged, and we got this staged branch that enables the coupled cpuidle code on OMAP. With a stable git workflow from the other maintainer we could have staged this earlier, but that wasn't the case so we have had to merge it late. The alternative is to hold it off until 3.7 but given that the code is well-isolated to OMAP and they are eager to see it go in, I didn't push back hard in that direction." * tag 'pm2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: ARM: OMAP4: CPUidle: Open broadcast clock-event device. ARM: OMAP4: CPUidle: add synchronization for coupled idle states ARM: OMAP4: CPUidle: Use coupled cpuidle states to implement SMP cpuidle. ARM: OMAP: timer: allow gp timer clock-event to be used on both cpus
| * | | ARM: OMAP4: CPUidle: Open broadcast clock-event device.Santosh Shilimkar2012-07-261-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | OMAP4 idle driver uses CLOCK_EVT_NOTIFY_BROADCAST_[ENTER/EXIT] for broadcast clock events. But _ENTER/_EXIT doesn't really open broadcast clock events and to explicitly setup the broadcast device, CLOCK_EVT_NOTIFY_BROADCAST_ON should be used. Add the missing CLOCK_EVT_NOTIFY_BROADCAST_ON clockevent notifications. This will setup the broadcast timer in either periodic/oneshot modes correctly. Recent clockevent infrastructure change 77b0d60 {leave the broadcast device in shutdown mode when not needed} exposed this bug leading to boot hangs in oneshot mode. Prior to this, periodic broadcast mode was also broken. This change fixes both the periodic/oneshot broadcast modes. Discussion thread : https://lkml.org/lkml/2012/4/9/13 Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
| * | | ARM: OMAP4: CPUidle: add synchronization for coupled idle statesKevin Hilman2012-07-261-1/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With coupled idle states, a failure for any CPU to hit a low power state must be coordinated such that all CPUs abort. On OMAP4, when entering a coupled state, CPU0 has to wait for CPU1 to enter its low power state before it can enter its low power state. This is implemented by letting CPU0 wait for the CPU1 powerdomain to hit off. However, there are conditions where CPU1 might abort/fail and not hit off while CPU0 is waiting for it. For example, a CPU1 wakeup or a failed attempt to hit off due to hardware conditions. To avoid the deadlock where CPU0 would continually wait for CPU1 to hit off-mode, this patch adds a flag to signal when each CPU has come out of its low-power state. CPU0 then checks whether CPU1 has hit off *or* has already completed its attempt to hit off. If the latter, CPU0 must abort its attempt to hit a low-power state so the coupled state enter method can return. In addition, cpuidle_coupled_parallel_barrier() is used to ensure the clearing of the 'done' flag is synchronized on all CPUs. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
| * | | ARM: OMAP4: CPUidle: Use coupled cpuidle states to implement SMP cpuidle.Santosh Shilimkar2012-07-262-46/+67
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | OMAP4 CPUDILE driver is converted mainly based on notes from the coupled cpuidle patch series. The changes include : - Register both CPUs and C-states to cpuidle driver. - Set struct cpuidle_device.coupled_cpus - Set struct cpuidle_device.safe_state to non coupled state. - Set CPUIDLE_FLAG_COUPLED in struct cpuidle_state.flags for each state that affects multiple cpus. - Separate ->enter hooks for coupled & simple idle. - CPU0 wait loop for CPU1 power transition. - CPU1 wakeup mechanism for the idle exit. - Enabling ARCH_NEEDS_CPU_IDLE_COUPLED for OMAP4. Thanks to Kevin Hilman and Colin Cross on the suggestions/fixes on the intermediate version of this patch. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
| * | | ARM: OMAP: timer: allow gp timer clock-event to be used on both cpusSantosh Shilimkar2012-07-261-1/+3
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For coupled cpuidle to work when both cpus are active, it needs a global timer that can handle events for both cpus. This timer is used as the broadcast clock-event when the per-cpu timer hardware stop in low power states. Set the cpumask of clockevent_gpt to all cpus, set the rating correctly, and set the irq to allow the clockevent core to determine the affinity of the timer. Signed-off-by: Colin Cross <ccross@android.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
* | | Merge tag 'fixes-for-linus' of ↵Linus Torvalds2012-08-024-4/+6
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC fixes from Olof Johansson: "A few fixes for merge window fallout, and a bugfix for timer resume on PRIMA2." * tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: ARM: mmp: add missing irqs.h arm: mvebu: fix typo in .dtsi comment for Armada XP SoCs ARM: PRIMA2: delete redundant codes to restore LATCHED when timer resumes ARM: mxc: Include missing irqs.h header
| * | | ARM: mmp: add missing irqs.hHaojian Zhuang2012-08-021-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | arch/arm/mach-mmp/gplugd.c:195:13: error: ‘MMP_NR_IRQS’ undeclared here (not in a function) make[1]: *** [arch/arm/mach-mmp/gplugd.o] Error 1 Include <mach/irqs.h> to fix this issue. Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com> Signed-off-by: Olof Johansson <olof@lixom.net>
| * | | arm: mvebu: fix typo in .dtsi comment for Armada XP SoCsThomas Petazzoni2012-08-021-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The comment was wrongly referring to Armada 370 while the file is related to Armada XP. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Olof Johansson <olof@lixom.net>
| * | | ARM: PRIMA2: delete redundant codes to restore LATCHED when timer resumesBarry Song2012-08-021-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The only way to write LATCHED registers to write LATCH_BIT to LATCH register, that will latch COUNTER into LATCHED.e.g. writel_relaxed(SIRFSOC_TIMER_LATCH_BIT, sirfsoc_timer_base + SIRFSOC_TIMER_LATCH); Writing values to LATCHED registers directly is useless at all. Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Olof Johansson <olof@lixom.net>
| * | | ARM: mxc: Include missing irqs.h headerFabio Estevam2012-07-281-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Include irqs.h in order to fix the following build error: arch/arm/plat-mxc/tzic.c:195:11: error: 'FIQ_START' undeclared (first use in this function) Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Dirk Behme <dirk.behme@de.bosch.com> Signed-off-by: Olof Johansson <olof@lixom.net>
* | | | Merge branch 'dmaengine' of git://git.linaro.org/people/rmk/linux-armLinus Torvalds2012-08-0214-144/+13
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull ARM DMA engine updates from Russell King: "This looks scary at first glance, but what it is is: - a rework of the sa11x0 DMA engine driver merged during the previous cycle, to extract a common set of helper functions for DMA engine implementations. - conversion of amba-pl08x.c to use these helper functions. - addition of OMAP DMA engine driver (using these helper functions), and conversion of some of the OMAP DMA users to use DMA engine. Nothing in the helper functions is ARM specific, so I hope that other implementations can consolidate some of their code by making use of these helpers. This has been sitting in linux-next most of the merge cycle, and has been tested by several OMAP folk. I've tested it on sa11x0 platforms, and given it my best shot on my broken platforms which have the amba-pl08x controller. The last point is the addition to feature-removal-schedule.txt, which will have a merge conflict. Between myself and TI, we're planning to remove the old TI DMA implementation next year." Fix up trivial add/add conflicts in Documentation/feature-removal-schedule.txt and drivers/dma/{Kconfig,Makefile} * 'dmaengine' of git://git.linaro.org/people/rmk/linux-arm: (53 commits) ARM: 7481/1: OMAP2+: omap2plus_defconfig: enable OMAP DMA engine ARM: 7464/1: mmc: omap_hsmmc: ensure probe returns error if DMA channel request fails Add feature removal of old OMAP private DMA implementation mtd: omap2: remove private DMA API implementation mtd: omap2: add DMA engine support spi: omap2-mcspi: remove private DMA API implementation spi: omap2-mcspi: add DMA engine support ARM: omap: remove mmc platform data dma_mask and initialization mmc: omap: remove private DMA API implementation mmc: omap: add DMA engine support mmc: omap_hsmmc: remove private DMA API implementation mmc: omap_hsmmc: add DMA engine support dmaengine: omap: add support for cyclic DMA dmaengine: omap: add support for setting fi dmaengine: omap: add support for returning residue in tx_state method dmaengine: add OMAP DMA engine driver dmaengine: sa11x0-dma: add cyclic DMA support dmaengine: sa11x0-dma: fix DMA residue support dmaengine: PL08x: ensure all descriptors are freed when channel is released dmaengine: PL08x: get rid of write only pool_ctr and free_txd locking ...
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| *-. \ \ \ Merge branches 'dma-omap', 'dma-pl08x' and 'dma-sa11x0' into dmaengineRussell King2012-07-317-137/+11
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| | * | | | | dmaengine: PL08x: get rid of unnecessary checks in dma_slave_configRussell King2012-07-015-128/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Get rid of the unnecessary checks in dma_slave_config utilizing the DMA direction. This allows us to move the computation of cctl to the prepare function. Acked-by: Linus Walleij <linus.walleij@linaro.org> Tested-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | | | | ARM: spear: update for PL08x dma engine changesRussell King2012-07-012-9/+7
| | |/ / / / | | | | | | | | | | | | | | | | | | Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | | | ARM: 7481/1: OMAP2+: omap2plus_defconfig: enable OMAP DMA engineJavier Martinez Canillas2012-07-311-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit 13f30fc893e4610f67dd7a8b0b67aec02eac1775 Author: Russell King <rmk+kernel@arm.linux.org.uk> Date: Sat Apr 21 22:41:10 2012 +0100 mmc: omap: remove private DMA API implementation removed the private DMA API implementation from the OMAP mmc host to exclusively use the DMA engine API. Unfortunately OMAP MMC and High Speed MMC host drivers don't support poll mode and only works with DMA. Since omap2plus_defconfig doesn't enable this feature by default, the following error is happens on an IGEPv2 Rev.C (and probably on most OMAP boards with MMC support): [ 2.199981] omap_hsmmc omap_hsmmc.1: unable to obtain RX DMA engine channel 48 [ 2.215087] omap_hsmmc omap_hsmmc.0: unable to obtain RX DMA engine channel 62 Signed-off-by: Javier Martinez Canillas <javier@dowhile0.org> Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | | | ARM: omap: remove mmc platform data dma_mask and initializationRussell King2012-07-316-7/+0
| |/ / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | DMAengine uses the DMA engine device structure when mapping/unmapping memory for DMA, so the MMC devices do not need their DMA masks initialized (this reflects hardware: the MMC device is not the device doing DMA.) Tested-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
generated by cgit v1.2.3 (git 2.39.1) at 2025-01-31 14:20:58 +0100