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* ARM: tegra: convert dts files of Tegra114 platforms to use pinctrl definesLaxman Dewangan2013-12-162-274/+275
| | | | | | | | Use Tegra pinconrol dt-binding macro to set the values of different pinmux properties of Tegra114 platforms. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: tegra: convert device tree files to use key definesLaxman Dewangan2013-12-166-247/+253
| | | | | | | | | | | | | Use key code macros for all key code refernced for keys. For tegra20-seaboard.dts and tegra20-harmony.dts: The key comment for key (16th row and 1st column) is KEY_KPSLASH but code is 0x004e which is the key code for KEY_KPPLUS. As there other key exist with KY_KPPLUS, I am assuming key code is wrong and comment is fine. With this assumption, I am keeping the key code as KEY_KPSLASH. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: tegra: Enable PWM on Venice2Thierry Reding2013-12-161-0/+4
| | | | | | | | Subsequent patches will need to reference a PWM channel for backlight support, so enable the PWM device and assign a label to it. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: tegra: Add Tegra124 PWM supportThierry Reding2013-12-161-0/+10
| | | | | | | | | The PWM controller on Tegra124 is the same as the one on earlier SoC generations. Signed-off-by: Thierry Reding <treding@nvidia.com> [swarren, added reset properties] Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: tegra: add sound card to Venice2 DTStephen Warren2013-12-161-0/+35
| | | | | | | | Venice2 uses the MAX98090 audio CODEC, and supports built-in speakers, and a combo headphones/microphone jack. Add a top-level sound card node to represent this. Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: tegra: add audio-related device to Tegra124 DTStephen Warren2013-12-161-0/+103
| | | | | | | | | Tegra124 contains a similar set of audio devices to previous Tegra chips. Specifically, there is an AHUB device which contains DMA FIFOs and audio routing, and which hosts various audio-related components such as I2S controllers. Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: tegra: enable I2C controllers on Venice2Stephen Warren2013-12-161-0/+25
| | | | | | | | Enable all the I2C controllers that are wired up on Venice2. I don't know the correct I2C bus clock rates, so set them all to a conservative 100KHz for now. Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: tegra: add I2C controllers to Tegra124 DTStephen Warren2013-12-161-0/+90
| | | | | | | Tegra124 has 6 I2C controllers. The first 5 have identical configuration to Tegra114, but the sixth obviously has different interrupt/... IDs. Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: tegra: add MMC controllers to Tegra124 DTStephen Warren2013-12-162-0/+52
| | | | | | | | | | | | | | Tegra124 has 4 MMC controllers just like previous versions of the SoC. Note that there are some non-backwards-compatible HW differences, and hence a new DT compatible value must be used to describe the HW. Also enable the relevant controllers in the Venice2 board DT. power-gpios property suggested by Thierry Reding. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Tested-by: Thierry Reding <treding@nvidia.com>
* ARM: tegra: add Tegra124 pinmux node to DTStephen Warren2013-12-161-0/+6
| | | | | | | Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Tested-by: Thierry Reding <treding@nvidia.com> Acked by: Laxman Dewangan <ldewangan@nvidia.com>
* ARM: tegra: add APB DMA controller to Tegra124 DTStephen Warren2013-12-161-0/+51
| | | | | | | | | Instantiate the APB DMA controller in the Tegra124 DT, and add all DMA-related properties to other DT nodes that rely on (reference) the DMA controller's node. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Thierry Reding <treding@nvidia.com>
* ARM: tegra: add reset properties to Tegra124 DTsStephen Warren2013-12-161-0/+11
| | | | | | | | | The DT bindings now require module resets to be specified. The earlier patches which added these nodes were originally written before that requirement. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Thierry Reding <treding@nvidia.com>
* ARM: tegra: add clock properties for devices of Tegra124Joseph Lo2013-12-162-0/+29
| | | | | | | | | This patch adds clock properties for devices in the DT for basic support of Tegra124 SoC. Signed-off-by: Joseph Lo <josephl@nvidia.com> [swarren, added missing unit address to "clock" node] Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: tegra: fix node sort orderStephen Warren2013-12-169-332/+333
| | | | | | | | | | | | | | | For Tegra DT files, I've been attempting to keep the nodes sorted in the order: 1) Nodes with reg, in order of reg. 2) Nodes without reg, alphabetically. This patch fixes a few escapees that I missed:-( The diffs look larger than they really are, because sometimes when one node was moved up or down, diff chose to represent this as many other nodes being moved the other way! Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: tegra: add missing unit addresses to DTStephen Warren2013-12-1618-146/+146
| | | | | | | | | | DT node names should include a unit address iff the node has a reg property. For Tegra DTs at least, we were previously applying a different rule, namely that node names only needed to include a unit address if it was required to make the node name unique. Consequently, many unit addresses are missing. Add them. Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: tegra: remove legacy DMA entries from DTStephen Warren2013-12-123-39/+0
| | | | | | | | | Now that all Tegra drivers have been converted to use DMA APIs which retrieve DMA channel information from standard DMA DT properties, we can remove all the legacy DT DMA-related properties. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Thierry Reding <treding@nvidia.com>
* ARM: tegra: remove legacy clock entries from DTStephen Warren2013-12-123-32/+6
| | | | | | | | | Now that all Tegra drivers have been converted to use the common reset framework, we can remove all the legacy DT clocks/clock-names entries for "clocks" that were only used with the old custom Tegra module reset API. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Thierry Reding <treding@nvidia.com>
* ARM: tegra: pass reset to tegra_powergate_sequence_power_up()Stephen Warren2013-12-121-3/+5
| | | | | | | | | | | | Tegra's clock driver now provides an implementation of the common reset API (include/linux/reset.h). Use this instead of the old Tegra- specific API; that will soon be removed. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Bjorn Helgaas <bhelgaas@google.com> Acked-By: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Acked-by: Thierry Reding <treding@nvidia.com>
* ARM: tegra: select the reset frameworkStephen Warren2013-12-121-0/+2
| | | | | | | | | The Tegra clock driver is built unconditionally when Tegra support is enabled. In order to avoid having to ifdef the forthcoming reset driver implementation, have ARCH_TEGRA select RESET_CONTROLLER. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Thierry Reding <treding@nvidia.com>
* ARM: tegra: update DT files to add DMA propertiesStephen Warren2013-12-123-0/+119
| | | | | | | | | This patch switches the Tegra DT files to use the standard DMA DT bindings rather than custom properties. Note that the legacy properties are not yet removed; the drivers must be updated to use the new properties first. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Thierry Reding <treding@nvidia.com>
* ARM: tegra: update DT files to add reset propertiesStephen Warren2013-12-124-4/+266
| | | | | | | | | | | | An earlier patch updated the Tegra DT bindings to require resets and reset-names properties to be filled in. This patch updates the DT files to include those properties. Note that any legacy clocks and clock-names entries that are replaced by reset properties are not yet removed; the drivers must be updated to use the new resets and reset-names properties first. Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: tegra: add missing clock documentation to DT bindingsStephen Warren2013-12-122-4/+4
| | | | | | | | | | | | | Many of the Tegra DT binding documents say nothing about the clocks or clock-names properties, yet those are present and required in DT files. This patch simply updates the documentation file to match the implicit definition of the binding, based on real-world DT content. All Tegra bindings that mention clocks are updated to have consistent wording and formatting of the clock-related properties. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-By: Terje Bergstrom <tbergstrom@nvidia.com>
* Merge tag 'fixes-for-linus' of ↵Linus Torvalds2013-12-0430-91/+499
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC fixes from Olof Johansson: "Another batch of fixes for ARM SoCs for 3.13. The diffstat is large, mostly because of: - Another set of fixes to fix regressions caused by moving OMAP from board files to DT. Tony thinks this was the last major set of fixes, with maybe just a few small patches to follow. - More fixes for Marvell platforms, most dealing with misdescribed PCIe hardware, i.e. incorrect number of busses on some SoCs, etc. The line delta adds up due to various ranges moving around when this is fixed. But there's also: - Some smaller tweaks to defconfigs to make more boards bootable in my test setup for better coverage. - There are also a few other smaller fixes, a short series for at91, a couple of reverts for ux500, etc" * tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (39 commits) arm: dts: socfpga: Change some clocks of gate-clk type to perip-clk arm: socfpga: Enable ARM_TWD for socfpga ARM: multi_v7_defconfig: enable SDHCI_BCM_KONA and MMC_BLOCK_MINORS=16 ARM: sunxi_defconfig: enable NFS, TMPFS, PRINTK_TIME and nfsroot support ARM: multi_v7_defconfig: enable network for BeagleBone Black ARM: dts: Fix the name of supplies for smsc911x shared by OMAP ARM: OMAP2+: Powerdomain: Fix unchecked dereference of arch_pwrdm ARM: dts: omap3-beagle: Add omap-twl4030 audio support ARM: dts: omap4-sdp: Fix pin muxing for wl12xx ARM: dts: omap4-panda-common: Fix pin muxing for wl12xx ARM: at91: fixed unresolved symbol "at91_pm_set_standby" when built without CONFIG_PM ARM: at91: add usart3 alias to dtsi ARM: at91: sama5d3: reduce TWI internal clock frequency mmc: omap: Fix I2C dependency and make driver usable with device tree mmc: omap: Fix DMA configuration to not rely on device id ARM: dts: omap3-beagle: Fix USB host on beagle boards (for 3.13) ARM: dts: omap3-igep0020: name twl4030 VPLL2 regulator as vdds_dsi ARM: dts: AM33XX IGEP0033: add USB support ARM: dts: AM33XX BASE0033: add 32KBit EEPROM support ARM: dts: AM33XX BASE0033: add pinmux and user led support ...
| * arm: dts: socfpga: Change some clocks of gate-clk type to perip-clkDinh Nguyen2013-12-031-3/+4
| | | | | | | | | | | | | | | | Some of the clocks that were designated gate-clk do not have a gate, so change those clocks to be of periph-clk type. Signed-off-by: Dinh Nguyen <dinguyen@altera.com> Signed-off-by: Olof Johansson <olof@lixom.net>
| * arm: socfpga: Enable ARM_TWD for socfpgaDinh Nguyen2013-12-031-0/+1
| | | | | | | | | | | | | | | | Update Kconfig to enable TWD. Signed-off-by: Dinh Nguyen <dinguyen@altera.com> Reviewed-by: Pavel Machek <pavel@denx.de> Signed-off-by: Olof Johansson <olof@lixom.net>
| * ARM: multi_v7_defconfig: enable SDHCI_BCM_KONA and MMC_BLOCK_MINORS=16Olof Johansson2013-12-031-0/+2
| | | | | | | | | | | | | | | | | | Enable MMC/SD on the Broadcom mobile platforms, and increase the block minors from the default 8 to 16 (since the Broadcom board by default has root on the 8th partition). Signed-off-by: Olof Johansson <olof@lixom.net> Cc: stable@vger.kernel.org # v3.12
| * ARM: sunxi_defconfig: enable NFS, TMPFS, PRINTK_TIME and nfsroot supportOlof Johansson2013-12-031-0/+7
| | | | | | | | | | | | | | | | This enables a few more options on the sunxi defconfigs such that I can use nfsroot to boot them (there is no local storage support yet). It also enables PRINTK_TIME and tmpfs since it's a common distro requirement. Signed-off-by: Olof Johansson <olof@lixom.net>
| * Merge tag 'omap-for-v3.13/more-dt-regressions' of ↵Olof Johansson2013-12-035-19/+34
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes From Tony Lindgren: Few more legacy booting vs device tree booting fixes that people have noticed while booting things with device tree for things like omap4 WLAN, smsc911x, and beagle audio. Hopefully this will be it for the legacy booting vs device tree fixes for this -rc cycle. * tag 'omap-for-v3.13/more-dt-regressions' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: dts: Fix the name of supplies for smsc911x shared by OMAP ARM: OMAP2+: Powerdomain: Fix unchecked dereference of arch_pwrdm ARM: dts: omap3-beagle: Add omap-twl4030 audio support ARM: dts: omap4-sdp: Fix pin muxing for wl12xx ARM: dts: omap4-panda-common: Fix pin muxing for wl12xx
| | * ARM: dts: Fix the name of supplies for smsc911x shared by OMAPFlorian Vaussard2013-12-021-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | drivers/net/ethernet/smsc/smsc911x.c is expecting supplies named "vdd33a" and "vddvario". Currently the shared DTS file provides "vmmc" and "vmmc_aux", and the supply lookup will fail: smsc911x 2c000000.ethernet: Looking up vdd33a-supply from device tree smsc911x 2c000000.ethernet: Looking up vdd33a-supply property in node /ocp/gpmc@6e000000/ethernet@gpmc failed smsc911x 2c000000.ethernet: Looking up vddvario-supply from device tree smsc911x 2c000000.ethernet: Looking up vddvario-supply property in node /ocp/gpmc@6e000000/ethernet@gpmc failed Fix it! Looks like commmit 6b2978ac40e4 (ARM: dts: Shared file for omap GPMC connected smsc911x) made the problem more visible by moving the smc911x configuration from the omap3-igep0020.dts file to the generic file. But it seems we've had this problem since commit d72b4415011e (ARM: dts: omap3-igep0020: Add SMSC911x LAN chip support). Tested on OMAP3 Overo platform. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> [tony@atomide.com: updated comments for the commits causing the problem] Signed-off-by: Tony Lindgren <tony@atomide.com>
| | * ARM: OMAP2+: Powerdomain: Fix unchecked dereference of arch_pwrdmRajendra Nayak2013-12-021-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 'cd8abed' "ARM: OMAP2+: Powerdomain: Remove the need to always have a voltdm associated to a pwrdm" leads to the following Smatch complaint: arch/arm/mach-omap2/powerdomain.c:131 _pwrdm_register() error: we previously assumed 'arch_pwrdm' could be null (see line 105) So, fix the unchecked dereference of arch_pwrdm. Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Acked-by: Nishanth Menon <nm@ti.com> Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| | * ARM: dts: omap3-beagle: Add omap-twl4030 audio supportJarkko Nikula2013-12-021-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | This adds typical McBSP2-TWL4030 audio description to the legacy Beagle Board. Signed-off-by: Jarkko Nikula <jarkko.nikula@bitmer.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| | * ARM: dts: omap4-sdp: Fix pin muxing for wl12xxBalaji T K2013-12-021-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Mux mode for wlan/sdmmc5 should be MODE0 in pinmux_wl12xx_pins and Enable Pull up on sdmmc5_clk to detect SDIO card. This fixes WLAN on omap4-sdp that got broken in v3.10 when we moved omap4 to boot using device tree only as I did not have the WL12XX card in my omap4 SDP to test with. The commit that attempted to make WL12XX working on omap4 SDP was 775d2418f309 (ARM: dts: Fix muxing and regulator for wl12xx on the SDIO bus for blaze). Signed-off-by: Balaji T K <balajitk@ti.com> [tony@atomide.com: updated comments for the regression] Signed-off-by: Tony Lindgren <tony@atomide.com>
| | * ARM: dts: omap4-panda-common: Fix pin muxing for wl12xxBalaji T K2013-12-021-10/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | pin mux wl12xx_gpio and wl12xx_pins should be part of omap4_pmx_core and not omap4_pmx_wkup. So, move wl12xx_* to omap4_pmx_core. Fix the following error message: pinctrl-single 4a31e040.pinmux: mux offset out of range: 0x38 (0x38) pinctrl-single 4a31e040.pinmux: could not add functions for pinmux_wl12xx_pins 56x SDIO card is not detected after moving pin mux to omap4_pmx_core since sdmmc5_clk pull is disabled. Enable Pull up on sdmmc5_clk to detect SDIO card. This fixes a regression where WLAN did not work after a warm reset or after one up/down cycle that happened when we move omap4 to boot using device tree only. For reference, the kernel bug is described at: https://bugzilla.kernel.org/show_bug.cgi?id=63821 Cc: stable@vger.kernel.org # v3.10+ Signed-off-by: Balaji T K <balajitk@ti.com> [tony@atomide.com: update comments to describe the regression] Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | ARM: multi_v7_defconfig: enable network for BeagleBone BlackOlof Johansson2013-12-031-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | BeagleBone Black uses the TI CPSW ethernet controller, enable it in the multi_v7_defconfig for testing coverage purposes. Signed-off-by: Olof Johansson <olof@lixom.net> Acked-by: Tony Lindgren <tony@atomide.com> Cc: stable@vger.kernel.org # v3.12
| * | Merge tag 'at91-fixes' of git://github.com/at91linux/linux-at91 into fixesOlof Johansson2013-12-033-3/+11
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | From Nicolas Ferre: AT91: second round of fixes for 3.13 - reduce IP frequency for I2C on sama5d3 - missing aliases directive for USART3 on 9x5 family - a PM symbol is missing if !CONFIG_PM * tag 'at91-fixes' of git://github.com/at91linux/linux-at91: ARM: at91: fixed unresolved symbol "at91_pm_set_standby" when built without CONFIG_PM ARM: at91: add usart3 alias to dtsi ARM: at91: sama5d3: reduce TWI internal clock frequency
| | * | ARM: at91: fixed unresolved symbol "at91_pm_set_standby" when built without ↵Brent Taylor2013-12-021-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONFIG_PM If CONFIG_PM is not defined, then arch/arm/mach-at91/pm.c is not compiled in. This patch creates an inline function that does nothing if CONFIG_PM is not defined. Signed-off-by: Brent Taylor <motobud@gmail.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
| | * | ARM: at91: add usart3 alias to dtsiNicolas Ferre2013-12-021-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Alias was missing for SoC of the at91sam9x5 familly that embed USART3. Reported-by: Jiri Prchal <jiri.prchal@aksignal.cz> [b.brezillon@overkiz.com: advised to place changes in at91sam9x5_usart3.dtsi] Acked-by: Boris BREZILLON <b.brezillon@overkiz.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
| | * | ARM: at91: sama5d3: reduce TWI internal clock frequencyLudovic Desroches2013-12-021-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With some devices, transfer hangs during I2C frame transmission. This issue disappears when reducing the internal frequency of the TWI IP. Even if it is indicated that internal clock max frequency is 66MHz, it seems we have oversampling on I2C signals making TWI believe that a transfer in progress is done. This fix has no impact on the I2C bus frequency. Cc: <stable@vger.kernel.org> #3.10+ Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com> Acked-by: Wolfram Sang <wsa@the-dreams.de> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
| * | | Merge tag 'mvebu-dt-fixes-3.13' of git://git.infradead.org/linux-mvebu into ↵Olof Johansson2013-12-034-51/+112
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | fixes From Jason Cooper, mvebu DT fixes for v3.13: - mvebu - PCIe fixes now that we have test devices with more ports. - fix access to coherency registers * tag 'mvebu-dt-fixes-3.13' of git://git.infradead.org/linux-mvebu: ARM: mvebu: re-enable PCIe on Armada 370 DB ARM: mvebu: use the virtual CPU registers to access coherency registers ARM: mvebu: fix second and third PCIe unit of Armada XP mv78260 ARM: mvebu: second PCIe unit of Armada XP mv78230 is only x1 capable
| | * | | ARM: mvebu: re-enable PCIe on Armada 370 DBThomas Petazzoni2013-11-251-14/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 14fd8ed0a7fd19913 ("ARM: mvebu: Relocate Armada 370/XP PCIe device tree nodes") relocated the PCIe controller DT nodes one level up in the Device Tree, to reflect a more correct representation of the hardware introduced by the mvebu-mbus Device Tree binding. However, while most of the boards were properly adjusted accordingly, the Armada 370 DB board was left unchanged, and therefore, PCIe is seen as not enabled on this board. This patch fixes that by moving the PCIe controller node one level-up in armada-370-db.dts. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Cc: <stable@vger.kernel.org> # v3.12+ Fixes: 14fd8ed0a7fd19913 "ARM: mvebu: Relocate Armada 370/XP PCIe device tree nodes" Signed-off-by: Jason Cooper <jason@lakedaemon.net>
| | * | | ARM: mvebu: use the virtual CPU registers to access coherency registersGregory CLEMENT2013-11-251-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Armada XP provides a mechanism called "virtual CPU registers" or "per-CPU register banking", to access the per-CPU registers of the current CPU, without having to worry about finding on which CPU we're running. CPU0 has its registers at 0x21800, CPU1 at 0x21900, CPU2 at 0x21A00 and CPU3 at 0x21B00. The virtual registers accessing the current CPU registers are at 0x21000. However, in the Device Tree node that provides the register addresses for the coherency unit (which is responsible for ensuring coherency between processors, and I/O coherency between processors and the DMA-capable devices), a mistake was made: the CPU0-specific registers were specified instead of the virtual CPU registers. This means that the coherency barrier needed for I/O coherency was not behaving properly when executed from a CPU different from CPU0. This patch fixes that by using the virtual CPU registers. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Cc: <stable@vger.kernel.org> # v3.8+ Fixes: e60304f8cb7bb5 "arm: mvebu: Add hardware I/O Coherency support" Signed-off-by: Jason Cooper <jason@lakedaemon.net>
| | * | | ARM: mvebu: fix second and third PCIe unit of Armada XP mv78260Arnaud Ebalard2013-11-231-24/+85
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | mv78260 flavour of Marvell Armada XP SoC has 3 PCIe units. The two first units are both x4 and quad x1 capable. The third unit is only x4 capable. This patch fixes mv78260 .dtsi to reflect those capabilities. Signed-off-by: Arnaud Ebalard <arno@natisbad.org> Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Cc: <stable@vger.kernel.org> # v3.10.x Signed-off-by: Jason Cooper <jason@lakedaemon.net>
| | * | | ARM: mvebu: second PCIe unit of Armada XP mv78230 is only x1 capableArnaud Ebalard2013-11-231-12/+12
| | |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Various Marvell datasheets advertise second PCIe unit of mv78230 flavour of Armada XP as x4/quad x1 capable. This second unit is in fact only x1 capable. This patch fixes current mv78230 .dtsi to reflect that, i.e. makes 1.0 the second interface (instead of 2.0 at the moment). This was successfully tested on a mv78230-based ReadyNAS 2120 platform with a x1 device (FL1009 XHCI controller) connected to this second interface. Signed-off-by: Arnaud Ebalard <arno@natisbad.org> Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Cc: <stable@vger.kernel.org> # v3.10.x Signed-off-by: Jason Cooper <jason@lakedaemon.net>
| * | | Merge tag 'omap-for-v3.13/fixes-against-rc1-take2' of ↵Olof Johansson2013-12-0313-15/+320
| |\ \ \ | | | |/ | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes From Tony Lindgren: Some omap related fixes that have come up with people moving to device tree only based booting for omap2+. The series contains a handful of fixes for the igep boards as they were one of the first omap3 boards to jump over completely to device tree based booting. So these can be considered regressions compared to booting igep in legacy mode with board files in v3.12. Also included are few other device tree vs legacy booting regressions: - yet more missing omap3 .dtsi entries that have showed up booting various boards with device tree only - n900 eMMC device tree fix - fixes for beagle USB EHCI - two fixes to make omap2420 MMC work As we're moving omap2+ to be device tree only for v3.14, I'd like to have v3.13 work equally well for legacy based booting and device tree based booting. So there will be likely few more device tree related booting patches trickling in. This series also includes a regression fix for the omap timer posted mode that may wrongly stay on from the bootloader for some SoCs. * tag 'omap-for-v3.13/fixes-against-rc1-take2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: mmc: omap: Fix I2C dependency and make driver usable with device tree mmc: omap: Fix DMA configuration to not rely on device id ARM: dts: omap3-beagle: Fix USB host on beagle boards (for 3.13) ARM: dts: omap3-igep0020: name twl4030 VPLL2 regulator as vdds_dsi ARM: dts: AM33XX IGEP0033: add USB support ARM: dts: AM33XX BASE0033: add 32KBit EEPROM support ARM: dts: AM33XX BASE0033: add pinmux and user led support ARM: dts: AM33XX BASE0033: add pinmux and hdmi node to enable display ARM: dts: omap3-igep0020: Add pinmuxing for DVI output ARM: dts: omap3-igep0020: Add pinmux setup for i2c devices ARM: dts: omap3-igep: Update to use the TI AM/DM37x processor ARM: dts: omap3-igep: Add support for LBEE1USJYC WiFi connected to SDIO ARM: dts: omap3-igep: Fix bus-width for mmc1 ARM: OMAP2+: dss-common: change IGEP's DVI DDC i2c bus ARM: OMAP2+: Disable POSTED mode for errata i103 and i767 ARM: OMAP2+: Fix eMMC on n900 with device tree ARM: OMAP2+: Add fixed regulator to omap2plus_defconfig ARM: OMAP2+: Fix more missing data for omap3.dtsi file Signed-off-by: Olof Johansson <olof@lixom.net>
| | * | ARM: dts: omap3-beagle: Fix USB host on beagle boards (for 3.13)Roger Quadros2013-11-272-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Beagle (rev. C4) and Beagle-XM (all revs) need VAUX2 1.8V supply for the USB PHY. As the generic PHY driver can't handle more than one supply at the moment, we configure this supply to be always on. This will cause a very small power impact if the USB host subsystem is not in use, about 76.86 micro-W + LDO power. Older Beagle boards (prior to C4) don't have VAUX2 connected anywhere, so there won't be any functional impact on those boards other than some additional LDO power consumption. Reported-by: Nishanth Menon <nm@ti.com> Tested-by: Nishanth Menon <nm@ti.com> Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| | * | ARM: dts: omap3-igep0020: name twl4030 VPLL2 regulator as vdds_dsiJavier Martinez Canillas2013-11-271-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On Device Tree boot the VDDS_DSI regulator is not linked to the DPI device so omapfb driver probing fails with: [ 3.186035] OMAPFB: omapfb_probe [ 3.190704] omapdss DPI error: can't get VDDS_DSI regulator [ 3.196594] omapfb omapfb: failed to connect default display [ 3.202667] omapfb omapfb: failed to init overlay connections [ 3.208892] OMAPFB: free_resources [ 3.212493] OMAPFB: free all fbmem [ 3.216735] omapfb omapfb: failed to setup omapfb As a workaround name the VPLL2 regulator from twl4030 as vdds_dsi so getting the VDDS_DSI regulator will succeed on dpi_init_regulator(). Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Signed-off-by: Tony Lindgren <tony@atomide.com>
| | * | ARM: dts: AM33XX IGEP0033: add USB supportEnric Balletbo i Serra2013-11-271-0/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add node to support the USB Host and the USB OTG on the IGEP AQUILA Processor Board. Signed-off-by: Enric Balletbo i Serra <eballetbo@iseebcn.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| | * | ARM: dts: AM33XX BASE0033: add 32KBit EEPROM supportEnric Balletbo i Serra2013-11-271-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The IGEP AQUILA EXPANSION has a 32KBit EEPROM for user data storage. Signed-off-by: Enric Balletbo i Serra <eballetbo@iseebcn.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| | * | ARM: dts: AM33XX BASE0033: add pinmux and user led supportEnric Balletbo i Serra2013-11-271-0/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable the user leds on the IGEP AQUILA EXPANSION. The has two leds, one green and one red, that are controllable by software. Signed-off-by: Enric Balletbo i Serra <eballetbo@iseebcn.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| | * | ARM: dts: AM33XX BASE0033: add pinmux and hdmi node to enable displayEnric Balletbo i Serra2013-11-271-0/+46
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable the hdmi output and the LCD Controller on IGEP AQUILA. Also configure the correct pinmux for output of video data from the SoC to the HDMI encoder. Signed-off-by: Enric Balletbo i Serra <eballetbo@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
generated by cgit v1.2.3 (git 2.39.1) at 2025-01-29 03:18:40 +0100