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* Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/socLinus Torvalds2019-05-16137-5324/+1250
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull ARM SoC platform updates from Olof Johansson: "SoC updates, mostly refactorings and cleanups of old legacy platforms. Major themes this release: - Conversion of ixp4xx to a modern platform (drivers, DT, bindings) - Moving some of the ep93xx headers around to get it closer to multiplatform enabled. - Cleanups of Davinci This also contains a few patches that were queued up as fixes before 5.1 but I didn't get sent in before release" * tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (123 commits) ARM: debug-ll: add default address for digicolor ARM: u300: regulator: add MODULE_LICENSE() ARM: ep93xx: move private headers out of mach/* ARM: ep93xx: move pinctrl interfaces into include/linux/soc ARM: ep93xx: keypad: stop using mach/platform.h ARM: ep93xx: move network platform data to separate header ARM: stm32: add AMBA support for stm32 family MAINTAINERS: update arch/arm/mach-davinci ARM: rockchip: add missing of_node_put in rockchip_smp_prepare_pmu ARM: dts: Add queue manager and NPE to the IXP4xx DTSI soc: ixp4xx: qmgr: Add DT probe code soc: ixp4xx: qmgr: Add DT bindings for IXP4xx qmgr soc: ixp4xx: npe: Add DT probe code soc: ixp4xx: Add DT bindings for IXP4xx NPE soc: ixp4xx: qmgr: Pass resources soc: ixp4xx: Remove unused functions soc: ixp4xx: Uninline several functions soc: ixp4xx: npe: Pass addresses as resources ARM: ixp4xx: Turn the QMGR into a platform device ARM: ixp4xx: Turn the NPE into a platform device ...
| * Merge branch 'fixes' into arm/socOlof Johansson2019-05-1634-100/+138
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Merge in a few pending fixes from pre-5.1 that didn't get sent in: MAINTAINERS: update arch/arm/mach-davinci ARM: dts: ls1021: Fix SGMII PCS link remaining down after PHY disconnect ARM: dts: imx6q-logicpd: Reduce inrush current on USBH1 ARM: dts: imx6q-logicpd: Reduce inrush current on start ARM: dts: imx: Fix the AR803X phy-mode ARM: dts: sun8i: a33: Reintroduce default pinctrl muxing arm64: dts: allwinner: a64: Rename hpvcc-supply to cpvdd-supply ARM: sunxi: fix a leaked reference by adding missing of_node_put ARM: sunxi: fix a leaked reference by adding missing of_node_put Signed-off-by: Olof Johansson <olof@lixom.net>
| | * Merge tag 'imx-fixes-5.1-3' of ↵Olof Johansson2019-04-282-2/+18
| | |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into fixes i.MX fixes for 5.1, round 3: - A fix on LS1021A-TWR board that SGMII PCS link remains down for eTSEC0 upon an ifdown/ifup sequence. * tag 'imx-fixes-5.1-3' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: ARM: dts: ls1021: Fix SGMII PCS link remaining down after PHY disconnect Signed-off-by: Olof Johansson <olof@lixom.net>
| | | * ARM: dts: ls1021: Fix SGMII PCS link remaining down after PHY disconnectVladimir Oltean2019-04-212-2/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Each eTSEC MAC has its own TBI (SGMII) PCS and private MDIO bus. But due to a DTS oversight, both SGMII-compatible MACs of the LS1021 SoC are pointing towards the same internal PCS. Therefore nobody is controlling the internal PCS of eTSEC0. Upon initial ndo_open, the SGMII link is ok by virtue of U-boot initialization. But upon an ifdown/ifup sequence, the code path from ndo_open -> init_phy -> gfar_configure_serdes does not get executed for the PCS of eTSEC0 (and is executed twice for MAC eTSEC1). So the SGMII link remains down for eTSEC0. On the LS1021A-TWR board, to signal this failure condition, the PHY driver keeps printing '803x_aneg_done: SGMII link is not ok'. Also, it changes compatible of mdio0 to "fsl,etsec2-mdio" to match mdio1 device. Fixes: 055223d4d22d ("ARM: dts: ls1021a: Enable the eTSEC ports on QDS and TWR") Signed-off-by: Vladimir Oltean <olteanv@gmail.com> Reviewed-by: Claudiu Manoil <claudiu.manoil@nxp.com> Acked-by: Li Yang <leoyang.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| | * | Merge tag 'sunxi-fixes-for-5.1' of ↵Olof Johansson2019-04-283-1/+10
| | |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into fixes Allwinner fixes for 5.1 - Pinctrl related fixes for the A33 NAND controller - Fix the refcounting of DT nodes in our core code - Fix for a typo'd DT property * tag 'sunxi-fixes-for-5.1' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: ARM: dts: sun8i: a33: Reintroduce default pinctrl muxing arm64: dts: allwinner: a64: Rename hpvcc-supply to cpvdd-supply ARM: sunxi: fix a leaked reference by adding missing of_node_put ARM: sunxi: fix a leaked reference by adding missing of_node_put Signed-off-by: Olof Johansson <olof@lixom.net>
| | | * | ARM: dts: sun8i: a33: Reintroduce default pinctrl muxingMaxime Ripard2019-03-251-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit d02752149759 ("ARM: dts: sun8i-a23-a33: Move NAND controller device node to sort by address") moved the NAND controller node around, but dropped the default muxing in the process. Reintroduce it. Fixes: d02752149759 ("ARM: dts: sun8i-a23-a33: Move NAND controller device node to sort by address") Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
| | | * | ARM: sunxi: fix a leaked reference by adding missing of_node_putWen Yang2019-03-181-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The call to of_get_next_child returns a node pointer with refcount incremented thus it must be explicitly decremented after the last usage. Detected by coccinelle with the following warnings: ./arch/arm/mach-sunxi/platsmp.c:55:2-8: ERROR: missing of_node_put; acquired a node pointer with refcount incremented on line 46, but without a corresponding object release within this function. ./arch/arm/mach-sunxi/platsmp.c:138:2-8: ERROR: missing of_node_put; acquired a node pointer with refcount incremented on line 129, but without a corresponding object release within this function. Signed-off-by: Wen Yang <wen.yang99@zte.com.cn> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Cc: Maxime Ripard <maxime.ripard@bootlin.com> Cc: Chen-Yu Tsai <wens@csie.org> Cc: Russell King <linux@armlinux.org.uk> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
| | | * | ARM: sunxi: fix a leaked reference by adding missing of_node_putWen Yang2019-03-182-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The call to of_get_next_child returns a node pointer with refcount incremented thus it must be explicitly decremented after the last usage. Detected by coccinelle with the following warnings: ./arch/arm/mach-sunxi/mc_smp.c:110:1-7: ERROR: missing of_node_put; acquired a node pointer with refcount incremented on line 97, but without a corresponding object release within this functio ./arch/arm/mach-sunxi/platsmp.c:138:2-8: ERROR: missing of_node_put; acquired a node pointer with refcount incremented on line 129, but without a corresponding object release within this function Signed-off-by: Wen Yang <wen.yang99@zte.com.cn> Cc: Maxime Ripard <maxime.ripard@bootlin.com> Cc: Chen-Yu Tsai <wens@csie.org> Cc: Russell King <linux@armlinux.org.uk> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org (open list) Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
| | * | | Merge tag 'imx-fixes-5.1-2' of ↵Olof Johansson2019-04-2813-13/+15
| | |\ \ \ | | | | |/ | | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into fixes i.MX fixes for 5.1, round 2: - A couple of imx6q-logicpd device tree fixes to reduce inrush current, so that the board can always work properly. - Fix buggy device trees that use AR803X to set up phy-mode as rgmii-id. These device trees are broken since day one, and the bug gets exposed by the AR803X phy driver changes. i.MX community agreed to fix those broken device trees rather than supporting messy back compatibility in driver code. * tag 'imx-fixes-5.1-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: ARM: dts: imx6q-logicpd: Reduce inrush current on USBH1 ARM: dts: imx6q-logicpd: Reduce inrush current on start ARM: dts: imx: Fix the AR803X phy-mode Signed-off-by: Olof Johansson <olof@lixom.net>
| | | * | ARM: dts: imx6q-logicpd: Reduce inrush current on USBH1Adam Ford2019-04-111-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some USB peripherals draw more power, and the sourcing regulator take a little time to turn on. This patch fixes an issue where some devices occasionally do not get detected, because the power isn't quite ready when communication starts, so we add a bit of a delay. Fixes: 1c207f911fe9 ("ARM: dts: imx: Add support for Logic PD i.MX6QD EVM") Signed-off-by: Adam Ford <aford173@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| | | * | ARM: dts: imx6q-logicpd: Reduce inrush current on startAdam Ford2019-04-111-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The main 3.3V regulator sources a series of additional regulators. This patch adds a small delay, so when the 3.3V regulator comes on it delays a bit before the subsequent regulators can come on. This reduces the inrush current a bit on the external DC power supply to help prevent a situation where the sourcing power supply cannot source enough current and overloads and the kit fails to start. Fixes: 1c207f911fe9 ("ARM: dts: imx: Add support for Logic PD i.MX6QD EVM") Signed-off-by: Adam Ford <aford173@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| | | * | ARM: dts: imx: Fix the AR803X phy-modeFabio Estevam2019-04-1113-13/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 6d4cd041f0af ("net: phy: at803x: disable delay only for RGMII mode") exposed an issue on imx DTS files using AR8031/AR8035 PHYs. The end result is that the boards can no longer obtain an IP address via UDHCP, for example. Quoting Andrew Lunn: "The problem here is, all the DTs were broken since day 0. However, because the PHY driver was also broken, nobody noticed and it worked. Now that the PHY driver has been fixed, all the bugs in the DTs now become an issue" To fix this problem, the phy-mode property needs to be "rgmii-id", which has the following meaning as per Documentation/devicetree/bindings/net/ethernet.txt: "RGMII with internal RX and TX delays provided by the PHY, the MAC should not add the RX or TX delays in this case)" Tested on imx6-sabresd, imx6sx-sdb and imx7d-pico boards with successfully restored networking. Based on the initial submission from Steve Twiss for the imx6qdl-sabresd. Signed-off-by: Fabio Estevam <festevam@gmail.com> Tested-by: Baruch Siach <baruch@tkos.co.il> Tested-by: Soeren Moch <smoch@web.de> Tested-by: Steve Twiss <stwiss.opensource@diasemi.com> Tested-by: Adam Thomson <Adam.Thomson@diasemi.com> Signed-off-by: Steve Twiss <stwiss.opensource@diasemi.com> Tested-by: Marc Kleine-Budde <mkl@pengutronix.de> Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| * | | | Merge tag 'v5.2-rockchip-soc32-1' of ↵Olof Johansson2019-04-292-2/+3
| |\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/soc Missing of_node_put and some added __init contants. * tag 'v5.2-rockchip-soc32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: ARM: rockchip: add missing of_node_put in rockchip_smp_prepare_pmu ARM: rockchip: Mark pm-init functions __init Signed-off-by: Olof Johansson <olof@lixom.net>
| | * | | | ARM: rockchip: add missing of_node_put in rockchip_smp_prepare_pmuWen Yang2019-04-231-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The call to of_get_next_child returns a node pointer with refcount incremented thus it must be explicitly decremented after the last usage. Detected by coccinelle with the following warnings: ./arch/arm/mach-rockchip/platsmp.c:250:2-8: ERROR: missing of_node_put; acquired a node pointer with refcount incremented on line 241, but without a corresponding object release within this function. ./arch/arm/mach-rockchip/platsmp.c:260:2-8: ERROR: missing of_node_put; acquired a node pointer with refcount incremented on line 241, but without a corresponding object release within this function. ./arch/arm/mach-rockchip/platsmp.c:263:1-7: ERROR: missing of_node_put; acquired a node pointer with refcount incremented on line 241, but without a corresponding object release within this function. Signed-off-by: Wen Yang <wen.yang99@zte.com.cn> Cc: Russell King <linux@armlinux.org.uk> Cc: Heiko Stuebner <heiko@sntech.de> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-rockchip@lists.infradead.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
| | * | | | ARM: rockchip: Mark pm-init functions __initDouglas Anderson2019-04-121-2/+2
| | | |_|/ | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The functions rk3288_config_bootdata() and rk3288_suspend_init() are only called in the context of rockchip_suspend_init() which is already marked __init. We can mark them __init too. Signed-off-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
| * | | | Merge tag 'imx-soc-5.2' of ↵Olof Johansson2019-04-291-2/+4
| |\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/soc i.MX SoC update for 5.2: - Optimize i.MX6 cpuidle driver a little bit by omitting the unnecessary unmask of GINT for WAIT_CLOCKED mode. * tag 'imx-soc-5.2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: ARM: imx6: cpuidle: omit the unnecessary unmask of GINT Signed-off-by: Olof Johansson <olof@lixom.net>
| | * | | | ARM: imx6: cpuidle: omit the unnecessary unmask of GINTKohji Okuno2019-03-201-2/+4
| | |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In imx6_set_lpm, we only need to unmask GINT when not WAIT_CLOCKED, so add a check condition. Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Kohji Okuno <okuno.kohji@jp.panasonic.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| * | | | Merge tag 'lpc32xx-soc-for-5.2' of ↵Olof Johansson2019-04-291-39/+3
| |\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://github.com/vzapolskiy/linux-lpc32xx into arm/soc ARM: lpc32xx: platform updates for v5.2 Here are the changes for ARM NXP LPC32xx platform files: * removed TEST_CLK_SEL setup out of common clock framework control, * unnecessary header files are removed from inclusion, * registration of SSP0 and SSP1 is removed as done through device tree, * switched the main platform file to SPDX license identifier. * tag 'lpc32xx-soc-for-5.2' of https://github.com/vzapolskiy/linux-lpc32xx: ARM: lpc32xx: use SPDX license identifier ARM: lpc32xx: remove platform data of SSP0 and SSP1 controllers ARM: lpc32xx: remove redundant included headers ARM: lpc32xx: stop overwriting TEST_CLK_SEL Signed-off-by: Olof Johansson <olof@lixom.net>
| | * | | | ARM: lpc32xx: use SPDX license identifierVladimir Zapolskiy2019-04-191-10/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace GPLv2+ header with the SPDX identifier. Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
| | * | | | ARM: lpc32xx: remove platform data of SSP0 and SSP1 controllersVladimir Zapolskiy2019-04-191-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Both controllers are described in lpc32xx.dtsi and there is no any specific platform data added in the platform file. Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
| | * | | | ARM: lpc32xx: remove redundant included headersVladimir Zapolskiy2019-04-191-22/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | While the majority of platform data was moved to device tree description the list of included header files remained untouched, the change cleans it up to an irreducible and observable subset. Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
| | * | | | ARM: lpc32xx: stop overwriting TEST_CLK_SELAlexandre Belloni2019-04-191-5/+0
| | |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | While the UDA1380 is described in some lpc3250 device trees, there is currently no real user of that codec. Anyway, if the codec needs a clock, it should take it explicitly. lpc3250_machine_init is called for all the lpc32xx machines and some are using test1_clk (for example to strobe an HW watchdog). Overwriting TEST_CLK_SEL prevents booting those platforms. Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Tested-by: Gregory CLEMENT <gregory.clement@bootlin.com> Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
| * | | | Merge tag 'ixp4xx-for-armsoc' of ↵Olof Johansson2019-04-2941-1992/+632
| |\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik into arm/soc This modernizes the IXP4xx platform and adds initial Device Tree Support. We migrate to MULTI_IRQ_HANDLER, bumps the IRQs to offset 16, converts to SPARSE_IRQ, then we add proper subsystem drivers in each subsystem for irqchip, GPIO and clocksource and switch over to using these new drivers. Next we modernize the NPE and QMGR drivers and push them down into drivers/soc. This has been tested on the IXP4xx NSLU2 and the Gateworks GW2358-4. * tag 'ixp4xx-for-armsoc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik: (31 commits) ARM: dts: Add queue manager and NPE to the IXP4xx DTSI soc: ixp4xx: qmgr: Add DT probe code soc: ixp4xx: qmgr: Add DT bindings for IXP4xx qmgr soc: ixp4xx: npe: Add DT probe code soc: ixp4xx: Add DT bindings for IXP4xx NPE soc: ixp4xx: qmgr: Pass resources soc: ixp4xx: Remove unused functions soc: ixp4xx: Uninline several functions soc: ixp4xx: npe: Pass addresses as resources ARM: ixp4xx: Turn the QMGR into a platform device ARM: ixp4xx: Turn the NPE into a platform device ARM: ixp4xx: Move IXP4xx QMGR and NPE headers ARM: ixp4xx: Move NPE and QMGR to drivers/soc ARM: dts: Add some initial IXP4xx device trees ARM: ixp4xx: Add device tree boot support ARM: ixp4xx: Add DT bindings gpio: ixp4xx: Add OF probing support gpio: ixp4xx: Add DT bindings clocksource/drivers/ixp4xx: Add OF initialization support clocksource/drivers/ixp4xx: Add DT bindings ... Signed-off-by: Olof Johansson <olof@lixom.net>
| | * | | | ARM: dts: Add queue manager and NPE to the IXP4xx DTSILinus Walleij2019-04-231-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The AHB queue manager and Network Processing Engines are present on all IXP4xx SoCs, so we add them to the overarching device tree include. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| | * | | | soc: ixp4xx: qmgr: Pass resourcesLinus Walleij2019-04-232-7/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Instead of using hardcoded base address implicitly obtained through <linux/io.h>, pass the physical base for the QMGR block as a memory resource and remap it in the driver. Also pass the two IRQs as resources and obtain them in the driver. Use devm_* accessors and simplify the error path in the process. Drop memory region request as this is done by the devm_ioremap* functions. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| | * | | | soc: ixp4xx: npe: Pass addresses as resourcesLinus Walleij2019-04-232-3/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Instead of using hardcoded base addresses implicitly obtained through <linux/io.h>, pass the physical base for the three NPE blocks as memory resources and remap these in the driver. Drop the memory request region business, this will anyways be done by devm_* remapping functions. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| | * | | | ARM: ixp4xx: Turn the QMGR into a platform deviceLinus Walleij2019-04-231-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Instead of registering everything related to the QMGR unconditionally in the module_init() call (which will never work with multiplatform) create a platform device and probe the QMGR like any other device. Put the device second in the list of devices added for the platform so it is there when the dependent network and crypto drivers probe later on. This probe() path will not be taken unconditionally on device tree boots, so remove the DT guard. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| | * | | | ARM: ixp4xx: Turn the NPE into a platform deviceLinus Walleij2019-04-231-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Instead of registering everything related to the NPE unconditionally in the module_init() call (which will never work with multiplatform) create a platform device and probe the NPE like any other device. Put the device first in the list of devices added for the platform so it is there when the dependent network and crypto drivers probe later on. This probe() path will not be taken unconditionally on device tree boots, so remove the DT guard. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| | * | | | ARM: ixp4xx: Move IXP4xx QMGR and NPE headersLinus Walleij2019-04-232-244/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This moves the IXP4xx Queue Manager and Network Processing Engine headers out of the <mack/*> include path as that is incompatible with multiplatform. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| | * | | | ARM: ixp4xx: Move NPE and QMGR to drivers/socLinus Walleij2019-04-234-1141/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Network Processing Engine and Queue Manager are versatile firmware components used by several IXP4xx drivers. Drivers are relying on getting access to these components using <mach/*> headers which does not work with multiplatform. We need to find a better place for the drivers to live. Let's first move them to drivers/soc and the start to refactor a bit by passing resources and moving headers. This patch introduce static IRQ assignments but that will be fixed by later patches in this series. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| | * | | | ARM: dts: Add some initial IXP4xx device treesLinus Walleij2019-04-237-0/+338
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds a device tree for the IXP4xx-based Linksys NSLU2 and Gateworks GW2358 which encompass the Gateworks Cambria family. These will be the first IXP4xx device tree platforms. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| | * | | | ARM: ixp4xx: Add device tree boot supportLinus Walleij2019-04-235-0/+87
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds a minimal support for booting IXP4xx systems from device tree. We have to add hacks to the QMGR, NPE and notably also ethernet and watchdog drivers so that they don't crash the platform: these drivers are unconditionally starting to grab regions of statically remapped IO space with no concern of the device model or other platforms. We will go in and properly fix these drivers as we go along but for now this hack gets us to a place where we can start working on proper device tree support for these platforms. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| | * | | | ARM: ixp4xx: Switch to use new timer driverLinus Walleij2019-04-232-150/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This augments the IXP4xx to select and use the new timer driver in drivers/clocksource and removes the old code in the machine. Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Thomas Gleixner <tglx@linutronix.de> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| | * | | | ARM: ixp4xx: Switch to use new IRQ+GPIO driversLinus Walleij2019-04-235-392/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This deletes the old irq+gpiochip combo from the IXP4xx machine and switches it over to use the new drivers merged in respective subsystem. Cc: Jason Cooper <jason@lakedaemon.net> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| | * | | | ARM: ixp4xx: Convert to SPARSE_IRQLinus Walleij2019-04-1925-2/+47
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This localizes the <mach/irqs.h> header to the mach-ixp4xx directory, removes NR_IRQS and switches IXP4xx over to using SPARSE_IRQ. This is a prerequisite for DT support. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| | * | | | ARM: ixp4xx: Pass IRQ resource to beeperLinus Walleij2019-04-191-1/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | All IXP4xx devices except the beeper passes the IRQ as a resource, augment the NSLU2 beeper to do the same. This is a prerequisite for SPARSE_IRQ. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| | * | | | ARM: ixp4xx: Convert to MULTI_IRQ_HANDLERLinus Walleij2019-04-194-120/+126
| | |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This rewrites the IXP4xx to use MULTI_IRQ_HANDLER and create an irqdomain for the irqchip in the platform. We convert the timer to request the interrupt like any other driver in the process. We bump all IRQs to 16+offset to avoid using IRQ 0 and set NR_IRQS to 512 (the default for most systems). This conveniently fits with the first 16 IRQs being pre-allocated when using SPARSE_IRQ. This is a prerequisite for SPARSE_IRQ and DT boot. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | | Merge tag 'renesas-arm-soc-for-v5.2' of ↵Olof Johansson2019-04-292-2/+5
| |\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into arm/soc Renesas ARM Based SoC Updates for v5.2 * Power Management - Fix a leaked reference by adding missing of_node_put * R-Car M2-W (R8A77910) based Porter board - Enable regulator quirk * tag 'renesas-arm-soc-for-v5.2' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: shmobile: fix a leaked reference by adding missing of_node_put ARM: shmobile: porter: enable R-Car Gen2 regulator quirk Signed-off-by: Olof Johansson <olof@lixom.net>
| | * | | | ARM: shmobile: fix a leaked reference by adding missing of_node_putWen Yang2019-03-181-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The call to of_get_next_child returns a node pointer with refcount incremented thus it must be explicitly decremented after the last usage. Detected by coccinelle with the following warnings: ./arch/arm/mach-shmobile/pm-rcar-gen2.c:77:2-8: ERROR: missing of_node_put; acquired a node pointer with refcount incremented on line 66, but without a corresponding object release within this function. ./arch/arm/mach-shmobile/pm-rcar-gen2.c:85:2-8: ERROR: missing of_node_put; acquired a node pointer with refcount incremented on line 66, but without a corresponding object release within this function. ./arch/arm/mach-shmobile/pm-rcar-gen2.c:90:2-8: ERROR: missing of_node_put; acquired a node pointer with refcount incremented on line 66, but without a corresponding object release within this function. Signed-off-by: Wen Yang <wen.yang99@zte.com.cn> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * | | | ARM: shmobile: porter: enable R-Car Gen2 regulator quirkMarek Vasut2019-03-181-2/+4
| | |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Porter needs the regulator quirk, just like the other boards. But unlike the other boards, the Porter uses DA9063L, which is at 0x5a. Otherwise, DA9063L and DA9210 IRQ line is still connected to CPU IRQ2 . Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| * | | | Merge tag 'tegra-for-5.2-firmware' of ↵Olof Johansson2019-04-2916-235/+122
| |\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/soc firmware: tegra: Changes for v5.2-rc1 This set of changes includes improvements for Trusted Foundations and also moves the source files for this support into the standard location under drivers/firmware. * tag 'tegra-for-5.2-firmware' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: firmware: Move Trusted Foundations support ARM: tegra: Sort dependencies alphabetically ARM: tegra: Add firmware calls required for suspend-resume on Tegra30 ARM: tegra: Always boot CPU in ARM-mode ARM: tegra: Don't apply CPU erratas in insecure mode ARM: tegra: Set up L2 cache using Trusted Foundations firmware ARM: trusted_foundations: Provide information about whether firmware is registered ARM: trusted_foundations: Make prepare_idle call to take mode argument ARM: trusted_foundations: Support L2 cache maintenance Signed-off-by: Olof Johansson <olof@lixom.net>
| | * | | | firmware: Move Trusted Foundations supportThierry Reding2019-04-1711-311/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move the Trusted Foundations support out of arch/arm/firmware and into drivers/firmware where most other firmware support implementations are located. Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | | | ARM: tegra: Sort dependencies alphabeticallyThierry Reding2019-04-101-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The list of dependencies has become unsorted, which makes it difficult to find the right place to insert new dependencies. Restore alphabetical order to make future additions easier. Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | | | ARM: tegra: Add firmware calls required for suspend-resume on Tegra30Dmitry Osipenko2019-04-093-5/+84
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In order to suspend-resume CPU with Trusted Foundations firmware being present on Tegra30, the LP1/LP2 boot vectors and CPU caches need to be set up using the firmware calls and then suspend code shall avoid re-disabling parts that were disabled by the firmware. Tested-by: Robert Yang <decatf@gmail.com> Tested-by: Michał Mirosław <mirq-linux@rere.qmqm.pl> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | | | ARM: tegra: Always boot CPU in ARM-modeDmitry Osipenko2019-04-091-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CPU always jumps into reset handler in ARM-mode from the Trusted Foundations firmware, hence let's make CPU to always jump into kernel in ARM-mode regardless of the firmware presence. This is required to make Thumb-2 kernel working with the Trusted Foundations firmware on Tegra30. Tested-by: Robert Yang <decatf@gmail.com> Tested-by: Michał Mirosław <mirq-linux@rere.qmqm.pl> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | | | ARM: tegra: Don't apply CPU erratas in insecure modeDmitry Osipenko2019-04-094-13/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CPU isn't allowed to touch secure registers while running under secure monitor. Hence skip applying of CPU erratas in the reset handler if Trusted Foundations firmware presents. Partially based on work done by Michał Mirosław [1]. [1] https://www.spinics.net/lists/arm-kernel/msg594768.html Tested-by: Robert Yang <decatf@gmail.com> Tested-by: Michał Mirosław <mirq-linux@rere.qmqm.pl> Signed-off-by: Michał Mirosław <mirq-linux@rere.qmqm.pl> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | | | ARM: tegra: Set up L2 cache using Trusted Foundations firmwareDmitry Osipenko2019-04-091-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On Tegra30 L2 cache should be initialized using firmware call if CPU is running in insecure mode. Set up the required outer-cache write_sec() callback early during boot using the firmware API, it is always a NO-OP on T114+ and is NO-OP on T20/30 if Trusted Foundations firmware node isn't present in device-tree. Tested-by: Robert Yang <decatf@gmail.com> Tested-by: Michał Mirosław <mirq-linux@rere.qmqm.pl> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | | | ARM: trusted_foundations: Provide information about whether firmware is ↵Dmitry Osipenko2019-04-092-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | registered Add a helper that provides information about whether Trusted Foundations firmware operations have been registered. Tested-by: Robert Yang <decatf@gmail.com> Tested-by: Michał Mirosław <mirq-linux@rere.qmqm.pl> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | | | ARM: trusted_foundations: Make prepare_idle call to take mode argumentDmitry Osipenko2019-04-094-4/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Trusted Foundations firmware call varies depending on the required suspend-mode. Make the firmware API to take the mode argument in order to expose all of the modes to firmware user. Tested-by: Robert Yang <decatf@gmail.com> Tested-by: Michał Mirosław <mirq-linux@rere.qmqm.pl> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | | | ARM: trusted_foundations: Support L2 cache maintenanceDmitry Osipenko2019-04-092-0/+51
| | |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Implement L2 cache initialization firmware callback that should be invoked early during boot in order to set up the required outer cache driver's callbacks and add the callback required for L2X0 maintenance. Partially based on work done by Michał Mirosław [1]. [1] https://www.spinics.net/lists/arm-kernel/msg594765.html Tested-by: Robert Yang <decatf@gmail.com> Tested-by: Michał Mirosław <mirq-linux@rere.qmqm.pl> Signed-off-by: Michał Mirosław <mirq-linux@rere.qmqm.pl> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>