| Commit message (Collapse) | Author | Age | Files | Lines |
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This patch adds pmu table setting feature for EXYNOS5250.
Signed-off-by: Jongpill Lee <boyko.lee@samsung.com>
[kgene.kim@samsung.com: re-worked on top of v3.4-rc7]
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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This patch changes the function name of pmc. to support new
EXYNOS SoCs commonly.
Signed-off-by: Jongpill Lee <boyko.lee@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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This patch removes GIC save & restore functino in pm.c. Because when
enalbe CPU_PM feature, GIC driver execute save and restore function
in CPU_PM notifier.
So it is not needed to GIC save & restore function at pm.c file.
Signed-off-by: Jongpill Lee <boyko.lee@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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EXYNOS5250 includes a interrupt combiner controller that can group
upto 8 interrupts from different sources and deliver a single combined
interrupt to the GIC. Add a node for the interrupt combiner controller
in the device tree source file.
Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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The S3C2416 has a separate second interrupt register-set to support
additional irqs. This patch adds the necessary constants and registers
the irq handlers for it.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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Use AUXDATA to set the device names for controller instances
discovered from device tree.
Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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Update EXYNOS5 device tree source files for EXYNOS5250 SoC.
This includes new additions to the EXYNOS5 dtsi and SMDK5250
dts files and few minor fixes.
Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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Add device tree based instantiation of the interrupt combiner controller.
Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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Add irq_domain support for hardware interrupts of the interrupt combiner.
The hardware interrupts of all the instances of the combiner are grouped
in a single irq_domain.
Cc: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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A seperate bus_type instance is not required for EXYNOS5. The
existing bus_type instance used with EXYNOS4 is sufficient for
both EXYNOS4 and EXYNOS5. This also solves issue of uninitialized
usage of exynos4_subsys in EXYNOS4 power management code that is
reused for EXYNOS5 also. In addition to that, the existing
exynos4_subsys bus_type is renamed to exynos_subsys to indicate
that it is reused on both EXYNOS4 and EXYNOS5 platforms.
Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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The fout clock of BPLL and MPLL have a selectable source on EXYNOS5250.
The clock options are a fixed divided by 2 clock and the output of the
PLL itself. Add support for these new clock instances.
Signed-off-by: Kisoo Yu <ksoo.yu@samsung.com>
Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
[kgene.kim@samsung.com: moved common pll stuff into s5p-clock.c]
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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Add GPC4 bank instance which is included in rev1 of EXYNOS5.
Signed-off-by: Sangsu Park <sangsu4u.park@samsung.com>
Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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Redefine IRQ_MCT_L0,1 irq definition as it is changed in rev1 of EXYNOS5.
Signed-off-by: Changhwan Youn <chaos.youn@samsung.com>
Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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Adapt to changes in GIC physical address in rev1 of EXYNOS5.
Signed-off-by: Changhwan Youn <chaos.youn@samsung.com>
Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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Add watchdog timer clock instance for EXYNOS5 watchdog controller.
Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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Since just plat-samsung can support all of Samsung stuff so
that there is no more need to keep the plat-s5p for S5P SoCs.
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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This patch provides the suspend/resume support for EXYNOS4412.
Signed-off-by: Inderpal Singh <inderpal.singh@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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This lets the s3c64xx-spi driver know the specifics of the controller-
variant and also setups the gpios and the misccr bit.
This setup is valid for all S3C24XX SoCs containing a HSSPI controller
(i.e. S3C2416/2450 and S3C2443)
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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Currently usable are busclk0 and busclk2.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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The S3C_PA_SPIx constants are only used by the s3c64xx-spi driver
and don't conflict with the older SoCs as they don't support hsspi.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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SoCs starting with the S3C2443 contain SPI controllers compatible with the
spi-s3c64xx driver and therefore need separate dma channels for rx and tx.
This patch introduces dma channel declarations for these and changes the
dma-s3c2443.c accordingly.
None of the older SoCs use the spi-dma at all. Most boards bitbang their
spi use and the spi-s3c24xx driver also does not use the dma system.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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When the hsmmc clock lookup was changed to be lookup tables based,
it seems the S3C2443 was forgotten.
As subsequent patches will want to add more lookups to it, this
patch adds the base table with the missing hsmmc lookup.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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The naming EXYNOS4 is changed to EXYNOS for using shared SPI
config of EXYNOS4 and EXYNOS5. And S3C64XX_DEV_SPIn configs
are added to MACH_SMDK5250 config to use SPI on the EYXNOS5250.
Signed-off-by: Kyoungil Kim <ki0351.kim@samsung.com>
[kgene.kim@samsung.com: updated because of non-existing config]
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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mach-exynos/dma.c is updated to support both exynos4 and exynos5.
Signed-off-by: Boojin Kim <boojin.kim@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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Add the gate clocks and register region address definition
for FIMC-LITE devices available in EXYNOS4X12 SoCs.
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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Conflicts:
arch/arm/mach-exynos/Makefile
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Handling System MMUs with an identifier is not flexible to manage
System MMU platform devices because of the following reasons:
1. A device driver which needs to handle System MMU must know the ID.
2. A System MMU may not present in some implementations of Exynos family.
3. Handling System MMU with IOMMU API does not require an ID.
This patch is the result of removing ID of System MMUs.
Instead, a device driver that needs to handle its System MMU must
use IOMMU API while its descriptor of platform device is given.
This patch also includes the following enhancements:
- A System MMU device becomes a child if its power domain device.
- clkdev
Signed-off-by: KyongHo Cho <pullip.cho@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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This patch removes System MMU device driver from arm/plat-s5p tree
for transition to implement IOMMU driver.
Although controlling System MMU in this removing driver
is similar to the new IOMMU driver in the following patch,
the new one is almost rewrite of this driver and there is no
benefit to moving the driver file from arch/arm/ to drivers/iommu.
Signed-off-by: KyongHo Cho <pullip.cho@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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Add platform device for Exynos DRM core. This device is used
for creating DRM user-space device and allocating memory for
display buffers.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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Add the currently in-tree device tree sources to the dtbs target.
Signed-off-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM: SoC fixes from Olof Johansson:
"I was hoping to be done with fixes for 3.4 but we got two branches
from subarch maintainers the last couple of days. So here is one
last(?) pull request for arm-soc containing 7 patches:
- Five of them are for shmobile dealing with SMP setup and compile
failures
- The remaining two are for regressions on the Samsung platforms"
* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
ARM: EXYNOS: fix ctrlbit for exynos5_clk_pdma1
ARM: EXYNOS: use s5p-timer for UniversalC210 board
ARM / mach-shmobile: Invalidate caches when booting secondary cores
ARM / mach-shmobile: sh73a0 SMP TWD boot regression fix
ARM / mach-shmobile: r8a7779 SMP TWD boot regression fix
ARM: mach-shmobile: convert ag5evm to use the generic MMC GPIO hotplug helper
ARM: mach-shmobile: convert mackerel to use the generic MMC GPIO hotplug helper
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git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into fixes
* 'v3.4-samsung-fixes-5' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
ARM: EXYNOS: fix ctrlbit for exynos5_clk_pdma1
ARM: EXYNOS: use s5p-timer for UniversalC210 board
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It should be (1 << 2) for ctrlbit of exynos5_clk_pdma1.
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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Commit 069d4e743 ("ARM: EXYNOS4: Remove clock event timers using
ARM private timers") removed support for local timers and forced
to use MCT as event source. However MCT is not operating properly
on early revision of EXYNOS4 SoCs. All UniversalC210 boards are
based on it, so that commit broke support for it. This patch
provides a workaround that enables UniversalC210 boards to boot
again. s5p-timer is used as an event source, it works only for
non-SMP builds.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/rafael/renesas into fixes
By Guennadi Liakhovetski (2) and others via Rafael J. Wysocki:
"[...] urgent fixes for Renesas ARM-based platforms. Four of these
commits are fixes of regressions new in 3.4-rc and the last one is
necessary for SMP to work on those systems in general."
* 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/renesas:
ARM / mach-shmobile: Invalidate caches when booting secondary cores
ARM / mach-shmobile: sh73a0 SMP TWD boot regression fix
ARM / mach-shmobile: r8a7779 SMP TWD boot regression fix
ARM: mach-shmobile: convert ag5evm to use the generic MMC GPIO hotplug helper
ARM: mach-shmobile: convert mackerel to use the generic MMC GPIO hotplug helper
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Make sure L1 caches are invalidated when booting secondary
cores. Needed to boot all mach-shmobile SMP systems that
are using Cortex-A9 including sh73a0, r8a7779 and EMEV2.
Thanks to imx and tegra guys for actual code.
Signed-off-by: Magnus Damm <damm@opensource.se>
Tested-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
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Fix SMP TWD boot regression on sh73a0 based platforms caused by:
4200b16 ARM: shmobile: convert to twd_local_timer_register() interface
After the merge of the above commit it has been impossible to boot
sh73a0 based SoCs with SMP enabled and CONFIG_HAVE_ARM_TWD=y. The
kernel crashes at smp_init_cpus() timing which is before the console
has been initialized, so to the user this looks like a kernel lock up
without any particular error message.
This patch fixes the regression on sh73a0 by moving the TWD
registration code from smp_init_cpus() to sys_timer->init() time.
This patch removed shmobile_twd_init() which is no longer needed
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
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Fix SMP TWD boot regression on r8a7779 based platforms caused by:
4200b16 ARM: shmobile: convert to twd_local_timer_register() interface
After the merge of the above commit it has been impossible to boot
r8a7779 based SoCs with SMP enabled and CONFIG_HAVE_ARM_TWD=y. The
kernel crashes at smp_init_cpus() timing which is before the console
has been initialized, so to the user this looks like a kernel lock up
without any particular error message.
This patch fixes the regression on r8a7779 by moving the TWD
registration code from smp_init_cpus() to sys_timer->init() time.
Signed-off-by: Magnus Damm <damm@opensource.se>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
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