summaryrefslogtreecommitdiffstats
path: root/arch/arm (follow)
Commit message (Collapse)AuthorAgeFilesLines
* Merge tag 'dt2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-socLinus Torvalds2012-08-0237-556/+1277
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull arm-soc Marvell Orion device-tree updates from Olof Johansson: "This contains a set of device-tree conversions for Marvell Orion platforms that were staged early but took a few tries to get the branch into a format where it was suitable for us to pick up. Given that most people working on these platforms are hobbyists with limited time, we were a bit more flexible with merging it even though it came in late." * tag 'dt2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (21 commits) ARM: Kirkwood: Replace mrvl with marvell ARM: Kirkwood: Describe GoFlex Net LEDs and SATA in DT. ARM: Kirkwood: Describe Dreamplug LEDs in DT. ARM: Kirkwood: Describe iConnects LEDs in DT. ARM: Kirkwood: Describe iConnects temperature sensor in DT. ARM: Kirkwood: Describe IB62x0 LEDs in DT. ARM: Kirkwood: Describe IB62x0 gpio-keys in DT. ARM: Kirkwood: Describe DNS32? gpio-keys in DT. ARM: Kirkwood: Move common portions into a kirkwood-dnskw.dtsi ARM: Kirkwood: Replace DNS-320/DNS-325 leds with dt bindings ARM: Kirkwood: Describe DNS325 temperature sensor in DT. ARM: Kirkwood: Use DT to configure SATA device. ARM: kirkwood: use devicetree for SPI on dreamplug ARM: kirkwood: Add LS-XHL and LS-CHLv2 support ARM: Kirkwood: Initial DTS support for Kirkwood GoFlex Net ARM: Kirkwood: Add basic device tree support for QNAP TS219. ATA: sata_mv: Add device tree support ARM: Orion: DTify the watchdog timer. ARM: Orion: Add arch support needed for I2C via DT. ARM: kirkwood: use devicetree for orion-spi ... Conflicts: drivers/watchdog/orion_wdt.c
| * Merge branch 'marvell/dt' into late2/dtOlof Johansson2012-07-2938-581/+1342
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * marvell/dt: (41 commits) ARM: Kirkwood: Replace mrvl with marvell ARM: Kirkwood: Describe GoFlex Net LEDs and SATA in DT. ARM: Kirkwood: Describe Dreamplug LEDs in DT. ARM: Kirkwood: Describe iConnects LEDs in DT. ARM: Kirkwood: Describe iConnects temperature sensor in DT. ARM: Kirkwood: Describe IB62x0 LEDs in DT. ARM: Kirkwood: Describe IB62x0 gpio-keys in DT. ARM: Kirkwood: Describe DNS32? gpio-keys in DT. ARM: Kirkwood: Move common portions into a kirkwood-dnskw.dtsi ARM: Kirkwood: Replace DNS-320/DNS-325 leds with dt bindings ARM: Kirkwood: Describe DNS325 temperature sensor in DT. ARM: Kirkwood: Use DT to configure SATA device. ARM: kirkwood: use devicetree for SPI on dreamplug ARM: kirkwood: Add LS-XHL and LS-CHLv2 support ARM: Kirkwood: Initial DTS support for Kirkwood GoFlex Net ARM: Kirkwood: Add basic device tree support for QNAP TS219. ATA: sata_mv: Add device tree support ARM: Orion: DTify the watchdog timer. ARM: Orion: Add arch support needed for I2C via DT. ARM: kirkwood: use devicetree for orion-spi ...
| | * ARM: Kirkwood: Replace mrvl with marvellAndrew Lunn2012-07-276-6/+6
| | | | | | | | | | | | | | | | | | | | | It has been decided to use marvell, not mrvl, in the compatibility property. Search & replace. Signed-off-by: Andrew Lunn <andrew@lunn.ch>
| | * ARM: Kirkwood: Describe GoFlex Net LEDs and SATA in DT.Andrew Lunn2012-07-272-84/+50
| | | | | | | | | | | | | | | Signed-off-by: Andrew Lunn <andrew@lunn.ch> Tested-by: Josh Coombs <josh.coombs@gmail.com>
| | * ARM: Kirkwood: Describe Dreamplug LEDs in DT.Andrew Lunn2012-07-272-34/+16
| | | | | | | | | | | | Signed-off-by: Andrew Lunn <andrew@lunn.ch>
| | * ARM: Kirkwood: Describe iConnects LEDs in DT.Andrew Lunn2012-07-272-46/+34
| | | | | | | | | | | | Signed-off-by: Andrew Lunn <andrew@lunn.ch>
| | * ARM: Kirkwood: Describe iConnects temperature sensor in DT.Andrew Lunn2012-07-272-10/+8
| | | | | | | | | | | | | | | | | | | | | Now that we have I2C support in DT, describe the LM63 in the DT file for the iConnect. Signed-off-by: Andrew Lunn <andrew@lunn.ch>
| | * ARM: Kirkwood: Describe IB62x0 LEDs in DT.Andrew Lunn2012-07-272-36/+17
| | | | | | | | | | | | | | | Signed-off-by: Andrew Lunn <andrew@lunn.ch> Tested-by: Simon Baatz <gmbnomis@gmail.com>
| | * ARM: Kirkwood: Describe IB62x0 gpio-keys in DT.Andrew Lunn2012-07-272-31/+16
| | | | | | | | | | | | | | | | | | | | | | | | Now that the GPIO controllers have been converted over to DT, described the gpio-keys in DT. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Tested-by: Simon Baatz <gmbnomis@gmail.com>
| | * ARM: Kirkwood: Describe DNS32? gpio-keys in DT.Jamie Lentin2012-07-272-37/+21
| | | | | | | | | | | | | | | | | | | | | Move description of GPIO keys on both the DNS320 and DNS325 into DT. Signed-off-by: Jamie Lentin <jm@lentin.co.uk> Signed-off-by: Andrew Lunn <andrew@lunn.ch>
| | * ARM: Kirkwood: Move common portions into a kirkwood-dnskw.dtsiJamie Lentin2012-07-273-82/+50
| | | | | | | | | | | | | | | | | | | | | | | | A lot of device setup is shared between DNS-320 and DNS-325, move the definitions into a common include. Signed-off-by: Jamie Lentin <jm@lentin.co.uk> Signed-off-by: Andrew Lunn <andrew@lunn.ch>
| | * ARM: Kirkwood: Replace DNS-320/DNS-325 leds with dt bindingsJamie Lentin2012-07-273-90/+50
| | | | | | | | | | | | | | | | | | | | | Replace code in board-dnskw with the equivalent devicetree bindings. Signed-off-by: Jamie Lentin <jm@lentin.co.uk> Signed-off-by: Andrew Lunn <andrew@lunn.ch>
| | * ARM: Kirkwood: Describe DNS325 temperature sensor in DT.Andrew Lunn2012-07-272-13/+10
| | | | | | | | | | | | | | | | | | | | | | | | Now that we have I2C support in DT, describe the LM75 in the DT file for the DNS325. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Jamie Lentin <jm@lentin.co.uk>
| | * ARM: Kirkwood: Use DT to configure SATA device.Andrew Lunn2012-07-279-20/+24
| | | | | | | | | | | | | | | | | | | | | | | | Convert boards using DT, but the old way of configuring SATA to now use properties in there DT file. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Tested-by: Simon Baatz <gmbnomis@gmail.com>
| | * ARM: kirkwood: use devicetree for SPI on dreamplugMichael Walle2012-07-272-41/+29
| | | | | | | | | | | | | | | | | | | | | Use the device tree for the SPI driver and partition layout. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Andrew Lunn <andrew@lunn.ch>
| | * ARM: kirkwood: Add LS-XHL and LS-CHLv2 supportMichael Walle2012-07-279-0/+291
| | | | | | | | | | | | | | | | | | | | | | | | Add support for Buffalo Linkstation LS-XHL and LS-CHLv2 using the device tree where possible. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Andrew Lunn <andrew@lunn.ch>
| | * ARM: Kirkwood: Initial DTS support for Kirkwood GoFlex NetJosh Coombs2012-07-277-0/+224
| | | | | | | | | | | | | | | | | | | | | | | | This patch supplies the necessary DTS and supporting files to boot up a Seagate GoFlex Net with 3.5.0-rc3. Signed-off-by: Joshua Coombs <josh.coombs@gmail.com> Signed-off-by: Andrew Lunn <andrew@lunn.ch>
| | * ARM: Kirkwood: Add basic device tree support for QNAP TS219.Andrew Lunn2012-07-279-0/+228
| | | | | | | | | | | | | | | | | | | | | | | | | | | The two different variants of QNAP TS devices, varying by SoC, put the GPIO keys on different GPIO lines. Hence we need two different DT board descriptions, which share the same board-ts219.c file. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Acked-by: Jason Cooper <jason@lakedaemon.net>
| | * ATA: sata_mv: Add device tree supportAndrew Lunn2012-07-272-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for instantiating this driver from device tree, and add the necassary DT information to the kirkwood.dtsi file. This is based on previous work by Michael Walle and Jason Cooper. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Tested-by: Josh Coombs <josh.coombs@gmail.com>
| | * ARM: Orion: DTify the watchdog timer.Andrew Lunn2012-07-272-1/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add device tree support to the Orion watchdog timer, and enable its use in the kirkwood devices using device tree. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@googlemail.com> Tested-by: Simon Baatz <gmbnomis@gmail.com>
| | * ARM: Orion: Add arch support needed for I2C via DT.Andrew Lunn2012-07-274-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The MV64XXX I2C driver needs a clock in order to calculate the baud rate factors. So add an clk to the clk tree. Also add the base DT properties for kirkwood devices. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Conflicts: arch/arm/mach-kirkwood/common.c
| | * ARM: kirkwood: use devicetree for orion-spiMichael Walle2012-07-272-1/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Populate the devices with auxdata to set the device names which are used by clkdev to lookup the clocks. Signed-off-by: Michael Walle <micheal@walle.cc> Signed-off-by: Andrew Lunn <andrew@lunn.ch> --- v2: Add interrupts properties, although not used.
| | * ARM: Orion: DT support for IRQ and GPIO ControllersAndrew Lunn2012-07-2711-132/+264
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Both IRQ and GPIO controllers can now be represented in DT. The IRQ controllers are setup first, and then the GPIO controllers. Interrupts for GPIO lines are placed directly after the main interrupts in the interrupt space. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@googlemail.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Tested-by: Josh Coombs <josh.coombs@gmail.com> Tested-by: Simon Baatz <gmbnomis@gmail.com>
* | | Merge tag 'pm2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-socLinus Torvalds2012-08-023-47/+103
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull arm-soc cpuidle enablement for OMAP from Olof Johansson: "Coupled cpuidle was meant to merge for 3.5 through Len Brown's tree, but didn't go in because the pull request ended up rejected. So it just got merged, and we got this staged branch that enables the coupled cpuidle code on OMAP. With a stable git workflow from the other maintainer we could have staged this earlier, but that wasn't the case so we have had to merge it late. The alternative is to hold it off until 3.7 but given that the code is well-isolated to OMAP and they are eager to see it go in, I didn't push back hard in that direction." * tag 'pm2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: ARM: OMAP4: CPUidle: Open broadcast clock-event device. ARM: OMAP4: CPUidle: add synchronization for coupled idle states ARM: OMAP4: CPUidle: Use coupled cpuidle states to implement SMP cpuidle. ARM: OMAP: timer: allow gp timer clock-event to be used on both cpus
| * | | ARM: OMAP4: CPUidle: Open broadcast clock-event device.Santosh Shilimkar2012-07-261-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | OMAP4 idle driver uses CLOCK_EVT_NOTIFY_BROADCAST_[ENTER/EXIT] for broadcast clock events. But _ENTER/_EXIT doesn't really open broadcast clock events and to explicitly setup the broadcast device, CLOCK_EVT_NOTIFY_BROADCAST_ON should be used. Add the missing CLOCK_EVT_NOTIFY_BROADCAST_ON clockevent notifications. This will setup the broadcast timer in either periodic/oneshot modes correctly. Recent clockevent infrastructure change 77b0d60 {leave the broadcast device in shutdown mode when not needed} exposed this bug leading to boot hangs in oneshot mode. Prior to this, periodic broadcast mode was also broken. This change fixes both the periodic/oneshot broadcast modes. Discussion thread : https://lkml.org/lkml/2012/4/9/13 Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
| * | | ARM: OMAP4: CPUidle: add synchronization for coupled idle statesKevin Hilman2012-07-261-1/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With coupled idle states, a failure for any CPU to hit a low power state must be coordinated such that all CPUs abort. On OMAP4, when entering a coupled state, CPU0 has to wait for CPU1 to enter its low power state before it can enter its low power state. This is implemented by letting CPU0 wait for the CPU1 powerdomain to hit off. However, there are conditions where CPU1 might abort/fail and not hit off while CPU0 is waiting for it. For example, a CPU1 wakeup or a failed attempt to hit off due to hardware conditions. To avoid the deadlock where CPU0 would continually wait for CPU1 to hit off-mode, this patch adds a flag to signal when each CPU has come out of its low-power state. CPU0 then checks whether CPU1 has hit off *or* has already completed its attempt to hit off. If the latter, CPU0 must abort its attempt to hit a low-power state so the coupled state enter method can return. In addition, cpuidle_coupled_parallel_barrier() is used to ensure the clearing of the 'done' flag is synchronized on all CPUs. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
| * | | ARM: OMAP4: CPUidle: Use coupled cpuidle states to implement SMP cpuidle.Santosh Shilimkar2012-07-262-46/+67
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | OMAP4 CPUDILE driver is converted mainly based on notes from the coupled cpuidle patch series. The changes include : - Register both CPUs and C-states to cpuidle driver. - Set struct cpuidle_device.coupled_cpus - Set struct cpuidle_device.safe_state to non coupled state. - Set CPUIDLE_FLAG_COUPLED in struct cpuidle_state.flags for each state that affects multiple cpus. - Separate ->enter hooks for coupled & simple idle. - CPU0 wait loop for CPU1 power transition. - CPU1 wakeup mechanism for the idle exit. - Enabling ARCH_NEEDS_CPU_IDLE_COUPLED for OMAP4. Thanks to Kevin Hilman and Colin Cross on the suggestions/fixes on the intermediate version of this patch. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
| * | | ARM: OMAP: timer: allow gp timer clock-event to be used on both cpusSantosh Shilimkar2012-07-261-1/+3
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For coupled cpuidle to work when both cpus are active, it needs a global timer that can handle events for both cpus. This timer is used as the broadcast clock-event when the per-cpu timer hardware stop in low power states. Set the cpumask of clockevent_gpt to all cpus, set the rating correctly, and set the irq to allow the clockevent core to determine the affinity of the timer. Signed-off-by: Colin Cross <ccross@android.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
* | | Merge tag 'fixes-for-linus' of ↵Linus Torvalds2012-08-024-4/+6
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC fixes from Olof Johansson: "A few fixes for merge window fallout, and a bugfix for timer resume on PRIMA2." * tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: ARM: mmp: add missing irqs.h arm: mvebu: fix typo in .dtsi comment for Armada XP SoCs ARM: PRIMA2: delete redundant codes to restore LATCHED when timer resumes ARM: mxc: Include missing irqs.h header
| * | | ARM: mmp: add missing irqs.hHaojian Zhuang2012-08-021-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | arch/arm/mach-mmp/gplugd.c:195:13: error: ‘MMP_NR_IRQS’ undeclared here (not in a function) make[1]: *** [arch/arm/mach-mmp/gplugd.o] Error 1 Include <mach/irqs.h> to fix this issue. Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com> Signed-off-by: Olof Johansson <olof@lixom.net>
| * | | arm: mvebu: fix typo in .dtsi comment for Armada XP SoCsThomas Petazzoni2012-08-021-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The comment was wrongly referring to Armada 370 while the file is related to Armada XP. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Olof Johansson <olof@lixom.net>
| * | | ARM: PRIMA2: delete redundant codes to restore LATCHED when timer resumesBarry Song2012-08-021-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The only way to write LATCHED registers to write LATCH_BIT to LATCH register, that will latch COUNTER into LATCHED.e.g. writel_relaxed(SIRFSOC_TIMER_LATCH_BIT, sirfsoc_timer_base + SIRFSOC_TIMER_LATCH); Writing values to LATCHED registers directly is useless at all. Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Olof Johansson <olof@lixom.net>
| * | | ARM: mxc: Include missing irqs.h headerFabio Estevam2012-07-281-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Include irqs.h in order to fix the following build error: arch/arm/plat-mxc/tzic.c:195:11: error: 'FIQ_START' undeclared (first use in this function) Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Dirk Behme <dirk.behme@de.bosch.com> Signed-off-by: Olof Johansson <olof@lixom.net>
* | | | Merge branch 'dmaengine' of git://git.linaro.org/people/rmk/linux-armLinus Torvalds2012-08-0214-144/+13
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull ARM DMA engine updates from Russell King: "This looks scary at first glance, but what it is is: - a rework of the sa11x0 DMA engine driver merged during the previous cycle, to extract a common set of helper functions for DMA engine implementations. - conversion of amba-pl08x.c to use these helper functions. - addition of OMAP DMA engine driver (using these helper functions), and conversion of some of the OMAP DMA users to use DMA engine. Nothing in the helper functions is ARM specific, so I hope that other implementations can consolidate some of their code by making use of these helpers. This has been sitting in linux-next most of the merge cycle, and has been tested by several OMAP folk. I've tested it on sa11x0 platforms, and given it my best shot on my broken platforms which have the amba-pl08x controller. The last point is the addition to feature-removal-schedule.txt, which will have a merge conflict. Between myself and TI, we're planning to remove the old TI DMA implementation next year." Fix up trivial add/add conflicts in Documentation/feature-removal-schedule.txt and drivers/dma/{Kconfig,Makefile} * 'dmaengine' of git://git.linaro.org/people/rmk/linux-arm: (53 commits) ARM: 7481/1: OMAP2+: omap2plus_defconfig: enable OMAP DMA engine ARM: 7464/1: mmc: omap_hsmmc: ensure probe returns error if DMA channel request fails Add feature removal of old OMAP private DMA implementation mtd: omap2: remove private DMA API implementation mtd: omap2: add DMA engine support spi: omap2-mcspi: remove private DMA API implementation spi: omap2-mcspi: add DMA engine support ARM: omap: remove mmc platform data dma_mask and initialization mmc: omap: remove private DMA API implementation mmc: omap: add DMA engine support mmc: omap_hsmmc: remove private DMA API implementation mmc: omap_hsmmc: add DMA engine support dmaengine: omap: add support for cyclic DMA dmaengine: omap: add support for setting fi dmaengine: omap: add support for returning residue in tx_state method dmaengine: add OMAP DMA engine driver dmaengine: sa11x0-dma: add cyclic DMA support dmaengine: sa11x0-dma: fix DMA residue support dmaengine: PL08x: ensure all descriptors are freed when channel is released dmaengine: PL08x: get rid of write only pool_ctr and free_txd locking ...
| | \ \ \
| | \ \ \
| *-. \ \ \ Merge branches 'dma-omap', 'dma-pl08x' and 'dma-sa11x0' into dmaengineRussell King2012-07-317-137/+11
| |\ \ \ \ \
| | * | | | | dmaengine: PL08x: get rid of unnecessary checks in dma_slave_configRussell King2012-07-015-128/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Get rid of the unnecessary checks in dma_slave_config utilizing the DMA direction. This allows us to move the computation of cctl to the prepare function. Acked-by: Linus Walleij <linus.walleij@linaro.org> Tested-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | | | | ARM: spear: update for PL08x dma engine changesRussell King2012-07-012-9/+7
| | |/ / / / | | | | | | | | | | | | | | | | | | Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | | | ARM: 7481/1: OMAP2+: omap2plus_defconfig: enable OMAP DMA engineJavier Martinez Canillas2012-07-311-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit 13f30fc893e4610f67dd7a8b0b67aec02eac1775 Author: Russell King <rmk+kernel@arm.linux.org.uk> Date: Sat Apr 21 22:41:10 2012 +0100 mmc: omap: remove private DMA API implementation removed the private DMA API implementation from the OMAP mmc host to exclusively use the DMA engine API. Unfortunately OMAP MMC and High Speed MMC host drivers don't support poll mode and only works with DMA. Since omap2plus_defconfig doesn't enable this feature by default, the following error is happens on an IGEPv2 Rev.C (and probably on most OMAP boards with MMC support): [ 2.199981] omap_hsmmc omap_hsmmc.1: unable to obtain RX DMA engine channel 48 [ 2.215087] omap_hsmmc omap_hsmmc.0: unable to obtain RX DMA engine channel 62 Signed-off-by: Javier Martinez Canillas <javier@dowhile0.org> Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | | | ARM: omap: remove mmc platform data dma_mask and initializationRussell King2012-07-316-7/+0
| |/ / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | DMAengine uses the DMA engine device structure when mapping/unmapping memory for DMA, so the MMC devices do not need their DMA masks initialized (this reflects hardware: the MMC device is not the device doing DMA.) Tested-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | | | | Merge branch 'audit' of git://git.linaro.org/people/rmk/linux-armLinus Torvalds2012-08-025-85/+58
|\ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull ARM audit/signal updates from Russell King: "ARM audit/signal handling updates from Al and Will. This improves on the work Viro did last merge window, and sorts out some of the issues found with that work." * 'audit' of git://git.linaro.org/people/rmk/linux-arm: ARM: 7475/1: sys_trace: allow all syscall arguments to be updated via ptrace ARM: 7474/1: get rid of TIF_SYSCALL_RESTARTSYS ARM: 7473/1: deal with handlerless restarts without leaving the kernel ARM: 7472/1: pull all work_pending logics into C function ARM: 7471/1: Revert "7442/1: Revert "remove unused restart trampoline"" ARM: 7470/1: Revert "7443/1: Revert "new way of handling ERESTART_RESTARTBLOCK""
| * | | | | ARM: 7475/1: sys_trace: allow all syscall arguments to be updated via ptraceWill Deacon2012-07-281-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Prior to syscall invocation, __sys_trace only reloads r0-r3 from the kernel stack, preventing the debugger from updating arguments 5-7 when signalled via ptrace. This patch updates the code to reload r0-r6, updating arguments 5 and 6 on the stack (argument 7 is only used by OABI indirect syscalls and can remain in a register). Reported-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | | | ARM: 7474/1: get rid of TIF_SYSCALL_RESTARTSYSAl Viro2012-07-284-20/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | just let do_work_pending() return 1 on normal local restarts and -1 on those that had been caused by ERESTART_RESTARTBLOCK (and 0 is still "all done, sod off to userland now"). And let the asm glue flip scno to restart_syscall(2) one if it got negative from us... [will: resolved conflicts with audit fixes] Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | | | ARM: 7473/1: deal with handlerless restarts without leaving the kernelAl Viro2012-07-282-22/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | | | ARM: 7472/1: pull all work_pending logics into C functionAl Viro2012-07-282-23/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | | | ARM: 7471/1: Revert "7442/1: Revert "remove unused restart trampoline""Will Deacon2012-07-283-17/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 3b0c06226783ffc836217eb34f7eca311b1e63f7. We no longer require the restart trampoline for syscall restarting. Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | | | ARM: 7470/1: Revert "7443/1: Revert "new way of handling ERESTART_RESTARTBLOCK""Will Deacon2012-07-283-29/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 433e2f307beff8adba241646ce9108544e0c5a03. Conflicts: arch/arm/kernel/ptrace.c Reintroduce the new syscall restart handling in preparation for further patches from Al Viro. Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | | | | | Merge branch 'fixes' of git://git.linaro.org/people/rmk/linux-armLinus Torvalds2012-08-0213-194/+139
|\ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull ARM fixes from Russell King: "This fixes various issues found during July" * 'fixes' of git://git.linaro.org/people/rmk/linux-arm: ARM: 7479/1: mm: avoid NULL dereference when flushing gate_vma with VIVT caches ARM: Fix undefined instruction exception handling ARM: 7480/1: only call smp_send_stop() on SMP ARM: 7478/1: errata: extend workaround for erratum #720789 ARM: 7477/1: vfp: Always save VFP state in vfp_pm_suspend on UP ARM: 7476/1: vfp: only clear vfp state for current cpu in vfp_pm_suspend ARM: 7468/1: ftrace: Trace function entry before updating index ARM: 7467/1: mutex: use generic xchg-based implementation for ARMv6+ ARM: 7466/1: disable interrupt before spinning endlessly ARM: 7465/1: Handle >4GB memory sizes in device tree and mem=size@start option
| * | | | | | ARM: 7479/1: mm: avoid NULL dereference when flushing gate_vma with VIVT cachesWill Deacon2012-07-311-2/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The vivt_flush_cache_{range,page} functions check that the mm_struct of the VMA being flushed has been active on the current CPU before performing the cache maintenance. The gate_vma has a NULL mm_struct pointer and, as such, will cause a kernel fault if we try to flush it with the above operations. This happens during ELF core dumps, which include the gate_vma as it may be useful for debugging purposes. This patch adds checks to the VIVT cache flushing functions so that VMAs with a NULL mm_struct are flushed unconditionally (the vectors page may be dirty if we use it to store the current TLS pointer). Cc: <stable@vger.kernel.org> # 3.4+ Reported-by: Gilles Chanteperdrix <gilles.chanteperdrix@xenomai.org> Tested-by: Uros Bizjak <ubizjak@gmail.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | | | | ARM: Fix undefined instruction exception handlingRussell King2012-07-314-62/+92
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | While trying to get a v3.5 kernel booted on the cubox, I noticed that VFP does not work correctly with VFP bounce handling. This is because of the confusion over 16-bit vs 32-bit instructions, and where PC is supposed to point to. The rule is that FP handlers are entered with regs->ARM_pc pointing at the _next_ instruction to be executed. However, if the exception is not handled, regs->ARM_pc points at the faulting instruction. This is easy for ARM mode, because we know that the next instruction and previous instructions are separated by four bytes. This is not true of Thumb2 though. Since all FP instructions are 32-bit in Thumb2, it makes things easy. We just need to select the appropriate adjustment. Do this by moving the adjustment out of do_undefinstr() into the assembly code, as only the assembly code knows whether it's dealing with a 32-bit or 16-bit instruction. Cc: <stable@vger.kernel.org> Acked-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | | | | ARM: 7480/1: only call smp_send_stop() on SMPJavier Martinez Canillas2012-07-311-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On reboot or poweroff (machine_shutdown()) a call to smp_send_stop() is made (to stop the others CPU's) when CONFIG_SMP=y. arch/arm/kernel/process.c: void machine_shutdown(void) { #ifdef CONFIG_SMP smp_send_stop(); #endif } smp_send_stop() calls the function pointer smp_cross_call(), which is set on the smp_init_cpus() function for OMAP processors. arch/arm/mach-omap2/omap-smp.c: void __init smp_init_cpus(void) { ... set_smp_cross_call(gic_raise_softirq); ... } But the ARM setup_arch() function only calls smp_init_cpus() if CONFIG_SMP=y && is_smp(). arm/kernel/setup.c: void __init setup_arch(char **cmdline_p) { ... #ifdef CONFIG_SMP if (is_smp()) smp_init_cpus(); #endif ... } Newer OMAP CPU's are SMP machines so omap2plus_defconfig sets CONFIG_SMP=y. Unfortunately on an OMAP UP machine is_smp() returns false and smp_init_cpus() is never called and the smp_cross_call() function remains NULL. If the machine is rebooted or powered off, smp_send_stop() will be called (since CONFIG_SMP=y) leading to the following error: [ 42.815551] Restarting system. [ 42.819030] Unable to handle kernel NULL pointer dereference at virtual address 00000000 [ 42.827667] pgd = d7a74000 [ 42.830566] [00000000] *pgd=96ce7831, *pte=00000000, *ppte=00000000 [ 42.837249] Internal error: Oops: 80000007 [#1] SMP ARM [ 42.842773] Modules linked in: [ 42.846008] CPU: 0 Not tainted (3.5.0-rc3-next-20120622-00002-g62e87ba-dirty #44) [ 42.854278] PC is at 0x0 [ 42.856994] LR is at smp_send_stop+0x4c/0xe4 [ 42.861511] pc : [<00000000>] lr : [<c00183a4>] psr: 60000013 [ 42.861511] sp : d6c85e70 ip : 00000000 fp : 00000000 [ 42.873626] r10: 00000000 r9 : d6c84000 r8 : 00000002 [ 42.879150] r7 : c07235a0 r6 : c06dd2d0 r5 : 000f4241 r4 : d6c85e74 [ 42.886047] r3 : 00000000 r2 : 00000000 r1 : 00000006 r0 : d6c85e74 [ 42.892944] Flags: nZCv IRQs on FIQs on Mode SVC_32 ISA ARM Segment user [ 42.900482] Control: 10c5387d Table: 97a74019 DAC: 00000015 [ 42.906555] Process reboot (pid: 1166, stack limit = 0xd6c842f8) [ 42.912902] Stack: (0xd6c85e70 to 0xd6c86000) [ 42.917510] 5e60: c07235a0 00000000 00000000 d6c84000 [ 42.926177] 5e80: 01234567 c00143d0 4321fedc c00511bc d6c85ebc 00000168 00000460 00000000 [ 42.934814] 5ea0: c1017950 a0000013 c1017900 d8014390 d7ec3858 c0498e48 c1017950 00000000 [ 42.943481] 5ec0: d6ddde10 d6c85f78 00000003 00000000 d6ddde10 d6c84000 00000000 00000000 [ 42.952117] 5ee0: 00000002 00000000 00000000 c0088c88 00000002 00000000 00000000 c00f4b90 [ 42.960784] 5f00: 00000000 d6c85ebc d8014390 d7e311c8 60000013 00000103 00000002 d6c84000 [ 42.969421] 5f20: c00f3274 d6e00a00 00000001 60000013 d6c84000 00000000 00000000 c00895d4 [ 42.978057] 5f40: 00000002 d8007c80 d781f000 c00f6150 d8010cc0 c00f3274 d781f000 d6c84000 [ 42.986694] 5f60: c0013020 d6e00a00 00000001 20000010 0001257c ef000000 00000000 c00895d4 [ 42.995361] 5f80: 00000002 00000001 00000003 00000000 00000001 00000003 00000000 00000058 [ 43.003997] 5fa0: c00130c8 c0012f00 00000001 00000003 fee1dead 28121969 01234567 00000002 [ 43.012634] 5fc0: 00000001 00000003 00000000 00000058 00012584 0001257c 00000001 00000000 [ 43.021270] 5fe0: 000124bc bec5cc6c 00008f9c 4a2f7c40 20000010 fee1dead 00000000 00000000 [ 43.029968] [<c00183a4>] (smp_send_stop+0x4c/0xe4) from [<c00143d0>] (machine_restart+0xc/0x4c) [ 43.039154] [<c00143d0>] (machine_restart+0xc/0x4c) from [<c00511bc>] (sys_reboot+0x144/0x1f0) [ 43.048278] [<c00511bc>] (sys_reboot+0x144/0x1f0) from [<c0012f00>] (ret_fast_syscall+0x0/0x3c) [ 43.057464] Code: bad PC value [ 43.060760] ---[ end trace c3988d1dd0b8f0fb ]--- Add a check so smp_cross_call() is only called when there is more than one CPU on-line. Cc: <stable@vger.kernel.org> Signed-off-by: Javier Martinez Canillas <javier at dowhile0.org> Acked-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-26 02:13:32 +0100