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* ARM: imx6: convert GPC to stacked domainsMarc Zyngier2015-03-309-33/+123
| | | | | | | | | | | | | | | | | | | | IMX6 has been (ab)using the gic_arch_extn to provide wakeup from suspend, and it makes a lot of sense to convert this code to use stacked domains instead. This patch does just this, updating the DT files to actually reflect what the HW provides. BIG FAT WARNING: because the DTs were so far lying by not exposing the fact that the GPC block is actually the first interrupt controller in the chain, kernels with this patch applied wont have any suspend-resume facility when booted with old DTs, and old kernels with updated DTs won't even boot. Tested-by: Stefan Agner <stefan@agner.ch> Acked-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: dts: imx25-pdk: Add LCD supportFabio Estevam2015-03-301-0/+58
| | | | | | | Add support for the CLAA057VC01CW display. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: dts: imx25-pinfunc: more definesUwe Kleine-König2015-03-301-5/+30
| | | | | | | | | | | | | Add some defines currently missing, fix ordering to make the list sorted by (mux_reg, mux_val), make sure pins are grouped by mux_reg. The same definitions are missing from the old pinmux header (arch/arm/mach-imx/iomux-mx25.h) but as only legacy machine support uses that and therefor the existing list is obviously good enough I didn't spend the effort to add the corresponding definitions there, too. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: imx25: fix some wrong iomux definitionsUwe Kleine-König2015-03-301-6/+6
| | | | | | | | Noticed while looking over the pad definitions. None of the bogus definitions is used in-tree. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: dts: imx6qdl: Add label snvs_rtcMarkus Pargmann2015-03-301-1/+1
| | | | | | | | | It may be useful to disable the internal rtc snvs-rtc because an external rtc is available. This patch adds a label so that board files can disable this rtc. Signed-off-by: Markus Pargmann <mpa@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: dts: imx28-apf28dev: add support for auart0Gwenhael Goavec-Merou2015-03-301-0/+7
| | | | | | Signed-off-by: Gwenhael Goavec-Merou <gwenhael.goavec-merou@armadeus.com> Signed-off-by: Sebastien Szymanski <sebastien.szymanski@armadeus.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: dts: imx28-apf28dev: add support for can0Gwenhael Goavec-Merou2015-03-301-0/+15
| | | | | | Signed-off-by: Gwenhael Goavec-Merou <gwenhael.goavec-merou@armadeus.com> Signed-off-by: Sebastien Szymanski <sebastien.szymanski@armadeus.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: dts: imx28-apf28dev: fix mac1 gpio location and polarityGwenhael Goavec-Merou2015-03-301-1/+1
| | | | | | Signed-off-by: Gwenhael Goavec-Merou <gwenhael.goavec-merou@armadeus.com> Signed-off-by: Sebastien Szymanski <sebastien.szymanski@armadeus.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: dts: imx28-apf28: fix mac0 gpio polarityGwenhael Goavec-Merou2015-03-301-1/+1
| | | | | | Signed-off-by: Gwenhael Goavec-Merou <gwenhael.goavec-merou@armadeus.com> Signed-off-by: Sebastien Szymanski <sebastien.szymanski@armadeus.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: dts: imx28-apf28dev: Add pinctrl for USB OTG ID pinGwenhael Goavec-Merou2015-03-301-1/+2
| | | | | | Signed-off-by: Gwenhael Goavec-Merou <gwenhael.goavec-merou@armadeus.com> Signed-off-by: Sebastien Szymanski <sebastien.szymanski@armadeus.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: dts: imx6qdl: Move existing MIPI DSI ports into a new 'ports' nodeLiu Ying2015-03-302-18/+25
| | | | | | | | | | | | | | The MIPI DSI node contains some ports which represent possible DRM CRTCs it can connect with. Each port has a 'reg' property embedded. This property will be wrongly interpretted by the MIPI DSI bus driver, because the driver will take each subnode which contains a 'reg' property as a DSI peripheral device. This patch moves the existing MIPI DSI ports into a new 'ports' node so that the MIPI DSI bus driver may distinguish its DSI peripheral device(s) from the existing ports. Acked-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Liu Ying <Ying.Liu@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: imx6sx-sdb: add revb board and make it defaultPeter Chen2015-03-302-1/+147
| | | | | | | | | | | | | | Since imx6sx-sdb reva board is experimental and will not be used formally (eg, no software release based on it), we set revb board as the formal imx6sx-sdb board. The imx6sx-sdb uses pfuse200 as pmic which has only one power supply for both VDDARM_IN and VDDSOC_IN, so VDDARM_IN and VDDSOC_IN have to use the same (higher one in the same frequency) one as its power supply, that's the reason we override the OPP setting in board dts file. Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: imx6sx-sdb: change default board as reva boardPeter Chen2015-03-303-131/+144
| | | | | | | | | | The imx6sx sdb board has two revisions, the current mainline one is reva which is experimental and mainly for internal use. In this commit, we rename imx6sx-sdb.dts to imx6sx-sdb.dtsi, and move the reva dedicated contents to imx6sx-sdb-reva.dts. Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: vf-colibri: add SPI support and enable MCP2515 CANBhuvanchandra DV2015-03-302-0/+46
| | | | | | | | | MCP2515 CAN controller is available on Colibri Evaluation board. Hence enable MCP2515 CAN. Acked-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: vf610: add second DSPI instanceBhuvanchandra DV2015-03-302-0/+15
| | | | | | Signed-off-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com> Acked-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* Merge remote-tracking branch 'jcooper/irqchip/vybrid' into imx/dtShawn Guo2015-03-301-0/+1
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| * irqchip: vf610-mscm-ir: Add support for Vybrid MSCM interrupt routerStefan Agner2015-03-081-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds support for Vybrid's interrupt router. On VF6xx models, almost all peripherals can be used by either of the two CPU's, the Cortex-A5 or the Cortex-M4. The interrupt router routes the peripheral interrupts to the configured CPU. This IRQ chip driver configures the interrupt router to route the requested interrupt to the CPU the kernel is running on. The driver makes use of the irqdomain hierarchy support. The parent is given by the device tree. This should be one of the two possible parents either ARM GIC or the ARM NVIC interrupt controller. The latter is currently not yet supported. Note that there is no resource control mechnism implemented to avoid concurrent access of the same peripheral. The user needs to make sure to use device trees which assign the peripherals orthogonally. However, this driver warns the user in case the interrupt is already configured for the other CPU. This provides a poor man's resource controller. Acked-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Stefan Agner <stefan@agner.ch> Link: https://lkml.kernel.org/r/1425249689-32354-2-git-send-email-stefan@agner.ch Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* | Merge branch 'imx/soc' into imx/dtShawn Guo2015-03-303-2/+222
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| * | ARM: imx: depend MXC debug board on 3DS machinesStefan Agner2015-03-131-0/+1
| | | | | | | | | | | | | | | | | | | | | Depend the MXC debug board on machines which actually support it. Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
| * | ARM: imx6: gpc: Add PU power domain for GPU/VPUPhilipp Zabel2015-03-112-0/+214
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When generic pm domain support is enabled, the PGC can be used to completely gate power to the PU power domain containing GPU3D, GPU2D, and VPU cores. This code triggers the PGC powerdown sequence to disable the GPU/VPU isolation cells and gate power and then disables the PU regulator. To reenable, the reverse powerup sequence is triggered after the PU regulator is enabled again. The GPU and VPU devices in the PU power domain temporarily need to be clocked during powerup, so that the reset machinery can work. [Avoid explicit regulator enabling in probe, unless !PM] Signed-off-by: Markus Pargmann <mpa@pengutronix.de> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
| * | ARM: imx6q: clk: Add support for mipi_ipg clock as a shared clock gateLiu Ying2015-03-021-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The CG8 field of the CCM CCGR3 register is the 'mipi_core_cfg' gate clock, according to the i.MX6q/sdl reference manuals. This clock is actually the gate for several clocks, including the ipg clock's output. The MIPI DSI host controller embedded in the i.MX6q/sdl SoCs takes the ipg clock as the pclk - the APB clock signal . In order to gate/ungate the ipg clock, this patch adds a new shared clock gate named as "mipi_ipg". Signed-off-by: Liu Ying <Ying.Liu@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
| * | ARM: imx6q: clk: Add support for mipi_core_cfg clock as a shared clock gateLiu Ying2015-03-021-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The CG8 field of the CCM CCGR3 register is named as 'mipi_core_cfg' clock, according to the i.MX6q/sdl reference manuals. This clock is actually the gate for several clocks, including the hsi_tx_sel clock's output and the video_27m clock's output. The MIPI DSI host controller embedded in the i.MX6q/sdl SoCs uses the video_27m clock to generate PLL reference clock and MIPI core configuration clock. In order to gate/ungate the two MIPI DSI host controller relevant clocks, this patch adds the mipi_core_cfg clock as a shared clock gate. Suggested-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Liu Ying <Ying.Liu@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
| * | ARM: imx6q: clk: Change hsi_tx clock to be a shared clock gateLiu Ying2015-03-021-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The CG8 field of the CCM CCGR3 register is named as 'mipi_core_cfg' clock, according to the i.MX6q/sdl reference manuals. This clock is actually the gate for several clocks, including the hsi_tx_sel clock's output and the video_27m clock's output. So, this patch changes the hsi_tx clock to be a shared clock gate. Suggested-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Liu Ying <Ying.Liu@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
| * | ARM: imx6q: clk: Change hdmi_isfr clock's parent to be video_27m clockLiu Ying2015-03-021-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According to the table 33-1 in the i.MX6Q reference manual, the hdmi_isfr clock's parent should be the video_27m clock. The i.MX6DL reference manual has the same statement. This patch changes the hdmi_isfr clock's parent from the pll3_pfd1_540m clock to the video_27m clock. Suggested-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Liu Ying <Ying.Liu@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
| * | ARM: imx6q: clk: Add the video_27m clockLiu Ying2015-03-021-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | This patch supports the video_27m clock which is a fixed factor clock of the pll3_pfd1_540m clock. Signed-off-by: Liu Ying <Ying.Liu@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
| * | ARM: vf610: use SMP_ON_UP for Vybrid SoCStefan Agner2015-02-261-0/+1
| |/ | | | | | | | | | | | | | | The Vybrid SoC has only one Cortex-A5 core and hence should select the SMP_ON_UP configuration on a SMP kernel. Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* | ARM: imx_v4_v5_defconfig: Remove CONFIG_MACH_MX25_3DSFabio Estevam2015-03-131-1/+0
| | | | | | | | | | | | | | We do not have CONFIG_MACH_MX25_3DS platform anymore, so update the defconfig. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* | ARM: mx25: Remove imxdi_rtc platform codeFabio Estevam2015-03-133-46/+0
| | | | | | | | | | | | | | | | platform-imxdi_rtc.c is only used by mx25, so it can safely go away now that mx25 has been converted to dt. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* | ARM: mx25: Remove "mx25.h" header fileFabio Estevam2015-03-1314-202/+0
| | | | | | | | | | | | | | | | | | | | | | As mx25 has been converted to a dt-only platform, we do not need the "mx25.h" header file anymore. Remove it and also clean up all the mx25 occurences from the platform helper code. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* | ARM: mx25: Remove static memory mappingFabio Estevam2015-03-134-96/+19
| | | | | | | | | | | | | | We use dynamic memory mapping when using dt, so remove all the static mappings. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* | ARM: mx25: Retrieve IIM base from dtFabio Estevam2015-03-131-1/+10
| | | | | | | | | | | | | | We should use dt to retrieve the IIM base address. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* | ARM: mx25: Remove mx25_clocks_init()Fabio Estevam2015-03-132-76/+0
| | | | | | | | | | | | | | | | | | mx25_clocks_init() is only used to register the clocks for non-dt platforms. As mx25 has been converted to a dt-only platform, we can safely remove it. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* | ARM: mx25: Remove platform code support filesFabio Estevam2015-03-114-709/+1
| | | | | | | | | | | | | | | | As mx25 is a dt-only platform, we can get rid of platform code support files, which are unused now. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* | ARM: mx25: Convert to a dt-only platformFabio Estevam2015-03-115-20/+17
| | | | | | | | | | | | | | | | | | As there is no more mx25 board files, we can turn mx25 into a dt-only platform. Rename imx25-dt.c to mach-imx25.c to be consistent with the other i.MX SoCs. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* | ARM: imx25: Remove eukrea mx25 board filesFabio Estevam2015-03-114-518/+0
| | | | | | | | | | | | | | | | | | eukrea mx25 is well supported in device tree, so let's get rid of its board files. Cc: Eric Bénard <eric@eukrea.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* | ARM: mx25: Remove mach-mx25_3ds board fileFabio Estevam2015-03-063-286/+0
| | | | | | | | | | | | | | | | imx25-pdk.dts provides a more complete support than the board file version, so let's get rid of the board file. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* | ARM: imx: Fix trivial typo in commentsYannick Guerrini2015-03-032-2/+2
| | | | | | | | | | | | | | change 'mutliple' to 'multiple' Signed-off-by: Yannick Guerrini <yguerrini@tomshardware.fr> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* | ARM: imx: Kconfig: Fix grammar in help textFabio Estevam2015-03-031-2/+2
| | | | | | | | | | | | | | Use "This enables" in the Kconfig help text to fix grammar. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* | ARM: imx/iomux-v3: allow pad_list to be constUwe Kleine-König2015-03-0310-11/+13
|/ | | | | | | | Also fix all machine files to make use of it and while at it also make the pad lists __initconst. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* Merge branch 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-armLinus Torvalds2015-02-221-1/+1
|\ | | | | | | | | | | | | | | | | | | Pull ARM fix from Russell King: "Just one fix this time around. __iommu_alloc_buffer() can cause a BUG() if dma_alloc_coherent() is called with either __GFP_DMA32 or __GFP_HIGHMEM set. The patch from Alexandre addresses this" * 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm: ARM: 8305/1: DMA: Fix kzalloc flags in __iommu_alloc_buffer()
| * ARM: 8305/1: DMA: Fix kzalloc flags in __iommu_alloc_buffer()Alexandre Courbot2015-02-201-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There doesn't seem to be any valid reason to allocate the pages array with the same flags as the buffer itself. Doing so can eventually lead to the following safeguard in mm/slab.c's cache_grow() to be hit: if (unlikely(flags & GFP_SLAB_BUG_MASK)) { pr_emerg("gfp: %un", flags & GFP_SLAB_BUG_MASK); BUG(); } This happens when buffers are allocated with __GFP_DMA32 or __GFP_HIGHMEM. Fix this by allocating the pages array with GFP_KERNEL to follow what is done elsewhere in this file. Using GFP_KERNEL in __iommu_alloc_buffer() is safe because atomic allocations are handled by __iommu_alloc_atomic(). Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Marek Szyprowski <m.szyprowski@samsung.com> Acked-by: Marek Szyprowski <m.szyprowski@samsung.com> Acked-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | Merge tag 'fixes-for-linus' of ↵Linus Torvalds2015-02-2241-58/+88
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC fixes from Arnd Bergmann: "A few fixes that came in too late to make it into the first set of pull requests but would still be nice to have in -rc1. The majority of these are trivial build fixes for bugs that I found myself using randconfig testing, and a set of two patches from Uwe to mark DT strings as 'const' where appropriate, to resolve inconsistent section attributes" * tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: ARM: make of_device_ids const ARM: make arrays containing machine compatible strings const ARM: mm: Remove Kconfig symbol CACHE_PL310 ARM: rockchip: force built-in regulator support for PM ARM: mvebu: build armada375-smp code conditionally ARM: sti: always enable RESET_CONTROLLER ARM: rockchip: make rockchip_suspend_init conditional ARM: ixp4xx: fix {in,out}s{bwl} data types ARM: prima2: do not select SMP_ON_UP ARM: at91: fix pm declarations ARM: davinci: multi-soc kernels require AUTO_ZRELADDR ARM: davinci: davinci_cfg_reg cannot be init ARM: BCM: put back ARCH_MULTI_V7 dependency for mobile ARM: vexpress: use ARM_CPU_SUSPEND if needed ARM: dts: add I2C device nodes for Broadcom Cygnus ARM: dts: BCM63xx: fix L2 cache properties
| * | ARM: make of_device_ids constUwe Kleine-König2015-02-1915-16/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | of_device_ids (i.e. compatible strings and the respective data) are not supposed to change at runtime. All functions working with of_device_ids provided by <linux/of.h> work with const of_device_ids. So mark the non-const structs in arch/arm as const, too. While at it also add some __initconst annotations. Acked-by: Jason Cooper <jason@lakedameon.net> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * | ARM: make arrays containing machine compatible strings constUwe Kleine-König2015-02-1911-16/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The definition static const char *axxia_dt_match[] __initconst = { ... defines a changable array of constant strings. That is you must not do: *axxia_dt_match[0] = 'k'; but axxia_dt_match[0] = "different string"; is fine. So the annotation __initconst is wrong and yields a compiler error when other really const variables are added with __initconst. As the struct machine_desc member dt_compat is declared as const char *const *dt_compat; making the arrays const is the better alternative over changing all annotations to __initdata. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * | ARM: mm: Remove Kconfig symbol CACHE_PL310Paul Bolle2015-02-182-8/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 20e783e39e55 ("ARM: 8296/1: cache-l2x0: clean up aurora cache handling") removed the only user of the Kconfig symbol CACHE_PL310. Setting CACHE_PL310 is now pointless. Remove its Kconfig entry, and one select of this symbol. Signed-off-by: Paul Bolle <pebolle@tiscali.nl> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * | Merge tag 'arm-soc/for-3.20/dts' of http://github.com/broadcom/stblinux into ↵Arnd Bergmann2015-02-182-2/+23
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | fixes This pull request contains the following Broadcom SoCs Device Tree changes: - Ray adds support for the Cygnus i2c Device Tree controller on Cygnus SoCs - Fixes to the BCM63138 dtsi file for the L2 cache controller properties * tag 'arm-soc/for-3.20/dts' of http://github.com/broadcom/stblinux: ARM: dts: add I2C device nodes for Broadcom Cygnus ARM: dts: BCM63xx: fix L2 cache properties
| | * | ARM: dts: add I2C device nodes for Broadcom CygnusRay Jui2015-02-161-0/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add I2C device nodes and its properties in bcm-cygnus.dtsi but keep them disabled there. Individual I2C devices can be enabled in board specific dts file when I2C slave devices are enabled in the future Signed-off-by: Ray Jui <rjui@broadcom.com> Reviewed-by: Scott Branden <sbranden@broadcom.com> Reviewed-by: Kevin Cernekee <cernekee@chromium.org> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
| | * | ARM: dts: BCM63xx: fix L2 cache propertiesFlorian Fainelli2015-02-161-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The L2 cache properties were completely off with respect to what the hardware is configured for. Fix the cache-size, cache-line-size and cache-sets to reflect the L2 cache controller we have: 512KB, 16 ways and 32 bytes per cache-line. Fixes: 46d4bca0445a0 ("ARM: BCM63XX: add BCM63138 minimal Device Tree") Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
| * | | ARM: rockchip: force built-in regulator support for PMArnd Bergmann2015-02-181-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The rockchips suspend/resume code requires regulators to work, and gives a compile-time error if they are not available: arch/arm/mach-rockchip/built-in.o: In function `rk3288_suspend_finish': :(.text+0x146): undefined reference to `regulator_suspend_finish' arch/arm/mach-rockchip/built-in.o: In function `rk3288_suspend_prepare': :(.text+0x18e): undefined reference to `regulator_suspend_prepare' To solve this, we now enable regulators whenever they are needed, which is what we do on a lot of other platforms as well. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * | | ARM: mvebu: build armada375-smp code conditionallyArnd Bergmann2015-02-181-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | mvebu_armada375_smp_wa_init is only used on armada 375 but is defined for all mvebu machines. As it calls a function that is only provided sometimes, this can result in a link error: arch/arm/mach-mvebu/built-in.o: In function `mvebu_armada375_smp_wa_init': :(.text+0x228): undefined reference to `mvebu_setup_boot_addr_wa' To solve this, we can just change the existing #ifdef around the function to also check for Armada375 SMP platforms. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Fixes: 305969fb6292 ("ARM: mvebu: use the common function for Armada 375 SMP workaround") Cc: Andrew Lunn <andrew@lunn.ch> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Gregory Clement <gregory.clement@free-electrons.com>
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