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* arch: remove blackfin portArnd Bergmann2018-03-161-102/+0
| | | | | | | | | | | | | | | | | | | The Analog Devices Blackfin port was added in 2007 and was rather active for a while, but all work on it has come to a standstill over time, as Analog have changed their product line-up. Aaron Wu confirmed that the architecture port is no longer relevant, and multiple people suggested removing blackfin independently because of some of its oddities like a non-working SMP port, and the amount of duplication between the chip variants, which cause extra work when doing cross-architecture changes. Link: https://docs.blackfin.uclinux.org/ Acked-by: Aaron Wu <Aaron.Wu@analog.com> Acked-by: Bryan Wu <cooloney@gmail.com> Cc: Steven Miao <realmz6@gmail.com> Cc: Mike Frysinger <vapier@chromium.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* Blackfin: move MPU anomaly check to common locationMike Frysinger2010-08-061-4/+0
| | | | | | Keep all anomaly/arch checks in one place to keep logic simple. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: initial XIP supportBarry Song2010-03-091-0/+9
| | | | | Signed-off-by: Barry Song <barry.song@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: MPU: add missing __init markingsMike Frysinger2009-12-151-1/+1
| | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: fix cache Kconfig typoAndré Goddard Rosa2009-11-251-1/+1
| | | | | | | The Kconfig option is "BFIN_EXTMEM_WRITETHROUGH", not "..._WRITETROUGH". Signed-off-by: André Goddard Rosa <andre.goddard@gmail.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: mass clean up of copyright/licensing infoRobin Getz2009-10-071-17/+3
| | | | | | | | | | | | | | | | | | Bill Gatliff & David Brownell pointed out we were missing some copyrights, and licensing terms in some of the files in ./arch/blackfin, so this fixes things, and cleans them up. It also removes: - verbose GPL text(refer to the top level ./COPYING file) - file names (you are looking at the file) - bug url (it's in the ./MAINTAINERS file) - "or later" on GPL-2, when we did not have that right It also allows some Blackfin-specific assembly files to be under a BSD like license (for people to use them outside of Linux). Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: decouple unrelated cache settings to get exact behaviorJie Zhang2009-06-231-5/+5
| | | | | | | | | | | | | | | The current cache options don't really represent the hardware features. They end up setting different aspects of the hardware so that the end result is to turn on/off the cache. Unfortunately, when we hit cache problems with the hardware, it's difficult to test different settings to root cause the problem. The current settings also don't cleanly allow for different caching behaviors with different regions of memory. So split the configure options such that they properly reflect the settings that are applied to the hardware. Signed-off-by: Jie Zhang <jie.zhang@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: make sure MPU CPLB for first 1k is marked as validRobin Getz2009-06-121-1/+1
| | | | | | | This way we properly catch and kill applications that jump to a NULL ptr. Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin arch: fix bug - traps test case 19 for exception 0x2d failsBernd Schmidt2009-02-041-3/+1
| | | | | | | | | | | Enable null pointer checking for ICPLBs. The code was there but for some reason I had commented it out at some stage during development. Should restrict this to 1K since atomic ops start there. Signed-off-by: Bernd Schmidt <bernds_cb1@t-online.de> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: Faster C implementation of no-MPU CPLB handlerBernd Schmidt2009-01-071-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a mixture ofcMichael McTernan's patch and the existing cplb-mpu code. We ditch the old cplb-nompu implementation, which is a good example of why a good algorithm in a HLL is preferrable to a bad algorithm written in assembly. Rather than try to construct a table of all posible CPLBs and search it, we just create a (smaller) table of memory regions and their attributes. Some of the data structures are now unified for both the mpu and nompu cases. A lot of needless complexity in cplbinit.c is removed. Further optimizations: * compile cplbmgr.c with a lot of -ffixed-reg options, and omit saving these registers on the stack when entering a CPLB exception. * lose cli/nop/nop/sti sequences for some workarounds - these don't * make sense in an exception context Additional code unification should be possible after this. [Mike Frysinger <vapier.adi@gmail.com>: - convert CPP if statements to C if statements - remove redundant statements - use a do...while loop rather than a for loop to get slightly better optimization and to avoid gcc "may be used uninitialized" warnings ... we know that the [id]cplb_nr_bounds variables will never be 0, so this is OK - the no-mpu code was the last user of MAX_MEM_SIZE and with that rewritten, we can punt it - add some BUG_ON() checks to make sure we dont overflow the small cplb_bounds array - add i/d cplb entries for the bootrom because there is functions/data in there we want to access - we do not need a NULL trailing entry as any time we access the bounds arrays, we use the nr_bounds variable ] Signed-off-by: Michael McTernan <mmcternan@airvana.com> Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bernd Schmidt <bernds_cb1@t-online.de> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: smp patch cleanup from LKML reviewGraf Yang2009-01-071-0/+1
| | | | | | | | | 1. Use inline get_l1_... functions instead of macro 2. Fix compile issue about smp barrier functions Signed-off-by: Graf Yang <graf.yang@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: SMP supporting patchset: Blackfin CPLB related codeGraf Yang2008-11-181-21/+22
| | | | | | | | | | | Blackfin dual core BF561 processor can support SMP like features. https://docs.blackfin.uclinux.org/doku.php?id=linux-kernel:smp-like In this patch, we provide SMP extend to Blackfin CPLB related code Signed-off-by: Graf Yang <graf.yang@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: Make L2 SRAM cacheableSonic Zhang2008-10-091-0/+10
| | | | | | Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: Modify some funtion names to more genernal onesGraf Yang2008-10-081-1/+1
| | | | | | Signed-off-by: Graf Yang <graf.yang@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* [Blackfin] arch: add boot messages to quickly distinguish between MPU/NOMPU ↵Mike Frysinger2008-04-231-0/+2
| | | | | | | | settings Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* [Blackfin] arch: fix up - CONFIG_BLKFIN_WT was renamed CONFIG_BFIN_WT while ↵Bernd Schmidt2008-04-231-1/+1
| | | | | | | | the MPU code was out-of-tree. Signed-off-by: Bernd Schmidt <bernds_cb1@t-online.de> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* [Blackfin] arch: error out if ANOMALY_05000263 applies while enabling the MPUMike Frysinger2008-02-021-0/+4
| | | | | | Signed-off-by: Mike Frysinger <michael.frysinger@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
* [Blackfin] arch: Initial checkin of the memory protection support.Bernd Schmidt2008-01-271-0/+91
Enable it with CONFIG_MPU. Signed-off-by: Bernd Schmidt <bernd.schmidt@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
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