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* [Blackfin] arch: Merge BF561 support into ints-priorityMichael Hennerich2008-02-081-976/+0
| | | | | | | | | Merge single core ints-priority-sc.c and dual core ints-priority-dc.c into one common code ints-priority.c Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
* [Blackfin] arch: Enable both edge triggered GPIO IRQs on BF54x and use ↵Michael Hennerich2007-12-241-21/+46
| | | | | | | | irq_to_gpio() Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
* [Blackfin] arch: append IRQ Number to label stringMichael Hennerich2007-12-241-4/+13
| | | | | | Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
* Blackfin arch: remove useless CONFIG_IRQCHIP_DEMUX_GPIOMike Frysinger2007-11-151-16/+12
| | | | | | | | since we have this always turned on now and dont want it off (and hasnt been an option in a while) Signed-off-by: Mike Frysinger <michael.frysinger@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
* Blackfin arch: Optimization - no need to make additional math hereMichael Hennerich2007-10-211-3/+3
| | | | | | Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
* Blackfin arch: force irq_flags into the .data sectionMike Frysinger2007-10-211-1/+7
| | | | | | | | | | | | force irq_flags into the .data section by initializing it to the hardware masks that cannot be disabled. this way if we use irq enable/disable functions before the .bss has been zeroed out (as does our l1 relocate/dma functions), we dont hit a problem where bss contains bogus crap. Signed-off-by: Mike Frysinger <michael.frysinger@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
* Blackfin arch: add new processor ADSP-BF52x arch/mach supportMichael Hennerich2007-10-211-10/+31
| | | | | | Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
* Blackfin arch: allow people to select the feature that is unavailable to the ↵Mike Frysinger2007-08-051-1/+5
| | | | | | | | | | | | | kernel - allow people to select the feature that is unavailable to the kernel: NMI, JTAG, or CYCLES. - change default NMI handler to simply dump hardware trace buffer. - remove default NMI handler completely as calling into kernel code is not safe move example handler to wiki so people dont haphazardly copy and paste this stuff thinking its safe Signed-off-by: Mike Frysinger <michael.frysinger@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
* Blackfin arch: remove unused code -- EVT0 is not controllable by softwareMike Frysinger2007-08-031-3/+0
| | | | | | Signed-off-by: Mike Frysinger <michael.frysinger@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
* Blackfin arch: Add label to call new GPIO APIMichael Hennerich2007-07-241-4/+4
| | | | | | Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
* Blackfin arch: add error message when IRQ no availableMichael Hennerich2007-07-241-1/+5
| | | | | | Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
* Blackfin arch: Initialize the exception vectors early in the boot processBernd Schmidt2007-07-251-19/+23
| | | | | | | | | Initialize the exception vectors early in the boot process, so that CPLB faults can be handled when memory protection is enabled. Signed-off-by: Bernd Schmidt <bernd.schmidt@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
* Blackfin arch: clean up some coding style issuesBryan Wu2007-07-121-7/+6
| | | | | Signed-off-by: Bryan Wu <bryan.wu@analog.com>
* Blackfin arch: Some memory and code optimizations - Fix SYS_IRQSMichael Hennerich2007-07-121-16/+27
| | | | | | Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
* Blackfin arch: Enable BF54x PIN/GPIO interruptsMichael Hennerich2007-07-121-30/+309
| | | | | | Signed-off-bu: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
* Blackfin arch: cleanup warnings from checkpatch -- no functional changesMike Frysinger2007-07-121-5/+5
| | | | | | Signed-off-by: Mike Frysinger <michael.frysinger@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
* Blackfin arch: add missing implementations SIC_IWR crosses several registersMichael Hennerich2007-06-211-0/+4
| | | | | | | | | | SIC_IWR crosses several registers - add missing implementations - make sure SIC_IWR is SET after boot Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
* Blackfin arch: initial supporting for BF548-EZKITRoy Huang2007-07-121-5/+45
| | | | | | | | | | | | | | | | | The ADSP-BF54x was specifically designed to meet the needs of convergent multimedia applications where system performance and cost are essential ingredients. The integration of multimedia, human interface, and connectivity peripherals combined with increased system bandwidth and on-chip memory provides customers a platform to design the most demanding applications. Since now, ADSP-BF54x will be supported in the Linux kernel and bunch of related drivers such as USB OTG, ATAPI, NAND flash controller, LCD framebuffer, sound, touch screen will be submitted later. Please enjoy the show. Signed-off-by: Roy Huang <roy.huang@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
* Blackfin arch: spelling fixesSimon Arlott2007-06-111-1/+1
| | | | | | Signed-off-by: Simon Arlott <simon@fire.lp0.eu> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
* blackfin architectureBryan Wu2007-05-071-0/+577
This adds support for the Analog Devices Blackfin processor architecture, and currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561 (Dual Core) devices, with a variety of development platforms including those avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP, BF561-EZKIT), and Bluetechnix! Tinyboards. The Blackfin architecture was jointly developed by Intel and Analog Devices Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in December of 2000. Since then ADI has put this core into its Blackfin processor family of devices. The Blackfin core has the advantages of a clean, orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC (Multiply/Accumulate), state-of-the-art signal processing engine and single-instruction, multiple-data (SIMD) multimedia capabilities into a single instruction-set architecture. The Blackfin architecture, including the instruction set, is described by the ADSP-BF53x/BF56x Blackfin Processor Programming Reference http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf The Blackfin processor is already supported by major releases of gcc, and there are binary and source rpms/tarballs for many architectures at: http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete documentation, including "getting started" guides available at: http://docs.blackfin.uclinux.org/ which provides links to the sources and patches you will need in order to set up a cross-compiling environment for bfin-linux-uclibc This patch, as well as the other patches (toolchain, distribution, uClibc) are actively supported by Analog Devices Inc, at: http://blackfin.uclinux.org/ We have tested this on LTP, and our test plan (including pass/fails) can be found at: http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel [m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files] Signed-off-by: Bryan Wu <bryan.wu@analog.com> Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl> Signed-off-by: Aubrey Li <aubrey.li@analog.com> Signed-off-by: Jie Zhang <jie.zhang@analog.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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