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* Blackfin: bf54x: add missing SIC_RVECT definitionMike Frysinger2010-10-222-0/+3
| | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: H8606: move 8250 irqflags to platform resourcesMike Frysinger2010-10-222-1/+2
| | | | | | | Now that the common 8250 serial driver supports an "irqflags" field, we don't need to patch in a custom define into the code. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: glue XIP/ROM kernel kconfigsMike Frysinger2010-10-221-0/+6
| | | | | | | Different arches use different names, so make sure we define both so common code (like MTD_XIP) "just works". Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: update sparse flags for latest upstream changesMike Frysinger2010-10-221-2/+1
| | | | | | | Mainline version of git merged support for Blackfin parts, but we now need to propagate the gcc arch define to make it work. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: coreb: update ioctl numbersMike Frysinger2010-10-221-3/+3
| | | | | | | | | We have to use ioctl numbers that don't collide with common code. Otherwise, these ones never even get called because the common fs code swalled all invocations. Reported-by: Kay Duenzer <kduenzer@maku.eu> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: coreb: add gpl module licenseMike Frysinger2010-10-221-0/+1
| | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: bf518-ezkit: add ssm2603 codec resourcesBob Liu2010-10-221-0/+17
| | | | | | | | This board has a SSM2603 codec, so make sure we have the right resources declared for it. Signed-off-by: Bob Liu <lliubbo@gmail.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: bf51x/bf52x: fix 16/32bit SPORT MMR helpersBob Liu2010-10-222-32/+32
| | | | | | | | | | The RX/TX address is always the same regardless of the size of the access. That means there is no dedicated "16bit" or "32bit" MMR. Trying to use these currently leads to compile errors. So change everything to use the right MMR define. Signed-off-by: Bob Liu <lliubbo@gmail.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: tll6527m: new board portAshish Gupta2010-10-224-0/+1172
| | | | | Signed-off-by: Ashish Gupta <asg@thelearninglabs.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: bf526-ezbrd/bf527-ezkit: add NAND partition for u-bootMike Frysinger2010-10-222-2/+10
| | | | | | | Since these boards can boot out of NAND, make sure we give u-boot its own partition by default to avoid clobbering it. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: merge kernel init memory back into main memory regionSonic Zhang2010-10-221-0/+3
| | | | | | | | | | | | | | | | | | If the kernel's init section is merged back into the main memory region during boot (which it should since that is how we've laid out the kernel linker map), we want to make sure that these aren't counted as independent regions. Otherwise, if a large mapping is attempted which starts in the init region and extends into the main memory region, the access_ok func will deny it. This leads to weird messages during runtime like "unable to map xxx library" from the ldso but upon running the application again, everything works fine. So if the address of the end of the init region is the same as the start of the main memory region, simply enlarge the memory region to include the init region. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: gpio: add peripheral group checksteven miao2010-10-221-67/+118
| | | | | | | | | | | | | | | | | | | | Many Blackfin parts group sets of pins into a single functional unit. This means you cannot use different pins within a group for different peripherals. Our resource conflict checking thus far has been limited to individual pins, so if someone tried to grab a different pin from the same group, it would be allowed while silently changing the other pins in the same group. One common example is the pin set PG12 - PG15 on BF51x parts. They may either be used with SPI0 (1st function), or they may be used with PTP/PWM/AMS3 (3rd function). Ideally, we'd like to use PG12 - PG14 for SPI0 while using PG15 with AMS3, but the hardware does not permit this. In the past, the software would allow the pins to be requested this way, but ultimately things like the Blackfin SPI driver would stop working when the hardware rerouted to a different peripheral. Signed-off-by: steven miao <realmz6@gmail.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: dma: bf54x: add missing break for SPORT1 TX IRQMike Frysinger2010-10-221-0/+1
| | | | | Reported-by: D Binderman <dcb314@hotmail.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: add new cacheflush syscallSonic Zhang2010-10-227-3/+44
| | | | | | | | | | | | Flushing caches sometimes requires anomaly workarounds which require supervisor-only insns. Normally we don't need to flush caches from userspace so this isn't a problem, but when gcc generates trampolines on the stack, we do. So add a new syscall for gcc to use modeled after the mips version. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: bf548-ezkit: increase u-boot partition sizeMike Frysinger2010-10-221-3/+7
| | | | | | | | The BF54x processor has a ton of on-chip peripherals and in order to support them all, the u-boot image is quite large. So give it 512KiB in all bootable flashes to make our lives easier. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: boards: add example i2c resources for ad525x devicessteven miao2010-10-224-0/+20
| | | | | Signed-off-by: steven miao <realmz6@gmail.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: SIC: fix off-by-one error in loopMichael Hennerich2010-10-221-3/+4
| | | | | | | Make sure we include EMAC_SYSTAT when showing errors. Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: bf537-stamp: tweak i2c address for ad5280 add-on tftlcd boardSonic Zhang2010-10-221-1/+1
| | | | | | | | | The predefined i2c address 0x2c doesn't match the configuration of the ad5280 PINs AD0 and AD1 on the tftlcd add-on board. Both AD0 and AD1 are of voltage 3.3V, which means the i2c address should be 0x2F. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: bf51x: enable support for 0.2 siliconMike Frysinger2010-10-221-1/+1
| | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: initial preempt support while returning from interruptBarry Song2010-10-222-3/+126
| | | | | Signed-off-by: Barry Song <barry.song@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: workaround anomaly 05000481 (corruption with ITEST MMRs)Robin Getz2010-10-221-3/+6
| | | | | | | | | | Nothing actually needs to use these MMRs (as direct cache manipulation is done with the DTEST MMRs), so simply hide the read funcs behind the anomaly define. They're generally unusable anyways when this anomaly is in effect. Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: i2c-gpio boards: use GPIO_PF# definesMike Frysinger2010-10-224-8/+8
| | | | | | Rather than use raw numbers for the GPIO pins, use proper GPIO defines. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: access_ok: permit L1 stackBarry Song2010-10-221-0/+5
| | | | | | | | | When apps run with their stack in L1, some system calls might be made where a buffer is in the stack as an argument. So make sure the core Blackfin access code does not reject this memory location. Signed-off-by: Barry Song <barry.song@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: bf561-ezkit: add AD1836 codec resourcesBarry Song2010-10-221-0/+50
| | | | | | | | This board has an AD1836 codec, so make sure we have the right resources declared for it. Signed-off-by: Barry Song <barry.song@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: ptrace: enable access to L1 stacksBarry Song2010-10-221-0/+8
| | | | | | | | If an app is placing its stack in L1 scratchpad SRAM, make sure ptrace is granted access to it so that gdb can do its thing. Signed-off-by: Barry Song <barry.song@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: boards: fix num_chipselect values for on-chip SPI busesMike Frysinger2010-10-225-9/+9
| | | | | | | | | The num_chipselect field for on-chip Blackfin SPI buses is supposed to be 1 larger than the number of actual CSs available. This is because the hardware starts counting at 1 and not 0. There is a field for "CS0", but it is marked as "reserved" everywhere. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: ad7160eval: new board portMichael Hennerich2010-10-225-1/+984
| | | | | Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: bf537-stamp: re-use regulator framework with ad5398 partsSonic Zhang2010-10-221-10/+1
| | | | | | | | We don't need our own header and structure to hook up the ad5398 part, so drop the custom resources for it. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: bf537-stamp: re-use the fixed regulator voltage driverSonic Zhang2010-10-221-55/+25
| | | | | | | | Rather than write our own ADP switch driver, use the existing fixed regulator driver and rewrite the platform resources accordingly. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: SIC: BF537: change default data/error relative prioritiesMichael Hennerich2010-10-221-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | Some peripherals might generate an error interrupt shortly after the data interrupt due to the fact that the peripheral isn't serviced fast enough. In most cases this isn't a problem and is expected behavior. This hasn't been a problem on most parts since you simply don't request the error interrupt (or you leave it disabled while there is an expected state) and do the peripheral status checking in the data interrupt. The Blackfin SIC allows people to prioritize data and error interrupts, and the Blackfin CEC allows interrupts of equal or higher priority to nest. The current default settings gives error interrupts a higher priority than data interrupts. So if an error occurs while processing the data interrupt, it will be serviced immediately. However, the error interrupt on the BF537 SIC cannot be enabled on a per-peripheral basis. Once the error interrupt is enabled for one peripheral, it is automatically enabled for all peripherals. Therefore lower the default multiplexed error interrupt priority so most people need not worry themselves with this issue. Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: bf537-stamp: add example IIO resourcesMichael Hennerich2010-10-221-12/+442
| | | | | | | Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Barry Song <barry.song@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: bf537-stamp: use correct spi mode with ad2s90 partsBarry Song2010-10-221-0/+1
| | | | | Signed-off-by: Barry Song <barry.song@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: bf537-stamp: add example adau1373 i2c resourcesCliff Cai2010-10-221-0/+5
| | | | | Signed-off-by: Cliff Cai <cliff.cai@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: bf537-stamp: add example adav801/3 resourcesYi Li2010-10-221-0/+25
| | | | | Signed-off-by: Yi Li <yi.li@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: bf537-stamp: add example ad1937 i2c resourcesBarry Song2010-10-221-0/+6
| | | | | Signed-off-by: Barry Song <barry.song@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: bf537-stamp: fix NAND resourcesMike Frysinger2010-10-221-1/+1
| | | | | | | The NAND platform driver expects the registers to have a "mem" resource type rather than "io". Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: boards: use proper irq flags with isp1362-hcdMichael Hennerich2010-10-228-8/+8
| | | | | | | | | | | | With the recent kernel update the isp1362-hcd driver evaluates the IORESOURCE_IRQ resource flags and requests the irq with the given polarity/edge settings. However the ISP1362 config requires low level/edge interrupts. Most of the Blackfin boards use some random flag or no flag at all. Make all boards use a know good flag IORESOURCE_IRQ_LOWEDGE. Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: bf561-acvilon: fix NAND resourcesValentin Yakovenkov2010-10-221-1/+1
| | | | | | | | The NAND platform driver expects the registers to have a "mem" resource type rather than "io". Signed-off-by: Valentin Yakovenkov <yakovenkov@gmail.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: cm-bf548: add support for Socket CANMichael Hennerich2010-10-221-0/+43
| | | | | | | Add platform resources for the on-chip CAN peripheral so we can use it. Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: boards: update AD183x resourcesBarry Song2010-10-2214-63/+65
| | | | | | | Make sure we use the right Kconfig names and platform strings. Signed-off-by: Barry Song <barry.song@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: bf537-stamp: update GPIO CS devicesBarry Song2010-10-221-5/+3
| | | | | | | | Now that we've rewritten the GPIO CS handling in the Blackfin SPI peripheral, we need to update the platform resources accordingly. Signed-off-by: Barry Song <barry.song@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: punt short SPI MMR bit namesMike Frysinger2010-10-227-383/+0
| | | | | | | Now that the common header defines everything and the SPI drivers are using it, we can drop these duplicated global namespace polluters. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Merge git://git.kernel.org/pub/scm/linux/kernel/git/dhowells/linux-2.6-irqflagsLinus Torvalds2010-10-2130-630/+738
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | * git://git.kernel.org/pub/scm/linux/kernel/git/dhowells/linux-2.6-irqflags: Fix IRQ flag handling naming MIPS: Add missing #inclusions of <linux/irq.h> smc91x: Add missing #inclusion of <linux/irq.h> Drop a couple of unnecessary asm/system.h inclusions SH: Add missing consts to sys_execve() declaration Blackfin: Rename IRQ flags handling functions Blackfin: Add missing dep to asm/irqflags.h Blackfin: Rename DES PC2() symbol to avoid collision Blackfin: Split the BF532 BFIN_*_FIO_FLAG() functions to their own header Blackfin: Split PLL code from mach-specific cdef headers
| * Fix IRQ flag handling namingDavid Howells2010-10-072-12/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix the IRQ flag handling naming. In linux/irqflags.h under one configuration, it maps: local_irq_enable() -> raw_local_irq_enable() local_irq_disable() -> raw_local_irq_disable() local_irq_save() -> raw_local_irq_save() ... and under the other configuration, it maps: raw_local_irq_enable() -> local_irq_enable() raw_local_irq_disable() -> local_irq_disable() raw_local_irq_save() -> local_irq_save() ... This is quite confusing. There should be one set of names expected of the arch, and this should be wrapped to give another set of names that are expected by users of this facility. Change this to have the arch provide: flags = arch_local_save_flags() flags = arch_local_irq_save() arch_local_irq_restore(flags) arch_local_irq_disable() arch_local_irq_enable() arch_irqs_disabled_flags(flags) arch_irqs_disabled() arch_safe_halt() Then linux/irqflags.h wraps these to provide: raw_local_save_flags(flags) raw_local_irq_save(flags) raw_local_irq_restore(flags) raw_local_irq_disable() raw_local_irq_enable() raw_irqs_disabled_flags(flags) raw_irqs_disabled() raw_safe_halt() with type checking on the flags 'arguments', and then wraps those to provide: local_save_flags(flags) local_irq_save(flags) local_irq_restore(flags) local_irq_disable() local_irq_enable() irqs_disabled_flags(flags) irqs_disabled() safe_halt() with tracing included if enabled. The arch functions can now all be inline functions rather than some of them having to be macros. Signed-off-by: David Howells <dhowells@redhat.com> [X86, FRV, MN10300] Signed-off-by: Chris Metcalf <cmetcalf@tilera.com> [Tile] Signed-off-by: Michal Simek <monstr@monstr.eu> [Microblaze] Tested-by: Catalin Marinas <catalin.marinas@arm.com> [ARM] Acked-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com> [AVR] Acked-by: Tony Luck <tony.luck@intel.com> [IA-64] Acked-by: Hirokazu Takata <takata@linux-m32r.org> [M32R] Acked-by: Greg Ungerer <gerg@uclinux.org> [M68K/M68KNOMMU] Acked-by: Ralf Baechle <ralf@linux-mips.org> [MIPS] Acked-by: Kyle McMartin <kyle@mcmartin.ca> [PA-RISC] Acked-by: Paul Mackerras <paulus@samba.org> [PowerPC] Acked-by: Martin Schwidefsky <schwidefsky@de.ibm.com> [S390] Acked-by: Chen Liqin <liqin.chen@sunplusct.com> [Score] Acked-by: Matt Fleming <matt@console-pimps.org> [SH] Acked-by: David S. Miller <davem@davemloft.net> [Sparc] Acked-by: Chris Zankel <chris@zankel.net> [Xtensa] Reviewed-by: Richard Henderson <rth@twiddle.net> [Alpha] Reviewed-by: Yoshinori Sato <ysato@users.sourceforge.jp> [H8300] Cc: starvik@axis.com [CRIS] Cc: jesper.nilsson@axis.com [CRIS] Cc: linux-cris-kernel@axis.com
| * Blackfin: Rename IRQ flags handling functionsDavid Howells2010-10-0719-274/+284
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rename h/w IRQ flags handling functions to be in line with what is expected for the irq renaming patch. This renames local_*_hw() to hard_local_*() using the following perl command: perl -pi -e 's/local_irq_(restore|enable|disable)_hw/hard_local_irq_\1/ or s/local_irq_save_hw([_a-z]*)[(]flags[)]/flags = hard_local_irq_save\1()/' `find arch/blackfin/ -name "*.[ch]"` and then fixing up asm/irqflags.h manually. Additionally, arch/hard_local_save_flags() and arch/hard_local_irq_save() both return the flags rather than passing it through the argument list. Signed-off-by: David Howells <dhowells@redhat.com>
| * Blackfin: Add missing dep to asm/irqflags.hDavid Howells2010-10-071-1/+8
| | | | | | | | | | | | | | Add a missing dependency (mach/blackfin.h) to asm/irqflags.h so that bfin_read_IMASK() can be used by inline functions. Signed-off-by: David Howells <dhowells@redhat.com>
| * Blackfin: Split the BF532 BFIN_*_FIO_FLAG() functions to their own headerDavid Howells2010-10-075-47/+58
| | | | | | | | | | | | | | | | | | | | | | | | | | Split the BF532 machine type BFIN_*_FIO_FLAG() functions to their own header file to avoid circular #include problems as these functions require IRQ flag handling, which requires asm/blackfin.h, which otherwise requires the header file that defines these functions. For good measure, also get rid of the inclusion of asm/blackfin.h from mach/cdefBF532.h (which is circular) and defBF532.h (which is included by asm/blackfin.h before including this header). Signed-off-by: David Howells <dhowells@redhat.com>
| * Blackfin: Split PLL code from mach-specific cdef headersDavid Howells2010-10-0714-344/+435
| | | | | | | | | | | | | | Split the PLL control code from the Blackfin machine-specific cdef headers so that the irqflags functions can be renamed without incurring a header loop. Signed-off-by: David Howells <dhowells@redhat.com>
* | spi/bfin_spi: combine duplicate SPI_CTL read/write logicMike Frysinger2010-10-181-68/+0
| | | | | | | | | | | | | | While combining things, also switch to the proper SPI bit define names. This lets us punt the rarely used SPI defines. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* | spi/bfin_spi: redo GPIO CS handlingBarry Song2010-10-181-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The common SPI layers take care of detecting CS conflicts and preventing two devices from claiming the same CS. This causes problems for the GPIO CS support we currently have as we are using CS0 to mean "GPIO CS". But if we have multiple devices using a GPIO CS, the common SPI layers see multiple devices using the virtual "CS0" and reject any such attempts. To make both work, we introduce an offset define. This represents the max number of hardware CS values that the SPI peripheral supports. If the CS is below this limit, we know we can use the hardware CS. If it's above, we treat it as a GPIO CS. This keeps the CS unique as seen by the common code and prevents conflicts. Signed-off-by: Barry Song <barry.song@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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