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* m68knommu: fix inconsistent formating in ColdFire 5307 definitionsGreg Ungerer2012-09-271-6/+6
| | | | | | Fix tab broken address defines to be consistent with others in this file. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: fix inconsistent formating in ColdFire 527x definitionsGreg Ungerer2012-09-271-17/+17
| | | | | | Fix tab broken address defines to be consistent with others in this file. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: fix inconsistent formating in ColdFire 5272 definitionsGreg Ungerer2012-09-271-3/+4
| | | | | | Fix tab broken defines to be consistent with others in this file. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: fix inconsistent formating in ColdFire 523x definitionsGreg Ungerer2012-09-271-9/+9
| | | | | | Fix tab broken address defines to be consistent with others in this file. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: clean up ColdFire 54xx General Timer definitionsGreg Ungerer2012-09-272-23/+23
| | | | | | | | | | | Convert the ColdFire 54xx CPU General Timer register address definitions to include the MCF_MBAR peripheral region offset. This makes them consistent with all other 54xx address register definitions (in m54xxsim.h). The goal is to reduce different definitions used (some including offsets and others not) causing bugs when used incorrectly. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: clean up Pin Assignment definitions for the 54xx ColdFire CPUGreg Ungerer2012-09-273-15/+20
| | | | | | | | | | The Pin Assignment register definitions for the ColdFire 54xx CPU family are inconsistently named and defined compared to the other ColdFire part definitions. Rename them with the same prefix as used on other parts, MCFGPIO_PAR_, and make their definitions include the MCF_MBAR periphperal region offset. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: fix multi-function pin setup for FEC module on ColdFire 523xGreg Ungerer2012-09-272-7/+9
| | | | | | | | | | | | The multi-function pin setup code for the FEC ethernet module is using just plain wrong. Looks like it was cut-and-pasted from other init code. It has hard coded register addresses that are incorrect for the 523x, and it is manipulating bits that don't make sense. Add proper register definitions for the Pin Assignment registers of the 532x, and then use them to fix the setup code for the FEC hardware module. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: move ColdFire slice timer address defiens to 54xx headerGreg Ungerer2012-09-273-9/+8
| | | | | | | | | Move the base address defines of the ColdFire 54xx CPU slice timers into the 54xx specific header (m54xxsim.h). They are CPU specific, and belong with the CPU specific defines. Also make them relative to the MBAR peripheral region, making the define the absolute address. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: use read/write IO access functions in ColdFire m532x setup codeGreg Ungerer2012-09-272-148/+139
| | | | | | | Get rid of the use of local IO access macros and switch to using the standard read*/write* family of access functions for the ColdFire m532x setup code. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: modify ColdFire 532x GPIO register definitions to be consistentGreg Ungerer2012-09-272-42/+48
| | | | | | | | | | The ColdFire 532x CPU register definitions for the multi-function setup pins are inconsistently defined compared with other ColdFire parts. Modify the register defintions to be just the addresses, not pointers. This also fixes the erroneous use in one case of using these values in the UART setup code for the 532x. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: remove a lot of unsed definitions for 532x ColdFireGreg Ungerer2012-09-271-1032/+1
| | | | | | | There are a lot of unused and uneccessary definitions in the header to support the ColdFire 532x CPU family. Remove the junk. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: use definitions for the ColdFire 528x FEC multi-function pinsGreg Ungerer2012-09-271-3/+3
| | | | | | | | Currently the setup code for the FEC multi-function pins on the ColdFire 528x has the addresses hard coded in the code. Use the register defines that already exist for this. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: remove address offsets relative to IPSBAR for ColdFire 527xGreg Ungerer2012-09-272-30/+46
| | | | | | | | | | | | | | Remove the last address definitions relative to the IPSBAR peripheral region for the ColdFire 527x family. This involved cleaning up some magic numbers used in the code part, and making them proper register definitions in the 527x specific header. This is part of the process of cleaning up the ColdFire register definitions to make them consistently use absolute addresses for the primary registers. This will reduce the occasional bugs caused by inconsistent definition of the register addresses. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: remove unused ColdFire 5282 register definitionsGreg Ungerer2012-09-271-50/+1
| | | | | | | There is a bunch of old unused and ugly register definitions in the ColdFire 5282 header. Remove them. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: fix wrong register offsets used for ColdFire 5272 multi-function pinsGreg Ungerer2012-09-272-10/+7
| | | | | | | | | | | | The registers used to configure and set the multifunction pins on the 5272 ColdFire are defined as absolute addresses. So the use of them does not need to be offset relative to the peripheral region address. Fix two cases of incorrect usage of these addresses. Both affect UART initialization, one in the common UART pin setup code, the other in the NETtel board specific UART signal handling. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: make ColdFire 5249 MBAR2 register definitions absolute addressesGreg Ungerer2012-09-273-26/+26
| | | | | | | | | | | | | | | | | Make the ColdFire 5249 MBAR peripheral register definitions absolute addresses, instead of offsets into the region. The various ColdFire parts use different methods to address the internal registers, some are absolute, some are relative to peripheral regions which can be mapped at different address ranges (such as the MBAR and IPSBAR registers). We don't want to deal with this in the code when we are accessing these registers, so make all register definitions the absolute address - factoring out whether it is an offset into a peripheral region. This makes them all consistently defined, and reduces the occasional bugs caused by inconsistent definition of the register addresses. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: make remaining ColdFire 5272 register definitions absolute addressesGreg Ungerer2012-09-272-17/+14
| | | | | | | | | | | | | | | | | Make the remaining definitions of the 5272 ColdFire registers absolute addresses. Currently some are relative to the MBAR peripheral region. The various ColdFire parts use different methods to address the internal registers, some are absolute, some are relative to peripheral regions which can be mapped at different address ranges (such as the MBAR and IPSBAR registers). We don't want to deal with this in the code when we are accessing these registers, so make all register definitions the absolute address - factoring out whether it is an offset into a peripheral region. This makes them all consistently defined, and reduces the occasional bugs caused by inconsistent definition of the register addresses. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: make ColdFire Park and Assignment register definitions absolute ↵Greg Ungerer2012-09-274-9/+9
| | | | | | | | | | | | | | | | | | | | addresses Make all definitions of the ColdFire MPARK and IRQ Assignment registers absolute addresses. Currently some are relative to the MBAR peripheral region. The various ColdFire parts use different methods to address the internal registers, some are absolute, some are relative to peripheral regions which can be mapped at different address ranges (such as the MBAR and IPSBAR registers). We don't want to deal with this in the code when we are accessing these registers, so make all register definitions the absolute address - factoring out whether it is an offset into a peripheral region. This makes them all consistently defined, and reduces the occasional bugs caused by inconsistent definition of the register addresses. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: make ColdFire Chip Select register definitions absolute addressesGreg Ungerer2012-09-278-134/+134
| | | | | | | | | | | | | | | | | Make all definitions of the ColdFire Chip Select registers absolute addresses. Currently some are relative to the MBAR peripheral region. The various ColdFire parts use different methods to address the internal registers, some are absolute, some are relative to peripheral regions which can be mapped at different address ranges (such as the MBAR and IPSBAR registers). We don't want to deal with this in the code when we are accessing these registers, so make all register definitions the absolute address - factoring out whether it is an offset into a peripheral region. This makes them all consistently defined, and reduces the occasional bugs caused by inconsistent definition of the register addresses. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: make ColdFire Interrupt Source register definitions absolute ↵Greg Ungerer2012-09-2711-85/+85
| | | | | | | | | | | | | | | | | | | addresses Make all definitions of the ColdFire Interrupt Source registers absolute addresses. Currently some are relative to the MBAR peripheral region. The various ColdFire parts use different methods to address the internal registers, some are absolute, some are relative to peripheral regions which can be mapped at different address ranges (such as the MBAR and IPSBAR registers). We don't want to deal with this in the code when we are accessing these registers, so make all register definitions the absolute address - factoring out whether it is an offset into a peripheral region. This makes them all consistently defined, and reduces the occasional bugs caused by inconsistent definition of the register addresses. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: make ColdFire Pin Assignment register definitions absolute addressesGreg Ungerer2012-09-274-5/+5
| | | | | | | | | | | | | | | | | Make all definitions of the ColdFire Pin Assignment registers absolute addresses. Currently some are relative to the MBAR peripheral region. The various ColdFire parts use different methods to address the internal registers, some are absolute, some are relative to peripheral regions which can be mapped at different address ranges (such as the MBAR and IPSBAR registers). We don't want to deal with this in the code when we are accessing these registers, so make all register definitions the absolute address - factoring out whether it is an offset into a peripheral region. This makes them all consistently defined, and reduces the occasional bugs caused by inconsistent definition of the register addresses. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: make ColdFire watchdog register definitions absolute addressesGreg Ungerer2012-09-277-17/+17
| | | | | | | | | | | | | | | | | Make all definitions of the ColdFire Software watchdog registers absolute addresses. Currently some are relative to the MBAR peripheral region. The various ColdFire parts use different methods to address the internal registers, some are absolute, some are relative to peripheral regions which can be mapped at different address ranges (such as the MBAR and IPSBAR registers). We don't want to deal with this in the code when we are accessing these registers, so make all register definitions the absolute address - factoring out whether it is an offset into a peripheral region. This makes them all consistently defined, and reduces the occasional bugs caused by inconsistent definition of the register addresses. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: make ColdFire SYPCR and RSR register definitions absolute addressesGreg Ungerer2012-09-276-11/+11
| | | | | | | | | | | | | | | | | Make all definitions of the ColdFire Reset and System registers absolute addresses. Currently some are relative to the MBAR peripheral region. The various ColdFire parts use different methods to address the internal registers, some are absolute, some are relative to peripheral regions which can be mapped at different address ranges (such as the MBAR and IPSBAR registers). We don't want to deal with this in the code when we are accessing these registers, so make all register definitions the abolsute address - factoring out whether it is an offset into a peripheral region. This makes them all consistently defined, and reduces the occasional bugs caused by inconsistent definition of the register addresses. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: make ColdFire IMR and IPR register definitions absolute addressesGreg Ungerer2012-09-277-31/+31
| | | | | | | | | | | | | | | | | Make all definitions of the ColdFire Interrupt Mask and Pending registers absolute addresses. Currently some are relative to the MBAR peripheral region. The various ColdFire parts use different methods to address the internal registers, some are absolute, some are relative to peripheral regions which can be mapped at different address ranges (such as the MBAR and IPSBAR registers). We don't want to deal with this in the code when we are accessing these registers, so make all register definitions the absolute address - factoring out whether it is an offset into a peripheral region. This makes them all consistently defined, and reduces the occasional bugs caused by inconsistent definition of the register addresses. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: use "r", not "i" constraint in cacheflush asm'sPhilippe De Muyter2012-09-271-11/+8
| | | | | | | | | | Let the compiler choose which register to use in the cache flushing asm statements, instead of imposing %d0. Additionally, fix two typo's. Signed-off-by: Philippe De Muyter <phdm@macqel.be> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68k: drop unused parts of 68VZ328 MakefilePaul Bolle2012-09-271-7/+1
| | | | | | | | | DRAGEN2 should obviously be CONFIG_DRAGEN2, but the screen.h entry it triggers only references files that are nowhere to be found in the current tree. Besides, nothing uses screen.h. So just drop all that. Signed-off-by: Paul Bolle <pebolle@tiscali.nl> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* ARM: 7534/1: clk: Make the managed clk functions generically availableLars-Peter Clausen2012-09-151-6/+0
| | | | | | | | | | | | | | | | The managed clk functions are currently only available when the generic clk lookup framework is build. But the managed clk functions are merely wrappers around clk_get and clk_put and do not depend on any specifics of the generic lookup functions and there are still quite a few custom implementations of the clk API. So make the managed functions available whenever the clk API is implemented. The patch also removes the custom implementation of devm_clk_get for the coldfire platform. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Acked-by: Greg Ungerer <gerg@uclinux.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* m68k: select CONFIG_GENERIC_ATOMIC64 for all m68k CPU typesGreg Ungerer2012-08-172-4/+1
| | | | | | | | | | There is no specific atomic64 support code for any m68k CPUs, so we should select CONFIG_GENERIC_ATOMC64 for all. Remove the existing per CPU selection of this and select it for all m68k. Signed-off-by: Greg Ungerer <gerg@uclinux.org> Acked-by: Fengguang Wu <fengguang.wu@intel.com> Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
* m68knommu: select CONFIG_HAVE_CLK for ColdFire CPU typesGreg Ungerer2012-08-171-0/+1
| | | | | | | The ColdFire CPU sub-arch has kernel clk code support, so select CONFIG_HAVE_CLK. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* Merge branch 'for-linus' of ↵Linus Torvalds2012-08-0354-817/+92
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/geert/linux-m68k Pull m68k updates from Geert Uytterhoeven. * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/linux-m68k: m68k: Make sys_atomic_cmpxchg_32 work on classic m68k m68k/apollo: Rename "timer" to "apollo_timer" zorro: Remove unused zorro_bus.devices m68k: Remove never used asm/shm.h m68k/sun3: Remove unselectable code in prom_init() m68k: Use asm-generic version of <asm/sections.h> m68k: Replace m68k-specific _[se]bss by generic __bss_{start,stop} mtd/uclinux: Use generic __bss_stop instead of _ebss m68knommu: Allow ColdFire CPUs to use unaligned accesses m68k: Remove five unused headers m68k: CPU32 does not support unaligned accesses m68k: Introduce config option CPU_HAS_NO_UNALIGNED m68k: delay, muldi3 - Use CONFIG_CPU_HAS_NO_MULDIV64 m68k: Move CPU_HAS_* config options m68k: Remove duplicate FPU config option m68knommu: Clean up printing of sections m68k: Use asm-generic version of <asm/types.h> m68k: Use Kbuild logic to import asm-generic headers
| * m68k: Make sys_atomic_cmpxchg_32 work on classic m68kAndreas Schwab2012-08-031-2/+6
| | | | | | | | | | | | | | | | | | | | User space access must always go through uaccess accessors, since on classic m68k user space and kernel space are completely separate. Signed-off-by: Andreas Schwab <schwab@linux-m68k.org> Tested-by: Thorsten Glaser <tg@debian.org> Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> Cc: stable@vger.kernel.org
| * m68k/apollo: Rename "timer" to "apollo_timer"Geert Uytterhoeven2012-07-222-9/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In file included from include/linux/kgdb.h:17, from include/linux/fb.h:8, from drivers/video/dnfb.c:15: include/linux/serial_8250.h:71: error: expected identifier or ‘(’ before numeric constant include/linux/serial_8250.h:72: error: expected ‘;’ before ‘struct’ make[1]: *** [drivers/video/dnfb.o] Error 1 This is caused by #define timer (IO_BASE + timer_physaddr) in <asm/apollohw.h>, which conflicts with the new "timer" struct member in <linux/serial_8250.h>. Rename "timer" to "apollo_timer", as it's a way too generic name for a global #define. Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> -- http://kisskb.ellerman.id.au/kisskb/buildresult/6739606/
| * m68k: Remove never used asm/shm.hPaul Bolle2012-06-271-31/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | m68k's asm/shm.h header has been part of the tree ever since m68k support got added in v1.3.94. (It started as /include/asm-m68k/shm.h and moved to its current location a few years ago.) It seems it was never used: no file ever included it and nothing used the macros it defines. (Actually, from v2.5.46 until v2.6.29-rc3 it was included by m68knommu's asm/shm.h. But that header was just a very thin wrapper for this header and was itself unused too.) This header can safely be removed. Signed-off-by: Paul Bolle <pebolle@tiscali.nl> Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
| * m68k/sun3: Remove unselectable code in prom_init()Geert Uytterhoeven2012-06-271-46/+2
| | | | | | | | | | | | | | | | | | | | | | This was copied from SPARC, but isn't relevant for the supported Sun-3 models. [Geert] Also remove the related extern declarations, and update the comment about prom_init(). Reported-by: Sarah Nadi <snadi@uwaterloo.ca> Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
| * m68k: Use asm-generic version of <asm/sections.h>Geert Uytterhoeven2012-06-272-6/+1
| | | | | | | | | | Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> Acked-by: Greg Ungerer<gerg@uclinux.org>
| * m68k: Replace m68k-specific _[se]bss by generic __bss_{start,stop}Geert Uytterhoeven2012-06-2714-38/+30
| | | | | | | | | | | | | | | | BSS_SECTION() provides the __bss_{start,stop} symbols, so there's no need to wrap our own _[se]bss around it. Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> Acked-by: Greg Ungerer<gerg@uclinux.org>
| * m68knommu: Allow ColdFire CPUs to use unaligned accessesGreg Ungerer2012-06-271-1/+0
| | | | | | | | | | | | | | | | | | | | | | All of the current Linux supported ColdFire CPUs handle unaligned memory accesses. So remove the CONFIG_CPU_HAS_NO_UNALIGNED option selection for ColdFire. If we ever support a specific ColdFire CPU that does not support unaligned accesses then we can insert the CONFIG_CPU_HAS_NO_UNALIGNED for that specific CPU type. Signed-off-by: Greg Ungerer <gerg@uclinux.org> Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
| * m68k: Remove five unused headersPaul Bolle2012-06-275-545/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are five entirely unused headers in arch/m68k/include/asm. Nothing includes these headers. And a few tests found no hits for the things they provide (which makes sense). MC68332.h, mac_mouse.h, and mcfmbus.h are all unused since at least v2.6.12-rc2 (I didn't bother looking further back than that). apollodma.h is unused since v2.6.19: commit 2ed0ce5b57950a620155433c62a5a02a067f1376 ("m68k/Apollo: Remove obsolete arch/m68k/apollo/dma.c") removed the last file interested in that header. And everything interested in <asm/sbus.h> was removed in the v2.6.28 release cycle. The last occurrence of "sbus.h" was deleted with commit 0c0db98b50ed1217c0dbf4051722034ba314d06e ("sparc: Remove Documentation/sparc/sbus_drivers.txt"). I'm not sure whether anything relevant for m68k was included in v2.6.27, but it doesn't really matter. Signed-off-by: Paul Bolle <pebolle@tiscali.nl> Acked-by: Greg Ungerer<gerg@uclinux.org> Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
| * m68k: CPU32 does not support unaligned accessesGeert Uytterhoeven2012-06-101-0/+1
| | | | | | | | | | | | | | | | Hence select CPU_HAS_NO_UNALIGNED Reported-by: Philippe De Muyter <phdm@macqel.be> Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> Acked-by: Greg Ungerer<gerg@uclinux.org>
| * m68k: Introduce config option CPU_HAS_NO_UNALIGNEDGeert Uytterhoeven2012-06-102-2/+7
| | | | | | | | | | | | | | | | Use CONFIG_CPU_HAS_NO_UNALIGNED instead of open coding CONFIG_M68000 || CONFIG_COLDFIRE Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> Acked-by: Greg Ungerer<gerg@uclinux.org>
| * m68k: delay, muldi3 - Use CONFIG_CPU_HAS_NO_MULDIV64Geert Uytterhoeven2012-06-102-2/+2
| | | | | | | | | | | | | | instead of open coding CONFIG_M68000 || CONFIG_COLDFIRE Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> Acked-by: Greg Ungerer<gerg@uclinux.org>
| * m68k: Move CPU_HAS_* config optionsGeert Uytterhoeven2012-06-102-9/+9
| | | | | | | | | | | | | | They belong together with the CPU selection Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> Acked-by: Greg Ungerer<gerg@uclinux.org>
| * m68k: Remove duplicate FPU config optionGeert Uytterhoeven2012-06-101-3/+0
| | | | | | | | | | | | | | It's also defined in arch/m68k/Kconfig.cpu Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> Acked-by: Greg Ungerer<gerg@uclinux.org>
| * m68knommu: Clean up printing of sectionsGeert Uytterhoeven2012-06-101-7/+4
| | | | | | | | | | | | | | | | - Remove casts and unneeded address-of ('&') operators, - Use %p to format pointers, %lx to format unsigned longs. Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> Acked-by: Greg Ungerer <gerg@uclinux.org>
| * m68k: Use asm-generic version of <asm/types.h>Geert Uytterhoeven2012-06-102-22/+1
| | | | | | | | | | | | | | | | The extra definition for BITS_PER_LONG we had is also indirectly provided by <asm-generic/types.h>, via <asm-generic/int-ll64.h> and <asm/bitsperlong.h> Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
| * m68k: Use Kbuild logic to import asm-generic headersGeert Uytterhoeven2012-06-1024-97/+23
| | | | | | | | | | | | | | Replace all headers files that just include their asm-generic version by Kbuild logic Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
* | ipc: use Kconfig options for __ARCH_WANT_[COMPAT_]IPC_PARSE_VERSIONWill Deacon2012-07-312-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rather than #define the options manually in the architecture code, add Kconfig options for them and select them there instead. This also allows us to select the compat IPC version parsing automatically for platforms using the old compat IPC interface. Reported-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Will Deacon <will.deacon@arm.com> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Chris Metcalf <cmetcalf@tilera.com> Cc: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* | Merge branch 'for-next' of ↵Linus Torvalds2012-07-2556-1125/+2984
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/gerg/m68knommu Pull m68knommu arch update from Greg Ungerer: "Quite a varied set of changes this time. - A little more merge cleanup, this time the assembler entry code. - New sub-architecture support for the ColdFire 5251/5253 and 5441x CPU families. - Specific clk support code for the ColdFire 520x and 532x CPU familes. - Refactoring of the ColdFire GPIO support. - PCI bus support for some ColdFire CPUS that have PCI hardware (54xx family). This showed up a few problems with ColdFire cache, allocating coherent memory and bi-directional DMA support. Fixes for those too." * 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/gerg/m68knommu: (21 commits) m68k: allow PCI bus to be enabled for ColdFire m54xx CPUs m68k: add PCI bus code support for the ColdFire M54xx SoC family m68k: add IO access definitions to support PCI on ColdFire platforms m68k: add PCI bus support definitions for the ColdFire M54xx SoC family m68k: common PCI support definitions and code m68k: add support for DMA_BIDIRECTIONAL in dma support functions m68k: fix ColdFire clear cache operation m68k: use simpler dma_alloc_coherent() for ColdFire CPUs m68knommu: platform support for 8390 based ethernet used on some boards m68knommu: Add clk definitions for m532x. m68knommu: Add clk definitions for m520x. m68knommu: Add rtc device for m5441x. m68knommu: add definitions for the third interrupt controller on devices that don't have a third interrupt controller. m68knommu: Add support for the Coldfire m5441x. m68knommu: use MCF_IRQ_PIT1 instead of MCFINT_VECBASE + MCFINT_PIT1 coldfire-qspi: Add support for the Coldfire 5251/5253. m68knommu: Add support for the Coldfire 5251/5253 m68knommu: refactor Coldfire GPIO not to require GPIOLIB, eliminate mcf_gpio_chips. m68k: merge the MMU and non-MMU versions of the entry.S code m68k: use jbsr to call functions instead of bsrl ...
| * | m68k: allow PCI bus to be enabled for ColdFire m54xx CPUsGreg Ungerer2012-07-171-0/+7
| | | | | | | | | | | | | | | | | | | | | All support code for the PCI bus hardware on the ColdFire 547x and 548x CPUs is now in. Allow enabling of CONFIG_PCI for them. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * | m68k: add PCI bus code support for the ColdFire M54xx SoC familyGreg Ungerer2012-07-172-0/+329
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ColdFire M54xx SoC family have a traditional PCI bus interface. Add the core support code to access and use this bus on these parts. This code provides all the config space access functions and IO access functions. It also carries out the PCI bus initialization and hooks into the kernel PCI subsystem. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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