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* USB: move common alchemy USB routines to arch/mips/alchemy/common.cFlorian Fainelli2012-10-222-1/+615
| | | | | | | | | | | | A previous patch converted the Alchemy platform to use the OHCI and EHCI platform drivers. As a result, all the common logic to handle USB present in drivers/usb/host/alchemy-common.c has no reason to remain here, so we move it to arch/mips/alchemy/common/usb.c which is a more appropriate place. This change was suggested by Manuel Lauss. Signed-off-by: Florian Fainelli <florian@openwrt.org> Acked-by: Alan Stern <stern@rowland.harvard.edu> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* MIPS: Alchemy: use the OHCI platform driverFlorian Fainelli2012-10-221-2/+33
| | | | | | | | | | | | | | | | | Convert the Alchemy platform to register the ohci-platform driver, now that the ohci-platform driver properly handles the specific ohci-au1xxx resume from suspend case. This also greatly simplifies the power_{on,off} callbacks and make them work on platform device id instead of checking the OHCI controller base address like what was done in ohci-au1xxx.c. Impacted defconfigs are also updated accordingly to select the OHCI platform driver. Signed-off-by: Florian Fainelli <florian@openwrt.org> Acked-by: Alan Stern <stern@rowland.harvard.edu> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* MIPS: Alchemy: use the ehci platform driverFlorian Fainelli2012-10-221-1/+22
| | | | | | | | | | | Use the ehci platform driver power_{on,suspend,off} callbacks to perform the USB block gate enabling/disabling as what the ehci-au1xxx.c driver does. Update the db1200 and db1300 defconfigs to now select the EHCI platform driver. Signed-off-by: Florian Fainelli <florian@openwrt.org> Acked-by: Alan Stern <stern@rowland.harvard.edu> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* MIPS: Alchemy: Use kmemdup rather than duplicating its implementationThomas Meyer2012-07-231-6/+4
| | | | | | | | | | | The semantic patch that makes this change is available in scripts/coccinelle/api/memdup.cocci. Signed-off-by: Thomas Meyer <thomas@m3y3r.de> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/3058/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Alchemy: Increase minimum timeout for 32kHz timer.Manuel Lauss2012-02-201-1/+1
| | | | | | | | | | | | | | | | | | | | | Since a clocksource change post 3.2-rc1, tasks on my DB1500 board hang after random amounts of time (from a few minutes to a few hours), regardless of load. Debugging showed that the compare-match register value is a few seconds lower than the current counter value. The minimum value of 8 was initialy determined by a trial-and-error approach. Currently it is sufficient for all Alchemys (without PCI apparently), independent of CPU clock; only the DB1500 and DB1550 boards experience these timer-related tasks hangs now. This patch increases the minimum timeout by 1 (to 9 counter ticks) which seems sufficient since the systems are still working perfectly fine after over 24 hours. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3214/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* Merge branch 'next/alchemy' into mips-for-linux-nextRalf Baechle2012-01-119-267/+892
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| * MIPS: Alchemy: merge Au1000 and Au1300-style IRQ controller code.Manuel Lauss2011-12-083-587/+550
| | | | | | | | | | | | | | | | | | | | | | With a generic plat_irq_dispatch (for Alchemy at least) code for both interrupt controller types can coexist in a single kernel image and be autodetected at runtime. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2935/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Alchemy: chain IRQ controllers to MIPS IRQ controllerManuel Lauss2011-12-082-49/+39
| | | | | | | | | | | | | | | | | | IC and GPIC are now chain handlers of the traditional MIPS IRQ controller. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2933/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Alchemy: irq: register pm at irq init timeManuel Lauss2011-12-082-96/+91
| | | | | | | | | | | | | | | | | | No need for a device_initcall. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2934/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Alchemy: Au1300 SoC supportManuel Lauss2011-12-079-3/+691
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add basic support for the Au1300 variant(s): - New GPIO/Interrupt controller - DBDMA ids - USB setup - MMC support - enable various PSC drivers - detection code. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2866/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Alchemy: remove PB1000 supportManuel Lauss2011-12-071-11/+0
| | | | | | | | | | | | | | | | | | | | | | | | Noone seems to have test hardware or care anymore. Drop PB1000 support and along with it the old Alchemy PCMCIA socket driver. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: linux-mips@linux-mips.org Cc: netdev@vger.kernel.org Cc: linux-pcmcia@lists.infradead.org Patchwork: https://patchwork.linux-mips.org/patch/2881/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | MIPS: irq: Remove IRQF_DISABLEDYong Zhang2011-12-072-3/+2
|/ | | | | | | | | | | | | | | | | | | | Since commit [e58aa3d2: genirq: Run irq handlers with interrupts disabled], We run all interrupt handlers with interrupts disabled and we even check and yell when an interrupt handler returns with interrupts enabled (see commit [b738a50a: genirq: Warn when handler enables interrupts]). So now this flag is a NOOP and can be removed. [ralf@linux-mips.org: Fixed up conflicts in arch/mips/alchemy/common/dbdma.c, arch/mips/cavium-octeon/smp.c and arch/mips/kernel/perf_event.c.] Signed-off-by: Yong Zhang <yong.zhang0@gmail.com> To: linux-kernel@vger.kernel.org Cc: tglx@linutronix.de linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2835/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Alchemy: remove all CONFIG_SOC_AU1??? definesManuel Lauss2011-10-251-173/+2
| | | | | | | | | | | | | Now that no driver any longer depends on the CONFIG_SOC_AU1??? symbols, it's time to get rid of them: Move some of the platform devices to the boards which can use them, Rename a few (unused) constants in the header, Replace them with MIPS_ALCHEMY in the various Kconfig files. Finally delete them altogether from the Alchemy Kconfig file. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/2707/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Alchemy: kill au1xxx.h headerManuel Lauss2011-10-251-1/+1
| | | | | | | | | | | No longer required Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/2705/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org> delete mode 100644 arch/mips/include/asm/mach-au1x00/au1xxx.h
* MIPS: Alchemy: clean DMA code of CONFIG_SOC_AU1??? definesManuel Lauss2011-10-253-152/+127
| | | | | | | | | | This patch gets rid of all CONFIG_SOC_AU1XXX defines in DMA/DBDMA-related code. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/2704/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Alchemy: Redo PCI as platform driverManuel Lauss2011-10-253-109/+3
| | | | | | | | | | | | | | | | | - Rewrite Alchemy PCI support as a platform driver. - Fixup boards which have PCI. Run-tested on DB1500 and DB1550. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/2706/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org> delete mode 100644 arch/mips/alchemy/common/pci.c delete mode 100644 arch/mips/pci/fixup-au1000.c delete mode 100644 arch/mips/pci/ops-au1000.c create mode 100644 arch/mips/pci/pci-alchemy.c
* MIPS: Alchemy: more base address cleanupManuel Lauss2011-10-251-6/+6
| | | | | | | | | | remove all redundant peripheral base address defines, fix all affected boards and drivers. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/2700/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Alchemy: rewrite USB platform setup.Manuel Lauss2011-10-251-108/+75
| | | | | | | | | | | | Use runtime CPU detection to setup all USB parts. Remove the Au1200 OTG and UDC platform devices since there are no drivers for them anyway. Clean up the USB address mess in the au1000 header. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/2703/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Alchemy: abstract USB block control register accessManuel Lauss2011-10-252-48/+6
| | | | | | | | | | | | | | | | Alchemy chips have one or more registers which control access to the usb blocks as well as PHY configuration. I don't want the OHCI/EHCI glues to know about the different registers and bits; new code hides the gory details of USB configuration from them. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: Linux-MIPS <linux-mips@linux-mips.org> Cc: linux-usb@vger.kernel.org Acked-by: Greg Kroah-Hartman <gregkh@suse.de> Patchwork: https://patchwork.linux-mips.org/patch/2709/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org> create mode 100644 drivers/usb/host/alchemy-common.c
* MIPS: Alchemy: support multiple GPIO styles in one kernelManuel Lauss2011-10-252-17/+22
| | | | | | | | | | | For GPIOLIB=y decide at runtime which gpiochips to register; in the GPIOLIB=n case, the gpio headers need to be reshuffled a bit to make multiple implementations coexist peacefully. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/2679/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Alchemy: Always build power codeManuel Lauss2011-10-251-4/+0
| | | | | | | | | No reason NOT to build it Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/2678/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* NET: au1000_eth: Pass MACDMA address through platform resource info.Manuel Lauss2011-10-251-9/+21
| | | | | | | | | | | | | | | This patch removes the last hardcoded base address from the au1000_eth driver. The base address of the MACDMA unit was derived from the platform device id; if someone registered the MACs in inverse order both would not work. So instead pass the base address of the DMA unit to the driver with the other platform resource information. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> Acked-by: David S. Miller <davem@davemloft.net> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2674/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Alchemy: Include Au1100 in PM code.Manuel Lauss2011-09-211-8/+14
| | | | | | | | | | The current code forgets the Au1100 when looking for the correct method to suspend the chip. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2675/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Alchemy: Fix typo in MAC0 registrationManuel Lauss2011-09-211-1/+1
| | | | | | | | | | Harmless typo which prints an error message although MAC0 was registered successfully. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2672/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* Merge branch 'timers-clocksource-for-linus' of ↵Linus Torvalds2011-05-201-2/+1
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip * 'timers-clocksource-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: clocksource: convert mips to generic i8253 clocksource clocksource: convert x86 to generic i8253 clocksource clocksource: convert footbridge to generic i8253 clocksource clocksource: add common i8253 PIT clocksource blackfin: convert to clocksource_register_hz mips: convert to clocksource_register_hz/khz sparc: convert to clocksource_register_hz/khz alpha: convert to clocksource_register_hz microblaze: convert to clocksource_register_hz/khz ia64: convert to clocksource_register_hz/khz x86: Convert remaining x86 clocksources to clocksource_register_hz/khz Make clocksource name const
| * Merge branch 'consolidate-clksrc-i8253' of ↵Thomas Gleixner2011-05-142-49/+51
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | master.kernel.org:~rmk/linux-2.6-arm into timers/clocksource Conflicts: arch/ia64/kernel/cyclone.c arch/mips/kernel/i8253.c arch/x86/kernel/i8253.c Reason: Resolve conflicts so further cleanups do not conflict further Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
| * | mips: convert to clocksource_register_hz/khzJohn Stultz2011-02-211-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | This converts the mips clocksources to use clocksource_register_hz/khz CC: Ralf Baechle <ralf@linux-mips.org> CC: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: John Stultz <johnstul@us.ibm.com>
* | | MIPS: Alchemy: Cleanup DMA addressesManuel Lauss2011-05-192-25/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According to the databooks, the Au1000 DMA engine must be programmed with the physical FIFO addresses. This patch does that; furthermore this opened the possibility to get rid of a lot of now unnecessary address defines. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: Linux-MIPS <linux-mips@linux-mips.org> Cc: Florian Fainelli <florian@openwrt.org> Cc: Wolfgang Grandegger <wg@grandegger.com> Patchwork: https://patchwork.linux-mips.org/patch/2348/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org
* | | MIPS: Alchemy: Rewrite ethernet platform setupManuel Lauss2011-05-191-50/+101
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rewrite ethernet setup to use runtime cpu detection, and also clean up the ethernet base address mess as far as possible. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: Linux-MIPS <linux-mips@linux-mips.org> Cc: Florian Fainelli <florian@openwrt.org> Cc: Wolfgang Grandegger <wg@grandegger.com> Patchwork: https://patchwork.linux-mips.org/patch/2353/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org
* | | MIPS: Alchemy: Rewrite UART setup and constants.Manuel Lauss2011-05-191-42/+51
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Detect CPU type at runtime and setup uarts accordingly; also clean up the uart base address mess in the process as far as possible. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: Linux-MIPS <linux-mips@linux-mips.org> Cc: Florian Fainelli <florian@openwrt.org> Cc: Wolfgang Grandegger <wg@grandegger.com> Patchwork: https://patchwork.linux-mips.org/patch/2352/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org
* | | MIPS: Alchemy: Convert dbdma.c to syscore_opsManuel Lauss2011-05-191-78/+45
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Convert the PM sysdev to syscore_ops and clean up the ddma addresses a bit. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: Linux-MIPS <linux-mips@linux-mips.org> Cc: Florian Fainelli <florian@openwrt.org> Cc: Wolfgang Grandegger <wg@grandegger.com> Patchwork: https://patchwork.linux-mips.org/patch/2351/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | | MIPS: Alchemy: Convert irq.c to syscore_ops.Manuel Lauss2011-05-191-60/+41
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Convert the PM sysdev to use syscore_ops instead. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: Linux-MIPS <linux-mips@linux-mips.org> Cc: Florian Fainelli <florian@openwrt.org> Cc: Wolfgang Grandegger <wg@grandegger.com> Patchwork: https://patchwork.linux-mips.org/patch/2350/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | | MIPS: Alchemy: irq code and constant cleanupManuel Lauss2011-05-191-115/+135
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | replace au_readl/au_writel with __raw_readl/__raw_writel, and clean up IC-related stuff from the headers. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: Linux-MIPS <linux-mips@linux-mips.org> Cc: Florian Fainelli <florian@openwrt.org> Cc: Wolfgang Grandegger <wg@grandegger.com> Patchwork: https://patchwork.linux-mips.org/patch/2354/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | | MIPS: DB1200: Set Config[OD] for improved stability.Manuel Lauss2011-05-191-2/+2
| |/ |/| | | | | | | | | | | | | | | | | | | | | Setting Config[OD] gets rid of a _LOT_ of spurious CPLD interrupts, but also decreases overall performance a bit. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: Linux-MIPS <linux-mips@linux-mips.org> Cc: Florian Fainelli <florian@openwrt.org> Cc: Wolfgang Grandegger <wg@grandegger.com> Patchwork: https://patchwork.linux-mips.org/patch/2347/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | Fix common misspellingsLucas De Marchi2011-03-311-1/+1
| | | | | | | | | | | | Fixes generated by 'codespell' and manually reviewed. Signed-off-by: Lucas De Marchi <lucas.demarchi@profusion.mobi>
* | MIPS: Alchemy: Convert to new irq chip functionsThomas Gleixner2011-03-251-48/+50
|/ | | | | | | | | | | | | | | Fix the deadlock in set_type() while at it: The code called set_irq_chip_and_handler_name() resp. set_irq_chip() from the set_type() callback. That only works on UP and lock debugging disabled. Otherwise it would dead lock on desc->lock. __irq_set_chip_handler_name_locked() avoids that. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2173/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* Merge branch 'master' into for-nextJiri Kosina2010-12-221-0/+2
|\ | | | | | | | | | | | | | | | | | | Conflicts: MAINTAINERS arch/arm/mach-omap2/pm24xx.c drivers/scsi/bfa/bfa_fcpim.c Needed to update to apply fixes for which the old branch was too outdated.
| * MIPS: Alchemy: fix build with SERIAL_8250=nManuel Lauss2010-12-161-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | In commit 7d172bfe ("Alchemy: Add UART PM methods") I introduced platform PM methods which call a function of the 8250 driver; this patch works around link failures when the kernel is built without 8250 support. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/1737/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | tree-wide: fix comment/printk typosUwe Kleine-König2010-11-011-1/+1
|/ | | | | | | | | | "gadget", "through", "command", "maintain", "maintain", "controller", "address", "between", "initiali[zs]e", "instead", "function", "select", "already", "equal", "access", "management", "hierarchy", "registration", "interest", "relative", "memory", "offset", "already", Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Jiri Kosina <jkosina@suse.cz>
* Alchemy: Add UART PM methods.Manuel Lauss2010-10-222-35/+28
| | | | | | | | | | | | | Custom UART PM hook for Alchemy chips: do standard UART pm and additionally en/disable uart block clocks as needed. This allows to get rid of a debug port PM hack in the Alchemy pm code. Tested on Db1200. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> Cc: Alan Cox <alan@lxorguk.ukuu.org.uk> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* MIPS: Alchemy: Resolve prom section mismatchesManuel Lauss2010-10-041-3/+2
| | | | | | | | | | | | | | | | | The function prom_init_cmdline() references the variable __initdata arcs_cmdline. The function prom_get_ethernet_addr() references the variable __initdata arcs_cmdline. Annotate prom_init_cmdline() as __init, unexport and annotate prom_get_ethernet_addr() since it's no longer called from within driver code. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/1547/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: au1000_eth: Get ethernet address from platform_dataManuel Lauss2010-08-051-1/+14
| | | | | | | | | | | | | | | | | au1000_eth uses firmware calls to get a valid MAC address, and changes it depending on platform device id. This patch moves this logic out of the driver into the platform device registration part, where boards with supported chips can use whatever firmware interface they need; the default implementation maintains compatibility with existing, YAMON-based firmware. Tested-by: Wolfgang Grandegger <wg@denx.de> Acked-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: Linux-MIPS <linux-mips@linux-mips.org> Cc: netdev@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/1481/ Acked-by: David S. Miller <davem@davemloft.net> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* SERIAL: 8250: Remove SERIAL_8250_AU1X00Manuel Lauss2010-08-051-2/+0
| | | | | | | | | | | | | | | Remove the SERIAL_8250_AU1X00 config symbol. Instead, use the MIPS_ALCHEMY one which is always defined when building an Au1x00-based platform. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: Linux-MIPS <linux-mips@linux-mips.org> Cc: Linux-serial <linux-serial@vger.kernel.org> Patchwork: https://patchwork.linux-mips.org/patch/1461/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org> This one depends on a previous patch (which removes SOC_AU1X00 and changes MACH_ALCHEMY) to apply cleanly (and then actually work), so I'd love for this to go in via the mips tree.
* MIPS: Alchemy: Remove dead CONFIG_SOC_AU1000_FREQUENCYChristoph Egger2010-08-051-4/+0
| | | | | | | | | | | | CONFIG_SOC_AU1000_FREQUENCY doesn't exist in Kconfig, therefore removing all references for it from the source code. Signed-off-by: Christoph Egger <siccegge@cs.fau.de> To: linux-mips@linux-mips.org To: linux-kernel@vger.kernel.org Cc: vamos@i4.informatik.uni-erlangen.de Patchwork: https://patchwork.linux-mips.org/patch/1367/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Move Alchemy Makefile parts to their own Platform file.Manuel Lauss2010-08-051-2/+0
| | | | | | | | | | | [Ralf: Remove a forgotten -Werror in Pb1200 Makefile.] Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: Linux-MIPS <linux-mips@linux-mips.org> Cc: Sam Ravnborg <sam@ravnborg.org> Cc: Manuel Lauss <manuel.lauss@googlemail.com> Patchwork: https://patchwork.linux-mips.org/patch/1319/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Alchemy: Define eth platform devices in the correct orderWolfgang Grandegger2010-07-261-4/+5
| | | | | | | | | | | | | | | | | | | | | | | Currently, the eth devices are probed in the inverse order, first au1xxx_eth1_device and then au1xxx_eth0_device. On the GPR board, this makes trouble: # ifconfig|grep HWaddr eth0 Link encap:Ethernet HWaddr 00:50:C2:0C:30:01 eth1 Link encap:Ethernet HWaddr 66:22:01:80:38:10 A bogous ethernet hwaddr is assigned to the first device and au1xxx_eth0_device is mapped to eth1, which even does not work properly. With this patch, the problems are gone: # ifconfig|grep HWaddr eth0 Link encap:Ethernet HWaddr 66:22:11:32:38:10 eth1 Link encap:Ethernet HWaddr 66:22:11:32:38:11 Signed-off-by: Wolfgang Grandegger <wg@denx.de> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1473/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Alchemy: sleepcode without compile-time cputype dependenciesManuel Lauss2010-07-052-31/+62
| | | | | | | | | | Split the low-level sleepcode into per-cpu functions instead of relying on compile-time-defined cpu type. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> To: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: http://patchwork.linux-mips.org/patch/1281/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Alchemy: add sysdev for DBDMA PM.Manuel Lauss2010-05-212-40/+72
| | | | | | | | | Add a sysdev for DBDMA PM. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> To: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: http://patchwork.linux-mips.org/patch/1119/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Alchemy: add sysdev for IRQ PM.Manuel Lauss2010-05-212-89/+90
| | | | | | | | | Use a sysdev to implement PM methods for the Au1000 interrupt controllers. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> To: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: http://patchwork.linux-mips.org/patch/1114/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Alchemy: Fix Au1100 ethernet build failureManuel Lauss2010-02-271-9/+10
| | | | | | | | | | Don't define platform info for second mac on au1100 (which only has a single mac). Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> To: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: http://patchwork.linux-mips.org/patch/1004/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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