Commit message (Expand) | Author | Age | Files | Lines | |
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* | MIPS: ath79: add clock setup code for the QCA955X SoCs | Gabor Juhos | 2013-02-19 | 1 | -0/+78 |
* | MIPS: ath79: Fix CPU/DDR frequency calculation for SRIF PLLs | Gabor Juhos | 2012-10-01 | 1 | -28/+81 |
* | MIPS: ath79: use correct fractional dividers for {CPU,DDR}_PLL on AR934x | Gabor Juhos | 2012-10-01 | 1 | -2/+2 |
* | MIPS: ath79: add clock initialization code for AR934X | Gabor Juhos | 2012-05-15 | 1 | -0/+81 |
* | MIPS: ath79: add AR933X specific clock init | Gabor Juhos | 2011-12-07 | 1 | -0/+55 |
* | MIPS: Add initial support for the Atheros AR71XX/AR724X/AR931X SoCs | Gabor Juhos | 2011-01-18 | 1 | -0/+183 |