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path: root/arch/mips/include/asm/stackframe.h (follow)
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* MIPS: Fix exception entry when CONFIG_EVA enabledMatt Redfearn2017-11-011-4/+4
* MIPS: Add DWARF unwinding to assemblyCorey Minyard2017-09-061-99/+132
* MIPS: Make SAVE_SOME more standardCorey Minyard2017-09-061-14/+37
* MIPS: Remove RESTORE_ALL_AND_RETPaul Burton2017-01-031-8/+0
* MIPS: Remove r2_emul_return from struct thread_infoPaul Burton2017-01-031-0/+4
* MIPS: Only change $28 to thread_info if coming from user modeMatt Redfearn2017-01-031-0/+7
* MIPS: Fix FPU disable with preemptionJames Hogan2016-02-011-2/+2
* MIPS: Flush RPS on kernel entry with EVAJames Hogan2015-08-031-0/+25
* MIPS: asm: stackframe: Do not preserve the HI/LO registers on MIPS R6Leonid Yegoshin2015-02-171-4/+4
* MIPS: MT: Remove SMTC supportRalf Baechle2014-05-241-195/+1
* MIPS: Fix gigaton of warning building with microMIPS.Ralf Baechle2014-03-311-1/+1
* MIPS: Move definition of SMP processor id register to header fileJayachandran C2013-10-291-18/+6
* MIPS: Don't save/restore OCTEON wide multiplier state on syscalls.David Daney2013-07-011-15/+14
* MIPS: microMIPS: Add support for exception handling.Steven J. Hill2013-05-091-6/+6
* MIPS: Whitespace cleanup.Ralf Baechle2013-02-011-7/+7
* MIPS: Don't clobber CP0_STATUS value for CONFIG_MIPS_MT_SMTCDavid Daney2011-09-211-2/+2
* Fix common misspellingsLucas De Marchi2011-03-311-1/+1
* MIPS: Loongson-2F: Use CONFIG_CPU_JUMP_WORKAROUNDS to control workarounds.Wu Zhangjin2010-04-301-1/+1
* MIPS: Loongson-2F: Flush the branch target history in BTB and RASWu Zhangjin2010-04-121-0/+19
* MIPS: Put PGD in C0_CONTEXT for 64-bit R2 processors.David Daney2009-12-171-10/+10
* MIPS: Reorder operations in stackframe.h for better schedulingDavid Daney2009-12-171-8/+12
* MIPS: Cavium OCTEON multiplier state preservation.David Daney2009-01-111-0/+17
* MIPS: Move headfiles to new location below arch/mips/includeRalf Baechle2008-10-111-0/+574