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path: root/arch/mips/kernel/cpu-probe.c (follow)
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* MIPS: R12000: Enable branch prediction global historyJoshua Kinard2015-06-211-2/+6
* MIPS: ingenic: Add newer vendor IDsPaul Burton2015-06-211-1/+3
* MIPS: Avoid an FPE exception in FCSR mask probingMaciej W. Rozycki2015-06-031-2/+1
* Merge branch '4.0-fixes' into mips-for-linux-nextRalf Baechle2015-04-131-0/+4
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| * MIPS: Add support for XPA.Steven J. Hill2015-03-191-0/+4
* | MIPS: Factor out FPU feature probingMaciej W. Rozycki2015-04-081-54/+71
* | MIPS: Respect the ISA level in FCSR handlingMaciej W. Rozycki2015-04-081-0/+53
* | MIPS: math-emu: Set FIR feature flags for full emulationMaciej W. Rozycki2015-04-081-2/+23
* | MIPS: Correct ISA masking in FPU feature determinationMaciej W. Rozycki2015-04-081-1/+3
* | MIPS: Clarify the comment for `__cpu_has_fpu'Maciej W. Rozycki2015-04-081-1/+1
* | MIPS: Add R16000 detectionJoshua Kinard2015-04-011-2/+7
* | MIPS: Add arch CDMM definitions and probingJames Hogan2015-03-311-0/+2
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* MIPS: Add set/clear CP0 macros for PageGrain registerSteven J. Hill2015-02-201-1/+1
* MIPS: Add LLB bit and related feature for the Config 5 CP0 registerMarkos Chandras2015-02-171-0/+2
* MIPS: kernel: cpu-probe.c: Add support for MIPS R6Leonid Yegoshin2015-02-171-4/+16
* MIPS: Add MIPS generic QEMU probe supportLeonid Yegoshin2015-02-161-0/+5
* MIPS: HTW: Prevent accidental HTW start due to nested htw_{start, stop}Markos Chandras2015-02-161-1/+3
* Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linusLinus Torvalds2014-12-121-4/+67
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| * MIPS: BMIPS: Add PRId for BMIPS5200 (Whirlwind)Kevin Cernekee2014-11-241-0/+1
| * MIPS: Ensure Config5.UFE is clear on bootPaul Burton2014-11-241-1/+1
| * MIPS: detect presence of the FRE & UFR bitsPaul Burton2014-11-241-0/+2
| * MIPS: cpu: Add 'noftlb' kernel command line option to disable the FTLBMarkos Chandras2014-11-241-2/+62
| * MIPS: Remove useless parenthesesRalf Baechle2014-11-241-1/+1
* | MIPS: cpu-probe: Set the FTLB probability bit on supported coresMarkos Chandras2014-11-241-1/+32
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* MIPS: Loongson: Set Loongson-3's ISA level to MIPS64R1Huacai Chen2014-11-191-1/+4
* MIPS: Loongson: Fix the write-combine CCA value settingHuacai Chen2014-11-191-1/+1
* MIPS: cpu-probe: Set the write-combine CCA value on per core basisMarkos Chandras2014-09-221-0/+21
* MIPS: detect presence of MAARsPaul Burton2014-08-021-0/+2
* MIPS: ensure MSA gets disabled during bootPaul Burton2014-08-021-3/+2
* MIPS: kernel: cpu-probe: Detect unique RI/XI exceptionsLeonid Yegoshin2014-08-021-0/+9
* MIPS: kernel: cpu-probe: Add support for the HardWare Table WalkerMarkos Chandras2014-08-021-0/+23
* MIPS: Add Loongson-3B supportHuacai Chen2014-07-301-0/+6
* MIPS: Add function get_ebase_cpunumDavid Daney2014-05-301-1/+1
* MIPS: Implement random_get_entropy with CP0 RandomMaciej W. Rozycki2014-05-301-0/+1
* MIPS: Netlogic: Add support for XLP5XXYonghong Song2014-05-301-0/+1
* MIPS: MT: Remove SMTC supportRalf Baechle2014-05-241-1/+1
* MIPS: RM9000: Remove support for probing the CPU core.Ralf Baechle2014-05-231-15/+0
* MIPS: Fix core number detection for MT coresPaul Burton2014-03-311-1/+5
* MIPS: Loongson: Add basic Loongson-3 CPU supportHuacai Chen2014-03-311-3/+9
* MIPS: Loongson: Rename PRID_IMP_LOONGSON1 and PRID_IMP_LOONGSON2Huacai Chen2014-03-311-2/+2
* MIPS: cpu-probe: Add support for probing M5150 coresLeonid Yegoshin2014-03-261-0/+4
* MIPS: kernel: cpu-probe: Enable EVA option on supported coresMarkos Chandras2014-03-261-0/+3
* MIPS: Allow FTLB to be turned on for CPU_P5600James Hogan2014-03-261-5/+7
* MIPS: Add MIPS P5600 probe supportJames Hogan2014-03-261-0/+4
* MIPS: Warn if vector register partitioning is implementedPaul Burton2014-03-261-1/+4
* MIPS: Detect the MSA ASEPaul Burton2014-03-261-0/+22
* MIPS: Coherent Processing System SMP implementationPaul Burton2014-03-261-0/+2
* MIPS: Add 1074K CPU support explicitly.Steven J. Hill2014-03-061-1/+1
* MIPS: Netlogic: Identify XLP 9XX chipJayachandran C2014-01-241-0/+1
* MIPS: kernel: cpu-probe: Add support for probing interAptiv coresLeonid Yegoshin2014-01-221-0/+8
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