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path: root/arch/mips/kernel/cpu-probe.c (follow)
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* MIPS: Set ELF AT_PLATFORM string for Loongson2 processorsRobert Millan2011-05-191-0/+10
* MIPS: Set ELF AT_PLATFORM string for BMIPS processorsKevin Cernekee2011-05-191-0/+5
* MIPS: Introduce set_elf_platform() helper functionRobert Millan2011-05-191-4/+8
* MIPS: Netlogic XLR/XLS processor IDs.Jayachandran C2011-05-191-0/+56
* MIPS: Probe for presence of KScratch registers.David Daney2011-01-181-0/+2
* MIPS: Fix regression on BCM4710 processor detectionKevin Cernekee2010-12-161-5/+2
* MIPS: Make TASK_SIZE reflect proper size for both 32 and 64 bit processes.David Daney2010-10-291-0/+13
* MIPS: Decouple BMIPS CPU support from bcm47xx/bcm63xx SoC codeKevin Cernekee2010-10-291-29/+33
* MIPS: Octeon: Probe for Octeon II CPUs.David Daney2010-10-291-0/+7
* MIPS: Decode core number for R2 CPUs.David Daney2010-08-051-0/+3
* MIPS: JZ4740: Add base support for Ingenic JZ4740 System-on-a-ChipLars-Peter Clausen2010-08-051-0/+20
* MIPS: nofpu and nodsp only affect CPU0Kevin Cernekee2010-05-211-0/+30
* MIPS: Give Octeon+ CPUs their own cputype.David Daney2010-02-271-2/+7
* MIPS: Set __elf_platform for Octeon.David Daney2010-02-271-0/+2
* MIPS: Allow the auxv's elf_platform entry to be set.David Daney2010-02-271-0/+1
* MIPS: Cleanup switches with cases that can be mergedRoel Kluin2010-02-271-3/+0
* MIPS: Decode c0_config4 for large TLBs.David Daney2010-02-271-0/+15
* MIPS: Don't probe reserved EntryHi bits.David Daney2010-02-101-2/+2
* MIPS: 64-bit: Detect virtual memory sizeGuenter Roeck2010-02-021-0/+11
* MIPS: Loongson 2F: Add CPU frequency scaling supportWu Zhangjin2009-12-171-0/+2
* MIPS: SPRAM: Clean up support code a littleChris Dearman2009-11-021-7/+1
* MIPS: BCM63xx: Add Broadcom 63xx CPU definitions.Maxime Bizon2009-09-171-0/+23
* MIPS: Remove useless zero initializations.Ralf Baechle2009-09-171-2/+2
* MIPS: Alchemy: get rid of allow_au1k_waitManuel Lauss2009-09-171-8/+5
* MIPS: Build fix - include <linux/smp.h> into all smp_processor_id() users.Ralf Baechle2009-06-241-0/+1
* MIPS: Alchemy: unify CPU model constants.Manuel Lauss2009-03-301-17/+4
* MIPS: NEC VR5500 processor support fixupShinya Kuribayashi2009-03-111-0/+1
* MIPS: Alchemy: RTC counter clocksource / clockevent support.Manuel Lauss2009-01-111-2/+4
* MIPS: Add Cavium OCTEON processor constants and CPU probe.David Daney2009-01-111-0/+25
* MIPS: Sort out CPU type to name translation.Ralf Baechle2008-10-301-127/+98
* MIPS: Probe for watch registers on cores of all vendors, not just MTI.Ralf Baechle2008-10-301-10/+12
* MIPS: Probe watch registers and report configuration.David Daney2008-10-111-0/+2
* [MIPS] SMTC: Fix SMTC dyntick support.Kevin D. Kissell2008-10-031-3/+7
* [MIPS] Fix potential latency problem due to non-atomic cpu_wait.Atsushi Nemoto2008-09-211-14/+2
* [MIPS] Move arch/mips/philips to arch/mips/nxpDaniel Laird2008-04-281-4/+4
* [MIPS] Add support for MIPS CMP platform.Ralf Baechle2008-04-281-0/+5
* [MIPS] Basic SPRAM supportChris Dearman2008-04-281-0/+8
* [MIPS] Fix loads of section missmatchesRalf Baechle2008-03-121-5/+5
* [MIPS] Alchemy: Au1210/Au1250 CPU supportManuel Lauss2008-01-291-0/+9
* [MIPS] Fix shadow register support.Ralf Baechle2007-11-161-0/+5
* [MIPS] Add BUG_ON assertion for attempt to run kernel on the wrong CPU type.Franck Bui-Huu2007-10-121-0/+8
* [MIPS] Make facility to convert CPU types to strings generally available.Ralf Baechle2007-10-121-2/+91
* [MIPS] Sibyte: Replace SB1 cachecode with standard R4000 class cache code.Ralf Baechle2007-10-121-8/+0
* [MIPS] Add support for BCM47XX CPUs.Aurelien Jarno2007-10-121-0/+20
* [MIPS] 20Kc: Disable use of WAIT instruction.Ralf Baechle2007-09-141-1/+8
* [MIPS] Workaround for RM7000 WAIT instruction aka erratum 38Ralf Baechle2007-07-201-1/+25
* [MIPS] PMC MSP71xx mips commonMarc St-Jean2007-07-101-0/+20
* [MIPS] define Hit_Invalidate_I to Index_Invalidate_I for loongson2Fuxin Zhang2007-07-101-0/+8
* [MIPS] Enable support for the userlocal hardware registerRalf Baechle2007-07-101-0/+2
* [MIPS] Fix scheduling latency issue on 24K, 34K and 74K coresRalf Baechle2007-07-061-2/+13