summaryrefslogtreecommitdiffstats
path: root/arch/mips/kernel/mips-cm.c (follow)
Commit message (Expand)AuthorAgeFilesLines
* MIPS: CPS: Have asm/mips-cps.h include CM & CPC headersPaul Burton2017-08-301-1/+1
* MIPS: CM: Add cluster & block args to mips_cm_lock_other()Paul Burton2017-08-301-3/+16
* MIPS: Abstract CPU core & VP(E) ID access through accessor functionsPaul Burton2017-08-301-2/+2
* MIPS: CPS: Use change_*, set_* & clear_* where appropriatePaul Burton2017-08-301-3/+1
* MIPS: CM: Use BIT/GENMASK for register fields, order & drop shiftsPaul Burton2017-08-291-24/+24
* MIPS: CM: Specify register size when generating accessorsPaul Burton2017-08-291-6/+3
* MIPS: CM: Rename mips_cm_base to mips_gcr_basePaul Burton2017-08-291-5/+5
* MIPS: CM: WARN on attempt to lock invalid VP, not BUGPaul Burton2017-06-291-1/+1
* MIPS: CM: Avoid per-core locking with CM3 & higherPaul Burton2017-06-291-6/+32
* tree-wide: replace config_enabled() with IS_ENABLED()Masahiro Yamada2016-08-041-1/+1
* MIPS: Fix misspellings in comments.Adam Buchbinder2016-04-031-1/+1
* MIPS: CM, CPC: Ensure core-other GCRs reflect the correct corePaul Burton2015-11-111-0/+6
* MIPS: CM: Introduce core-other locking functionsPaul Burton2015-11-111-0/+39
* MIPS: Always read full 64 bit CM error GCRs for CM3Paul Burton2015-10-261-34/+36
* MIPS: Avoid buffer overrun in mips_cm_error_reportPaul Burton2015-10-261-0/+2
* MIPS: Don't read GCRs when a CM is not presentPaul Burton2015-10-261-7/+10
* MIPS: CM: Add support for reporting CM cache errorsMarkos Chandras2015-08-261-0/+244
* MIPS: CM: The CMGCRBase register is 64-bit on 64 bit kernels.Markos Chandras2015-08-261-1/+1
* MIPS: mips-cm: Extend CM accessors for 64-bit CPUsMarkos Chandras2015-08-261-0/+4
* MIPS: Add platform callback before initializing the L2 cacheMarkos Chandras2015-08-261-0/+7
* MIPS: Replace use of phys_t with phys_addr_t.Ralf Baechle2014-11-241-6/+6
* MIPS: Add generic CM probe & access codePaul Burton2014-03-061-0/+121