summaryrefslogtreecommitdiffstats
path: root/arch/mips/kernel/pm-cps.c (follow)
Commit message (Expand)AuthorAgeFilesLines
* MIPS: pm-cps: Generate idle state entry code when CPUs are onlinedPaul Burton2016-10-051-26/+19
* MIPS: pm-cps: Support CM3 changes to Coherence Enable RegisterMatt Redfearn2016-10-041-13/+18
* MIPS: pm-cps: Add MIPSr6 CPU supportMatt Redfearn2016-10-041-4/+18
* MIPS: pm-cps: Remove selection of sync typesMatt Redfearn2016-10-041-19/+0
* MIPS: pm-cps: Use MIPS standard completion barrierMatt Redfearn2016-10-041-5/+5
* MIPS: pm-cps: Use MIPS standard lightweight ordering barrierMatt Redfearn2016-10-041-7/+5
* MIPS: pm-cps: Update comments on barrier instructionsMatt Redfearn2016-10-041-8/+8
* MIPS: pm-cps: Change FSB workaround to CPU blacklistMatt Redfearn2016-10-041-7/+2
* tree-wide: replace config_enabled() with IS_ENABLED()Masahiro Yamada2016-08-041-2/+2
* MIPS: pm-cps: Avoid offset overflow on MIPSr6Markos Chandras2016-05-131-4/+11
* MIPS: Fix misspellings in comments.Adam Buchbinder2016-04-031-1/+1
* MIPS: Add cases for CPU_I6400Markos Chandras2015-08-261-0/+2
* MIPS: {pm,smp}-cps: use cpu_vpe_id macroPaul Burton2014-07-301-1/+1
* MIPS: pm-cps: Prevent use of mips_cps_* without CPS SMPPaul Burton2014-07-301-0/+8
* MIPS: pm-cps: convert smp_mb__*()Paul Burton2014-06-161-2/+2
* MIPS: pm-cps: add PM state entry code for CPS systemsPaul Burton2014-05-281-0/+716