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* MIPS: Lantiq: Fix cascaded IRQ setupFelix Fietkau2017-02-131-21/+17
* MIPS: Lantiq: Lock DMA register accesses for SMPHauke Mehrtens2017-01-251-18/+20
* MIPS: Lantiq: Fix another request_mem_region() return code checkArnd Bergmann2017-01-251-2/+2
* MIPS: Lantiq: Fix mask of GPE frequencyHauke Mehrtens2016-12-111-1/+1
* MIPS: Lantiq: Make xrx200_phy_fw explicitly non-modularPaul Gortmaker2016-10-041-8/+4
* MIPS: Lantiq: Make vmmc explicitly non-modularPaul Gortmaker2016-10-041-4/+2
* Merge branch '4.7-fixes' into mips-for-linux-nextRalf Baechle2016-08-031-1/+1
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| * MIPS: Lantiq: Register IRQ handler for virtual IRQ numberHauke Mehrtens2016-07-241-1/+1
| * MIPS: Lantiq: Fix eiu interrupt loading codeJohn Crispin2016-07-241-9/+10
* | MIPS: Lantiq: Fix build failureSudip Mukherjee2016-08-031-2/+2
* | MIPS: store the appended dtb address in a variableJonas Gorski2016-08-021-2/+2
* | MIPS: Lantiq: Use the real EXIN countJohn Crispin2016-07-241-3/+3
* | MIPS: Lantiq: Fix eiu interrupt loading codeJohn Crispin2016-07-241-9/+10
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* MIPS: Change my email addressJohn Crispin2016-05-1319-20/+20
* MIPS: Lantiq: Make it possible to build in no device treeHauke Mehrtens2016-05-131-1/+11
* MIPS: Lantiq: Add support for device tree file from boot loaderHauke Mehrtens2016-05-131-2/+11
* MIPS: lantiq: Make reset_control_ops constPhilipp Zabel2016-05-131-1/+1
* MIPS: Make MIPS_CMDLINE_DTB defaultJonas Gorski2015-11-111-2/+0
* MIPS: lantiq: Disable xbar fpi burst modeJohn Crispin2015-11-111-0/+41
* MIPS: lantiq: Force the crossbar to big endianJohn Crispin2015-11-111-0/+8
* MIPS: lantiq: Initialize the USB core on bootJohn Crispin2015-11-111-0/+74
* MIPS: lantiq: Return correct value for fpi clock on ar9John Crispin2015-11-111-2/+3
* MIPS: Lantiq: Fix check for return value of request_mem_region()Hauke Mehrtens2015-11-113-11/+11
* MIPS: Lantiq: Add support for xRX220 SoCHauke Mehrtens2015-11-111-0/+7
* MIPS: Lantiq: Add misc clocksHauke Mehrtens2015-11-111-1/+3
* MIPS: Lantiq: Add 1e103100.deu clockHauke Mehrtens2015-11-111-0/+6
* MIPS: Lantiq: Add clock for mei driverHauke Mehrtens2015-11-111-0/+6
* MIPS: Lantiq: Add SoC detection for ar10 and grx390Hauke Mehrtens2015-11-111-2/+26
* MIPS: Lantiq: Add support for gphy firmware loading for ar10 and grx390Hauke Mehrtens2015-11-111-20/+92
* MIPS: Lantiq: Add pmu bits for ar10 and grx390Hauke Mehrtens2015-11-111-1/+56
* MIPS: Lantiq: Add PMU bits for USB and SDIO devicesHauke Mehrtens2015-11-111-1/+23
* MIPS: Lantiq: Deactivate most of the devices by defaultHauke Mehrtens2015-11-111-21/+28
* MIPS: Lantiq: Add clock detection for grx390 and ar10Hauke Mehrtens2015-11-112-1/+167
* MIPS: Lantiq: Fix pp32 clock on vr9Hauke Mehrtens2015-11-112-3/+8
* MIPS: Lantiq: Rename CGU_SYS_VR9 registerHauke Mehrtens2015-11-111-4/+5
* MIPS: Lantiq: Add support for setting PMU register on AR10 and GRX390Hauke Mehrtens2015-11-111-11/+73
* MIPS: Lantiq: Add locking for PMU register and check status afterwardsHauke Mehrtens2015-11-111-5/+27
* MIPS: lantiq: add clk_round_rate()Hauke Mehrtens2015-11-111-0/+17
* MIPS: Export get_c0_perfcount_int()Felix Fietkau2015-08-031-0/+1
* MIPS: SMP: Don't increment irq_count multiple times for call function IPIsAlex Smith2015-08-031-1/+1
* MIPS: mark prom_free_prom_memory() everywhere with __initAaro Koskinen2015-04-011-1/+1
* MIPS: lantiq: xway: drop owner assignment from platform_driversWolfram Sang2015-04-011-1/+0
* Merge tag 'driver-core-3.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel...Linus Torvalds2014-12-154-4/+0
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| * mips: lantiq: xway: drop owner assignment from platform_driversWolfram Sang2014-10-204-4/+0
* | MIPS: lantiq: add missing spi clock on falcon SoCJohn Crispin2014-11-241-0/+2
* | MIPS: lantiq: the detection of the gpe clock is brokenJohn Crispin2014-11-241-5/+4
* | MIPS: lantiq: copy the commandline from the devicetreeJohn Crispin2014-11-241-0/+2
* | MIPS: lantiq: move eiu init after irq_domain registerJohn Crispin2014-11-241-24/+24
* | MIPS: lantiq: export soc typeJohn Crispin2014-11-241-0/+5
* | MIPS: lantiq: add support for xrx200 firmware depending on soc typeJohn Crispin2014-11-241-1/+22