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* Merge tag 'mips_4.15' of ↵Linus Torvalds2017-11-151-4/+2
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/jhogan/mips Pull MIPS updates from James Hogan: "These are the main MIPS changes for 4.15. Fixes: - ralink: Fix MT7620 PCI build issues (4.5) - Disable cmpxchg64() and HAVE_VIRT_CPU_ACCOUNTING_GEN for 32-bit SMP (4.1) - Fix MIPS64 FP save/restore on 32-bit kernels (4.0) - ptrace: Pick up ptrace/seccomp changed syscall numbers (3.19) - ralink: Fix MT7628 pinmux (3.19) - BCM47XX: Fix LED inversion on WRT54GSv1 (3.17) - Fix n32 core dumping as o32 since regset support (3.13) - ralink: Drop obsolete USB_ARCH_HAS_HCD select Build system: - Default to "generic" (multiplatform) system type instead of IP22 - Use generic little endian MIPS32 r2 configuration as default defconfig instead of ip22_defconfig FPU emulation: - Fix exception generation for certain R6 FPU instructions SMP: - Allow __cpu_number_map to be larger than NR_CPUS for sparse CPU id spaces Miscellaneous: - Add iomem resource for kernel bss section for kexec/kdump - Atomics: Nudge writes on bit unlock - DT files: Standardise "ok" -> "okay" Minor cleanups: - Define virt_to_pfn() - Make thread_saved_pc static - Simplify 32-bit sign extension in __read_64bit_c0_split() - DMA: Use vma_pages() helper - FPU emulation: Replace unsigned with unsigned int - MM: Removed unused lastpfn - Alchemy: Make clk_ops const - Lasat: Use setup_timer() helper - ralink: Use BIT() in MT7620 PCI driver Platform support: BMIPS: - Enable HARDIRQS_SW_RESEND Broadcom BCM63XX: - Add clkdev lookup support - Update clk driver, UART driver, DTs to handle named refclk from DTs - Split apart various clocks to more closely match hardware - Add ethernet clocks Cavium Octeon: - Remove usage of cvmx_wait() in favour of __delay() ImgTec Pistachio: - DT: Drop deprecated dwmmc num-slots property Ingenic JZ4780: - Add NFS root to Ci20 defconfig - Add watchdog to Ci20 DT & defconfig, and allow building of watchdog driver with this SoC Generic (multiplatform): - Migrate xilfpga (MIPSfpga) platform to the generic platform Lantiq xway: - Fix ASC0/ASC1 clocks" * tag 'mips_4.15' of git://git.kernel.org/pub/scm/linux/kernel/git/jhogan/mips: (46 commits) MIPS: Add iomem resource for kernel bss section. MIPS: cmpxchg64() and HAVE_VIRT_CPU_ACCOUNTING_GEN don't work for 32-bit SMP MIPS: BMIPS: Enable HARDIRQS_SW_RESEND MIPS: pci: Make use of the BIT() macro inside the mt7620 driver MIPS: pci: Remove KERN_WARN instance inside the mt7620 driver MIPS: pci: Remove duplicate define in mt7620 driver MIPS: ralink: Fix typo in mt7628 pinmux function MIPS: ralink: Fix MT7628 pinmux MIPS: Fix odd fp register warnings with MIPS64r2 watchdog: jz4780: Allow selection of jz4740-wdt driver MIPS/ptrace: Update syscall nr on register changes MIPS/ptrace: Pick up ptrace/seccomp changed syscalls MIPS: Fix an n32 core file generation regset support regression MIPS: Fix MIPS64 FP save/restore on 32-bit kernels MIPS: page.h: Define virt_to_pfn() MIPS: Xilfpga: Switch to using generic defconfigs MIPS: generic: Add support for MIPSfpga MIPS: Set defconfig target to a generic system for 32r2el MIPS: Kconfig: Set default MIPS system type as generic MIPS: DTS: Remove num-slots from Pistachio SoC ...
| * MIPS: Lantiq: Fix ASC0/ASC1 clocksMartin Schiller2017-11-071-4/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ASC1 is available on every Lantiq SoC (also AmazonSE) and should be enabled like the other generic xway clocks instead of ASC0, which is only available for AR9 and Danube. Signed-off-by: Martin Schiller <ms@dev.tdt.de> Acked-by: Hauke Mehrtens <hauke@hauke-m.de> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: John Crispin <john@phrozen.org> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Felix Fietkau <nbd@nbd.name> Cc: Martin Schiller <ms@dev.tdt.de> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/16145/ [jhogan@kernel.org: Drop braces] Signed-off-by: James Hogan <jhogan@kernel.org>
* | License cleanup: add SPDX GPL-2.0 license identifier to files with no licenseGreg Kroah-Hartman2017-11-021-0/+1
|/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Many source files in the tree are missing licensing information, which makes it harder for compliance tools to determine the correct license. By default all files without license information are under the default license of the kernel, which is GPL version 2. Update the files which contain no license information with the 'GPL-2.0' SPDX license identifier. The SPDX identifier is a legally binding shorthand, which can be used instead of the full boiler plate text. This patch is based on work done by Thomas Gleixner and Kate Stewart and Philippe Ombredanne. How this work was done: Patches were generated and checked against linux-4.14-rc6 for a subset of the use cases: - file had no licensing information it it. - file was a */uapi/* one with no licensing information in it, - file was a */uapi/* one with existing licensing information, Further patches will be generated in subsequent months to fix up cases where non-standard license headers were used, and references to license had to be inferred by heuristics based on keywords. The analysis to determine which SPDX License Identifier to be applied to a file was done in a spreadsheet of side by side results from of the output of two independent scanners (ScanCode & Windriver) producing SPDX tag:value files created by Philippe Ombredanne. Philippe prepared the base worksheet, and did an initial spot review of a few 1000 files. The 4.13 kernel was the starting point of the analysis with 60,537 files assessed. Kate Stewart did a file by file comparison of the scanner results in the spreadsheet to determine which SPDX license identifier(s) to be applied to the file. She confirmed any determination that was not immediately clear with lawyers working with the Linux Foundation. Criteria used to select files for SPDX license identifier tagging was: - Files considered eligible had to be source code files. - Make and config files were included as candidates if they contained >5 lines of source - File already had some variant of a license header in it (even if <5 lines). All documentation files were explicitly excluded. The following heuristics were used to determine which SPDX license identifiers to apply. - when both scanners couldn't find any license traces, file was considered to have no license information in it, and the top level COPYING file license applied. For non */uapi/* files that summary was: SPDX license identifier # files ---------------------------------------------------|------- GPL-2.0 11139 and resulted in the first patch in this series. If that file was a */uapi/* path one, it was "GPL-2.0 WITH Linux-syscall-note" otherwise it was "GPL-2.0". Results of that was: SPDX license identifier # files ---------------------------------------------------|------- GPL-2.0 WITH Linux-syscall-note 930 and resulted in the second patch in this series. - if a file had some form of licensing information in it, and was one of the */uapi/* ones, it was denoted with the Linux-syscall-note if any GPL family license was found in the file or had no licensing in it (per prior point). Results summary: SPDX license identifier # files ---------------------------------------------------|------ GPL-2.0 WITH Linux-syscall-note 270 GPL-2.0+ WITH Linux-syscall-note 169 ((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) 21 ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) 17 LGPL-2.1+ WITH Linux-syscall-note 15 GPL-1.0+ WITH Linux-syscall-note 14 ((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) 5 LGPL-2.0+ WITH Linux-syscall-note 4 LGPL-2.1 WITH Linux-syscall-note 3 ((GPL-2.0 WITH Linux-syscall-note) OR MIT) 3 ((GPL-2.0 WITH Linux-syscall-note) AND MIT) 1 and that resulted in the third patch in this series. - when the two scanners agreed on the detected license(s), that became the concluded license(s). - when there was disagreement between the two scanners (one detected a license but the other didn't, or they both detected different licenses) a manual inspection of the file occurred. - In most cases a manual inspection of the information in the file resulted in a clear resolution of the license that should apply (and which scanner probably needed to revisit its heuristics). - When it was not immediately clear, the license identifier was confirmed with lawyers working with the Linux Foundation. - If there was any question as to the appropriate license identifier, the file was flagged for further research and to be revisited later in time. In total, over 70 hours of logged manual review was done on the spreadsheet to determine the SPDX license identifiers to apply to the source files by Kate, Philippe, Thomas and, in some cases, confirmation by lawyers working with the Linux Foundation. Kate also obtained a third independent scan of the 4.13 code base from FOSSology, and compared selected files where the other two scanners disagreed against that SPDX file, to see if there was new insights. The Windriver scanner is based on an older version of FOSSology in part, so they are related. Thomas did random spot checks in about 500 files from the spreadsheets for the uapi headers and agreed with SPDX license identifier in the files he inspected. For the non-uapi files Thomas did random spot checks in about 15000 files. In initial set of patches against 4.14-rc6, 3 files were found to have copy/paste license identifier errors, and have been fixed to reflect the correct identifier. Additionally Philippe spent 10 hours this week doing a detailed manual inspection and review of the 12,461 patched files from the initial patch version early this week with: - a full scancode scan run, collecting the matched texts, detected license ids and scores - reviewing anything where there was a license detected (about 500+ files) to ensure that the applied SPDX license was correct - reviewing anything where there was no detection but the patch license was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied SPDX license was correct This produced a worksheet with 20 files needing minor correction. This worksheet was then exported into 3 different .csv files for the different types of files to be modified. These .csv files were then reviewed by Greg. Thomas wrote a script to parse the csv files and add the proper SPDX tag to the file, in the format that the file expected. This script was further refined by Greg based on the output to detect more types of files automatically and to distinguish between header and source .c files (which need different comment types.) Finally Greg ran the script using the .csv files to generate the patches. Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* MIPS: lantiq: Remove the arch/mips/lantiq/xway/reset.c implementationMartin Blumenstingl2017-09-043-148/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | The RCU register are now access through separates drivers. remove the last pieces of the old implementation. The GPHY reset bits are now set by the GPHY driver which registers a reboot notifier. The reboot is triggered by a syscon-reboot driver and the MIPS specific parts are done by the generic MIPS implementation in arch/mips/kernel/reset.c. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Cc: john@phrozen.org Cc: robh@kernel.org Cc: andy.shevchenko@gmail.com Cc: p.zabel@pengutronix.de Cc: kishon@ti.com Cc: mark.rutland@arm.com Cc: linux-mips@linux-mips.org Cc: linux-mtd@lists.infradead.org Cc: linux-watchdog@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-spi@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/17131/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: lantiq: remove old USB PHY initialisationHauke Mehrtens2017-09-041-43/+0
| | | | | | | | | | | | | | | | | | | | This is now done in a PHY driver. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Cc: martin.blumenstingl@googlemail.com Cc: john@phrozen.org Cc: robh@kernel.org Cc: andy.shevchenko@gmail.com Cc: p.zabel@pengutronix.de Cc: kishon@ti.com Cc: mark.rutland@arm.com Cc: linux-mips@linux-mips.org Cc: linux-mtd@lists.infradead.org Cc: linux-watchdog@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-spi@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/17130/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* phy: Add an USB PHY driver for the Lantiq SoCs using the RCU moduleHauke Mehrtens2017-09-041-18/+18
| | | | | | | | | | | | | | | | | | | | | | This driver starts the DWC2 core(s) built into the XWAY SoCs and provides the PHY interfaces for each core. The phy instances can be passed to the dwc2 driver, which already supports the generic phy interface. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Acked-by: Kishon Vijay Abraham I <kishon@ti.com> Acked-by: Rob Herring <robh@kernel.org> Cc: martin.blumenstingl@googlemail.com Cc: john@phrozen.org Cc: andy.shevchenko@gmail.com Cc: p.zabel@pengutronix.de Cc: mark.rutland@arm.com Cc: linux-mips@linux-mips.org Cc: linux-mtd@lists.infradead.org Cc: linux-watchdog@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-spi@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/17127/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: lantiq: remove old GPHY loader codeHauke Mehrtens2017-09-043-221/+0
| | | | | | | | | | | | | | | | | | | | | The GPHY loader was replaced by a new more flexible driver. Remove the old driver. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Cc: martin.blumenstingl@googlemail.com Cc: john@phrozen.org Cc: robh@kernel.org Cc: andy.shevchenko@gmail.com Cc: p.zabel@pengutronix.de Cc: kishon@ti.com Cc: mark.rutland@arm.com Cc: linux-mips@linux-mips.org Cc: linux-mtd@lists.infradead.org Cc: linux-watchdog@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-spi@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/17129/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: lantiq: Add a GPHY driver which uses the RCU syscon-mfdMartin Blumenstingl2017-09-041-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | Compared to the old xrx200_phy_fw driver the new version has multiple enhancements. The name of the firmware files does not have to be added to all .dts files anymore - one now configures the GPHY mode (FE or GE) instead. Each GPHY can now also boot separate firmware (thus mixing of GE and FE GPHYs is now possible). The new implementation is based on the RCU syscon-mfd and uses the reeset_controller framework instead of raw RCU register reads/writes. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Cc: john@phrozen.org Cc: p.zabel@pengutronix.de Cc: kishon@ti.com Cc: mark.rutland@arm.com Cc: linux-mips@linux-mips.org Cc: linux-mtd@lists.infradead.org Cc: linux-watchdog@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-spi@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/17128/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: lantiq: remove old reset controller implementationHauke Mehrtens2017-09-041-68/+0
| | | | | | | | | | | | | | | | | | | | | This code is now replaced by a reset controller in drivers/reset/reset- lantiq-rcu.c. The old code was never used anyway. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Cc: martin.blumenstingl@googlemail.com Cc: john@phrozen.org Cc: robh@kernel.org Cc: andy.shevchenko@gmail.com Cc: p.zabel@pengutronix.de Cc: kishon@ti.com Cc: mark.rutland@arm.com Cc: linux-mips@linux-mips.org Cc: linux-mtd@lists.infradead.org Cc: linux-watchdog@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-spi@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/17124/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: lantiq: Replace ltq_boot_select() with dummy implementation.Ralf Baechle2017-09-041-5/+5
| | | | | | | This will only be used until the last usage of ltq_boot_select() has been removed. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: lantiq: remove ltq_reset_cause() and ltq_boot_select()Hauke Mehrtens2017-09-042-32/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | Do not export the ltq_reset_cause() and ltq_boot_select() function any more. ltq_reset_cause() was accessed by the watchdog driver before to see why the last reset happened, this is now done through direct access of the register over regmap. The bits in this register are anyway different between the xrx200 and the falcon SoC. ltq_boot_select() is not used any more and was used by the flash drivers to check if the system was booted from this flash type, now the drivers should depend on the device tree only. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Cc: john@phrozen.org Cc: robh@kernel.org Cc: andy.shevchenko@gmail.com Cc: p.zabel@pengutronix.de Cc: kishon@ti.com Cc: mark.rutland@arm.com Cc: linux-mips@linux-mips.org Cc: linux-mtd@lists.infradead.org Cc: linux-watchdog@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-spi@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/17126/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: lantiq: Convert the fpi bus driver to a platform_driverHauke Mehrtens2017-09-042-45/+0
| | | | | | | | | | | | | | | | | | | | | | | | Instead of hacking the configuration of the FPI bus into the arch code add an own bus driver for this internal bus. The FPI bus is the main bus of the SoC. This bus driver makes sure the bus is configured correctly before the child drivers are getting initialized. This driver will probably also be used on different SoCs later. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Cc: john@phrozen.org Cc: p.zabel@pengutronix.de Cc: kishon@ti.com Cc: mark.rutland@arm.com Cc: linux-mips@linux-mips.org Cc: linux-mtd@lists.infradead.org Cc: linux-watchdog@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-spi@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/17122/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: lantiq: Enable MFD_SYSCON to be able to use it for the RCU MFDMartin Blumenstingl2017-09-041-0/+1
| | | | | | | | | | | | | | | | | | Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Cc: john@phrozen.org Cc: robh@kernel.org Cc: andy.shevchenko@gmail.com Cc: p.zabel@pengutronix.de Cc: kishon@ti.com Cc: mark.rutland@arm.com Cc: linux-mips@linux-mips.org Cc: linux-mtd@lists.infradead.org Cc: linux-watchdog@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-spi@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/17120/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: lantiq: Use of_platform_default_populate instead of __dt_register_busesMartin Blumenstingl2017-09-041-1/+1
| | | | | | | | | | | | | | | | | | | | | This allows populating syscon devices which are using "simple-mfd" instead of "simple-bus". Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Cc: john@phrozen.org Cc: robh@kernel.org Cc: andy.shevchenko@gmail.com Cc: p.zabel@pengutronix.de Cc: kishon@ti.com Cc: mark.rutland@arm.com Cc: linux-mips@linux-mips.org Cc: linux-mtd@lists.infradead.org Cc: linux-watchdog@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-spi@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/17116/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Use mips_gic_present() in place of gic_presentPaul Burton2017-09-041-4/+0
| | | | | | | | | | | | | | | | | In preparation for removing the gic_present global variable, switch to using the mips_gic_present() function instead. For the most part this is a straightforward substitution. In cases which previously wrapped the GIC case in an #ifdef CONFIG_MIPS_GIC that #ifdef has been removed, since mips_gic_present() will return a compile-time constant false allowing the affected code to be optimised out anyway. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/17044/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* clk: Provide dummy of_clk_get_from_provider() for compile-testingGeert Uytterhoeven2017-06-021-5/+0
| | | | | | | | | | | | | | When CONFIG_ON=n, dummies are provided for of_clk_get() and of_clk_get_by_name(), but not for of_clk_get_from_provider(). Provide a dummy for the latter, to improve the ability to do compile-testing. This requires removing the existing dummy in the Lantiq clock code. Fixes: 766e6a4ec602d0c1 ("clk: add DT clock binding support") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Thomas Langer <thomas.langer@intel.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
* MIPS: smp-mt: Use CPU interrupt controller IPI IRQ domain supportPaul Burton2017-04-121-52/+0
| | | | | | | | | | | | | | | | | | | Remove the smp-mt IPI code that supported single-core multithreaded systems and instead make use of the IPI IRQ domain support provided by the MIPS CPU interrupt controller driver. This removes some less than nice code, the horrible split between arch & board code and the duplication that led to within board code. The lantiq portion of this patch has only been compile tested. Malta has been tested & is functional. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/15837/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Lantiq: fix missing xbar kernel panicHauke Mehrtens2017-03-211-1/+1
| | | | | | | | | | | | | | | | | | | | | | | Commit 08b3c894e565 ("MIPS: lantiq: Disable xbar fpi burst mode") accidentally requested the resources from the pmu address region instead of the xbar registers region, but the check for the return value of request_mem_region() was wrong. Commit 98ea51cb0c8c ("MIPS: Lantiq: Fix another request_mem_region() return code check") fixed the check of the return value of request_mem_region() which made the kernel panics. This patch now makes use of the correct memory region for the cross bar. Fixes: 08b3c894e565 ("MIPS: lantiq: Disable xbar fpi burst mode") Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Cc: John Crispin <john@phrozen.org> Cc: james.hogan@imgtec.com Cc: arnd@arndb.de Cc: sergei.shtylyov@cogentembedded.com Cc: john@phrozen.org Cc: <stable@vger.kernel.org> # 4.4.x- Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/15751 Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Lantiq: Keep ethernet enabled during bootFelix Fietkau2017-02-171-4/+4
| | | | | | | | | | | | | | | | | | | Disabling ethernet during reboot (only to enable it again when the ethernet driver attaches) can put the chip into a faulty state where it corrupts the header of all incoming packets. This happens if packets arrive during the time window where the core is disabled, and it can be easily reproduced by rebooting while sending a flood ping to the broadcast address. Fixes: 95135bfa7ead ("MIPS: Lantiq: Deactivate most of the devices by default") Signed-off-by: Felix Fietkau <nbd@nbd.name> Acked-by: John Crispin <john@phrozen.org> Cc: hauke.mehrtens@lantiq.com Cc: linux-mips@linux-mips.org Cc: <stable@vger.kernel.org> # 4.4.x- Patchwork: https://patchwork.linux-mips.org/patch/15078/ Signed-off-by: James Hogan <james.hogan@imgtec.com>
* MIPS: lantiq: Set physical_memsizeHauke Mehrtens2017-02-151-0/+6
| | | | | | | | | | | | | | | | | physical_memsize is needed by the vpe loader code and the platform specific code has to define it. This value will be given to the firmware loaded with the VPE loader. I am not aware of any standard interface or better value to provide here. Reported-by: kbuild test robot <lkp@intel.com> Fixes: d9ae4f18c0d2 ("MIPS: Lantiq: Activate more drivers in default configuration") Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: John Crispin <john@phrozen.org> Cc: Paul Gortmaker <paul.gortmaker@windriver.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/14908/ Signed-off-by: James Hogan <james.hogan@imgtec.com>
* MIPS: Audit and remove any unnecessary uses of module.hPaul Gortmaker2017-02-142-4/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Historically a lot of these existed because we did not have a distinction between what was modular code and what was providing support to modules via EXPORT_SYMBOL and friends. That changed when we forked out support for the latter into the export.h file. This means we should be able to reduce the usage of module.h in code that is obj-y Makefile or bool Kconfig. In the case of some code where it is modular, we can extend that to also include files that are building basic support functionality but not related to loading or registering the final module; such files also have no need whatsoever for module.h The advantage in removing such instances is that module.h itself sources about 15 other headers; adding significantly to what we feed cpp, and it can obscure what headers we are effectively using. Since module.h might have been the implicit source for init.h (for __init) and for export.h (for EXPORT_SYMBOL) we consider each instance for the presence of either and replace/add as needed. Also note that MODULE_DEVICE_TABLE is a no-op for non-modular code. Build coverage of all the mips defconfigs revealed the module.h header was masking a couple of implicit include instances, so we add the appropriate headers there. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Cc: David Daney <david.daney@cavium.com> Cc: John Crispin <john@phrozen.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: "Steven J. Hill" <steven.hill@cavium.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/15131/ [james.hogan@imgtec.com: Preserve sort order where it already exists] Signed-off-by: James Hogan <james.hogan@imgtec.com>
* MIPS: Lantiq: Fix cascaded IRQ setupFelix Fietkau2017-02-131-21/+17
| | | | | | | | | | | | | | | | | | | | | | With the IRQ stack changes integrated, the XRX200 devices started emitting a constant stream of kernel messages like this: [ 565.415310] Spurious IRQ: CAUSE=0x1100c300 This is caused by IP0 getting handled by plat_irq_dispatch() rather than its vectored interrupt handler, which is fixed by commit de856416e714 ("MIPS: IRQ Stack: Fix erroneous jal to plat_irq_dispatch"). Fix plat_irq_dispatch() to handle non-vectored IPI interrupts correctly by setting up IP2-6 as proper chained IRQ handlers and calling do_IRQ for all MIPS CPU interrupts. Signed-off-by: Felix Fietkau <nbd@nbd.name> Acked-by: John Crispin <john@phrozen.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/15077/ [james.hogan@imgtec.com: tweaked commit message] Signed-off-by: James Hogan <james.hogan@imgtec.com>
* MIPS: Lantiq: Lock DMA register accesses for SMPHauke Mehrtens2017-01-251-18/+20
| | | | | | | | | | | | | | | | | | The DMA controller channel and port configuration is changed by selecting the port or channel in one register and then update the configuration in other registers. This has to be done in an atomic operation. Previously only the local interrupts were deactivated which works for single CPU systems. If the system supports SMP a better locking is needed, use spinlocks instead. On more recent SoCs (at least xrx200 and later) there are two memory regions to change the configuration, there we could use one area for each CPU and do not have to synchronize between the CPUs and more. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Cc: john@phrozen.org Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/14912/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Lantiq: Fix another request_mem_region() return code checkArnd Bergmann2017-01-251-2/+2
| | | | | | | | | | | | | | | | | Hauke already fixed a couple of them, but one instance remains that checks for a negative integer when it should check for a NULL pointer: arch/mips/lantiq/xway/sysctrl.c: In function 'ltq_soc_init': arch/mips/lantiq/xway/sysctrl.c:473:19: error: ordered comparison of pointer with integer zero [-Werror=extra] Fixes: 6e807852676a ("MIPS: Lantiq: Fix check for return value of request_mem_region()") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Cc: John Crispin <john@phrozen.org> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/15043/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Lantiq: Fix mask of GPE frequencyHauke Mehrtens2016-12-111-1/+1
| | | | | | | | | | | | | The hardware documentation says bit 11:10 are used for the GPE frequency selection. Fix the mask in the define to match these bits. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Reviewed-by: Thomas Langer <thomas.langer@intel.com> Cc: linux-mips@linux-mips.org Cc: john@phrozen.org Patchwork: https://patchwork.linux-mips.org/patch/14648/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Lantiq: Make xrx200_phy_fw explicitly non-modularPaul Gortmaker2016-10-041-8/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Kconfig currently controlling compilation of this code is: arch/mips/lantiq/Kconfig:config XRX200_PHY_FW arch/mips/lantiq/Kconfig: bool "XRX200 PHY firmware loader" ...meaning that it currently is not being built as a module by anyone. Lets remove the couple traces of modular infrastructure use, so that when reading the driver there is no doubt it is builtin-only. Since module_platform_driver() uses the same init level priority as builtin_platform_driver() the init ordering remains unchanged with this commit. Also note that MODULE_DEVICE_TABLE is a no-op for non-modular code. We also delete the MODULE_LICENSE tag etc. since all that information was (or is now) contained at the top of the file in the comments. We don't replace module.h with init.h since the file doesn't need that. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Cc: John Crispin <john@phrozen.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/13932/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Lantiq: Make vmmc explicitly non-modularPaul Gortmaker2016-10-041-4/+2
| | | | | | | | | | | | | | | | | | | | | | | | The Makefile entry controlling compilation of this code is: arch/mips/lantiq/xway/vmmc.o ---> arch/mips/lantiq/xway/Makefile:obj-y += vmmc.o ...meaning that it currently is not being built as a module by anyone. Since module_platform_driver() uses the same init level priority as builtin_platform_driver() the init ordering remains unchanged with this commit. Also note that MODULE_DEVICE_TABLE is a no-op for non-modular code. We replace module.h with export.h since the file does actually use EXPORT_SYMBOL. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Cc: John Crispin <john@phrozen.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/13930/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* Merge branch '4.7-fixes' into mips-for-linux-nextRalf Baechle2016-08-031-1/+1
|\
| * MIPS: Lantiq: Register IRQ handler for virtual IRQ numberHauke Mehrtens2016-07-241-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We used the hardware IRQ number to register the IRQ handler and not the virtual one. This probably caused some problems because the hardware IRQ numbers are only unique for each IRQ controller and not in the system. The virtual IRQ number is managed by Linux and unique in the system. This was probably the reason there was a gab of 8 IRQ numbers added before the numbers used for the lantiq IRQ controller. With the current setup the hardware and the virtual IRQ numbers are the same. Reported-by: Thomas Langer <thomas.langer@intel.com> Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Acked-by: John Crispin <john@phrozen.org> Cc: thomas.langer@intel.com Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/13539/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Lantiq: Fix eiu interrupt loading codeJohn Crispin2016-07-241-9/+10
| | | | | | | | | | | | | | | | | | | | | | | | Using of_irq_count to load the irq index from the devicetree is incorrect. This will cause the kernel to map them regardless, even if they dont actually get used. Change the code to use of_property_count_u32_elems() instead which is the correct API to use in this case. Signed-off-by: John Crispin <john@phrozen.org> Cc: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/13601/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | MIPS: Lantiq: Fix build failureSudip Mukherjee2016-08-031-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some configs of mips like xway_defconffig are failing with the error: arch/mips/lantiq/irq.c:209:2: error: initialization from incompatible pointer type [-Werror] "icu", ^ arch/mips/lantiq/irq.c:209:2: error: (near initialization for 'ltq_irq_type.parent_device') [-Werror] arch/mips/lantiq/irq.c:219:2: error: initialization from incompatible pointer type [-Werror] "eiu", ^ arch/mips/lantiq/irq.c:219:2: error: (near initialization for 'ltq_eiu_type.parent_device') [-Werror] The first member of the "struct irq" is no longer a pointer for the name. Fixes: be45beb2df69 ("genirq: Add runtime power management support for IRQ chips") Signed-off-by: Sudip Mukherjee <sudip.mukherjee@codethink.co.uk> Acked-by: John Crispin <john@phrozen.org> Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/13684/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | MIPS: store the appended dtb address in a variableJonas Gorski2016-08-021-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Instead of rewriting the arguments to match the UHI spec, store the address of a appended or UHI supplied dtb in fw_supplied_dtb. That way the original bootloader arugments are kept intact while still making the use of an appended dtb invisible for mach code. Mach code can still find out if it is an appended dtb by comparing fw_arg1 with fw_supplied_dtb. Signed-off-by: Jonas Gorski <jogo@openwrt.org> Cc: Kevin Cernekee <cernekee@gmail.com> Cc: Florian Fainelli <f.fainelli@gmail.com> Cc: John Crispin <john@phrozen.org> Cc: Paul Burton <paul.burton@imgtec.com> Cc: James Hogan <james.hogan@imgtec.com> Cc: Alban Bedel <albeu@free.fr> Cc: Daniel Gimpelevich <daniel@gimpelevich.san-francisco.ca.us> Cc: Antony Pavlov <antonynpavlov@gmail.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/13699/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | MIPS: Lantiq: Use the real EXIN countJohn Crispin2016-07-241-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | We runtime load the available external interrupts into an array and store the number inside exin_avail. Some of the code however uses MAX_EIU for looping over the array which may partially be 0. This is a cosmetic fix as the existing code works as is. It is just nicer to only loop over the array elements that were actually populated during probe. Signed-off-by: John Crispin <john@phrozen.org> Cc: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/13602/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | MIPS: Lantiq: Fix eiu interrupt loading codeJohn Crispin2016-07-241-9/+10
|/ | | | | | | | | | | | Using of_irq_count to load the irq index from the devicetree is incorrect. This will cause the kernel to map them regardless, even if they dont actually get used. Change the code to use of_property_count_u32_elems() instead which is the correct API to use in this case. Signed-off-by: John Crispin <john@phrozen.org> Cc: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/13601/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Change my email addressJohn Crispin2016-05-1319-20/+20
| | | | | | | | | The old address is no longer valid. Use the my new one instead. Signed-off-by: John Crispin <john@phrozen.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/13201/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Lantiq: Make it possible to build in no device treeHauke Mehrtens2016-05-131-1/+11
| | | | | | | | | | | | | | Now it is possible to build in no device tree at all and depend on the boot loader providing one or someone concatenating a device tree to the end of the image. This was copied from arch/mips/bmips/Kconfig Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Acked-by: John Crispin <john@phrozen.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/12899/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Lantiq: Add support for device tree file from boot loaderHauke Mehrtens2016-05-131-2/+11
| | | | | | | | | | | | | This fetches the device tree file like it is specified in the MIPS UHI interface if one was found. This is also used when the device tree file was appended to the kernel image with cat. This code is copied from arch/mips/bmips/setup.c. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Acked-by: John Crispin <john@phrozen.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/12898/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: lantiq: Make reset_control_ops constPhilipp Zabel2016-05-131-1/+1
| | | | | | | | | | | The reset_ops structure is never modified. Make it const. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Acked-by: John Crispin <john@phrozen.org> Cc: linux-mips@linux-mips.org Cc: kernel@pengutronix.de Patchwork: https://patchwork.linux-mips.org/patch/12619/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Make MIPS_CMDLINE_DTB defaultJonas Gorski2015-11-111-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | Seval of-enabled machines (bmips, lantiq, xlp, pistachio, ralink) copied the arguments from dtb to arcs_command_line to prevent the kernel from overwriting them. Since there is now an option to keep the dtb arguments, default to the new option remove the "backup" to arcs_command_line in case of USE_OF is enabled, except for those platforms that still take the bootloader arguments or do not use any at all. Signed-off-by: Jonas Gorski <jogo@openwrt.org> Cc: linux-mips@linux-mips.org Cc: Kevin Cernekee <cernekee@gmail.com> Cc: Florian Fainelli <f.fainelli@gmail.com> Cc: Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com> Cc: James Hogan <james.hogan@imgtec.com> Cc: John Crispin <blogic@openwrt.org> Cc: Ganesan Ramalingam <ganesanr@broadcom.com> Cc: Jayachandran C <jchandra@broadcom.com> Cc: Andrew Bresticker <abrestic@chromium.org> Cc: James Hartley <james.hartley@imgtec.com> Patchwork: https://patchwork.linux-mips.org/patch/11285/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: lantiq: Disable xbar fpi burst modeJohn Crispin2015-11-111-0/+41
| | | | | | | Signed-off-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/11458/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: lantiq: Force the crossbar to big endianJohn Crispin2015-11-111-0/+8
| | | | | | | Signed-off-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/11450/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: lantiq: Initialize the USB core on bootJohn Crispin2015-11-111-0/+74
| | | | | | | | | | | | There is a DWC2 USB core in these SoCs. To make USB work we need to first reset and power the state machine. These are SoC specific registers and not part of the actual USB core. Signed-off-by: Antti Seppälä <a.seppala@gmail.com> Signed-off-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/11449/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: lantiq: Return correct value for fpi clock on ar9John Crispin2015-11-111-2/+3
| | | | | | | | | | Some configurations of AR9 reported the incorrect speed for the fpi bus. Signed-off-by: Ben Mulvihill <ben.mulvihill@gmail.com> Signed-off-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/11448/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Lantiq: Fix check for return value of request_mem_region()Hauke Mehrtens2015-11-113-11/+11
| | | | | | | | | | | | request_mem_region() returns a pointer and not an integer with an error value. A check for "< 0" on a pointer will cause problems, replace it with not null checks instead. This was found with sparse. Signed-off-by: Hauke Mehrtens <hauke.mehrtens@lantiq.com> Acked-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/11395/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Lantiq: Add support for xRX220 SoCHauke Mehrtens2015-11-111-0/+7
| | | | | | | | Signed-off-by: Hauke Mehrtens <hauke.mehrtens@lantiq.com> Acked-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/11394/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Lantiq: Add misc clocksHauke Mehrtens2015-11-111-1/+3
| | | | | | | | Signed-off-by: Hauke Mehrtens <hauke.mehrtens@lantiq.com> Acked-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/11393/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Lantiq: Add 1e103100.deu clockHauke Mehrtens2015-11-111-0/+6
| | | | | | | | Signed-off-by: Hauke Mehrtens <hauke.mehrtens@lantiq.com> Acked-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/11392/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Lantiq: Add clock for mei driverHauke Mehrtens2015-11-111-0/+6
| | | | | | | | Signed-off-by: Hauke Mehrtens <hauke.mehrtens@lantiq.com> Acked-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/11391/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Lantiq: Add SoC detection for ar10 and grx390Hauke Mehrtens2015-11-111-2/+26
| | | | | | | | | Signed-off-by: Hauke Mehrtens <hauke.mehrtens@lantiq.com> Acked-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/11390/ Patchwork: https://patchwork.linux-mips.org/patch/11399/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Lantiq: Add support for gphy firmware loading for ar10 and grx390Hauke Mehrtens2015-11-111-20/+92
| | | | | | | | | Signed-off-by: Hauke Mehrtens <hauke.mehrtens@lantiq.com> Acked-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/11389/ Patchwork: https://patchwork.linux-mips.org/patch/11398/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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