| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | [MIPS] TX49XX has prefetch. | Atsushi Nemoto | 2006-03-21 | 1 | -2/+8 |
| * | Add/Fix missing bit of R4600 hit cacheop workaround. | Thiemo Seufer | 2005-10-29 | 1 | -1/+1 |
| * | Let r4600 PRID detection match only legacy CPUs, cleanups. | Thiemo Seufer | 2005-10-29 | 1 | -5/+8 |
| * | Avoid SMP cacheflushes. This is a minor optimization of startup but | Ralf Baechle | 2005-10-29 | 1 | -6/+0 |
| * | Linux-2.6.12-rc2v2.6.12-rc2 | Linus Torvalds | 2005-04-17 | 1 | -0/+489 |
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