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path: root/arch/mips/mm/tlb-r4k.c (follow)
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* MIPS: Only write c0_framemask on CPUs which have this register.Ralf Baechle2009-01-111-1/+4
* [MIPS] All MIPS32 processors support64-bit physical addresses.Chris Dearman2008-04-281-1/+1
* [MIPS] Fix loads of section missmatchesRalf Baechle2008-03-121-4/+4
* [MIPS] Fix typo in commentThiemo Seufer2008-03-121-1/+1
* [MIPS] Fix "no space between function name and open parenthesis" warnings.Ralf Baechle2007-10-121-1/+1
* [MIPS] define Hit_Invalidate_I to Index_Invalidate_I for loongson2Fuxin Zhang2007-07-101-1/+22
* [MIPS] Delete duplicate call to load_irq_save.Ralf Baechle2007-01-191-1/+0
* [MIPS] Replace BARRIER with more appropriate hazard barrier.Ralf Baechle2006-09-271-13/+8
* Remove obsolete #include <linux/config.h>Jörn Engel2006-06-301-1/+0
* [MIPS] Remove prototype for non-existing function.Ralf Baechle2006-06-191-1/+0
* [MIPS] MT: Improved multithreading support.Ralf Baechle2006-04-191-17/+68
* [MIPS] Kill tlb-andes.c.Thiemo Seufer2006-03-211-0/+5
* Rename CONFIG_CPU_MIPS{32,64} to CONFIG_CPU_MIPS{32|64}_R1.Ralf Baechle2005-10-291-1/+1
* Fix race conditions for read_c0_entryhi. Remove broken ASID masks inThiemo Seufer2005-10-291-20/+29
* Update MIPS to use the 4-level pagetable code thereby getting rid ofRalf Baechle2005-10-291-1/+3
* Formatting fixes.Maciej W. Rozycki2005-10-291-9/+10
* Linux-2.6.12-rc2v2.6.12-rc2Linus Torvalds2005-04-171-0/+419