summaryrefslogtreecommitdiffstats
path: root/arch/mips/netlogic/xlp/setup.c (follow)
Commit message (Collapse)AuthorAgeFilesLines
* MIPS: Netlogic: Update function to read DRAM BARsJayachandran C2015-04-011-1/+1
| | | | | | | | | | | | Change name of xlp_get_dram_map to nlm_get_dram_map to be consistent with the rest of the functions in the file. Pass the the size of the array 'dram_map' to the function, and ensure that it does not write past the end of the array. Signed-off-by: Jayachandran C <jchandra@broadcom.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/8892/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Netlogic: Move cores per node out of multi-node.hJayachandran C2015-04-011-5/+0
| | | | | | | | | | | | Use the current_cpu_data package field to get the node of the current CPU. This allows us to remove xlp_cores_per_node and move nlm_threads_per_node() and nlm_cores_per_node() to netlogic/common.h, which simplifies code. Signed-off-by: Jayachandran C <jchandra@broadcom.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/8889/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Netlogic: Add support for XLP5XXYonghong Song2014-05-301-0/+1
| | | | | | | | | | | Add support for the XLP5XX processor which is an 8 core variant of the XLP9XX. Add XLP5XX cases to code which earlier handled XLP9XX. Signed-off-by: Yonghong Song <ysong@broadcom.com> Signed-off-by: Jayachandran C <jchandra@broadcom.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/6871/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Netlogic: Use PRID_IMP_MASK macroJayachandran C2014-05-301-1/+1
| | | | | | | | | | Use PRID_IMP_MASK macro instead of 0xff00 to extract the processor type. Signed-off-by: Jayachandran C <jchandra@broadcom.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/6868/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linusLinus Torvalds2014-01-311-7/+18
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull MIPS updates from Ralf Baechle: "The most notable new addition inside this pull request is the support for MIPS's latest and greatest core called "inter/proAptiv". The patch series describes this core as follows. "The interAptiv is a power-efficient multi-core microprocessor for use in system-on-chip (SoC) applications. The interAptiv combines a multi-threading pipeline with a coherence manager to deliver improved computational throughput and power efficiency. The interAptiv can contain one to four MIPS32R3 interAptiv cores, system level coherence manager with L2 cache, optional coherent I/O port, and optional floating point unit." The platform specific patches touch all 3 Broadcom families. It adds support for the new Broadcom/Netlogix XLP9xx Soc, building a common BCM63XX SMP kernel for all BCM63XX SoCs regardless of core type/count and full gpio button/led descriptions for BCM47xx. The rest of the series are cleanups and bug fixes that are MIPS generic and consist largely of changes that Imgtec/MIPS had published in their linux-mti-3.10.git stable tree. Random other cleanups and patches preparing code to be merged in 3.15" * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (139 commits) mips: select ARCH_MIGHT_HAVE_PC_SERIO mips: delete non-required instances of include <linux/init.h> MIPS: KVM: remove shadow_tlb code MIPS: KVM: use common EHINV aware UNIQUE_ENTRYHI mips/ide: flush dcache also if icache does not snoop dcache MIPS: BCM47XX: fix position of cpu_wait disabling MIPS: BCM63XX: select correct MIPS_L1_CACHE_SHIFT value MIPS: update MIPS_L1_CACHE_SHIFT based on MIPS_L1_CACHE_SHIFT_<N> MIPS: introduce MIPS_L1_CACHE_SHIFT_<N> MIPS: ZBOOT: gather string functions into string.c arch/mips/pci: don't check resource with devm_ioremap_resource arch/mips/lantiq/xway: don't check resource with devm_ioremap_resource bcma: gpio: don't cast u32 to unsigned long ssb: gpio: add own IRQ domain MIPS: BCM47XX: fix sparse warnings in board.c MIPS: BCM47XX: add board detection for Linksys WRT54GS V1 MIPS: BCM47XX: fix detection for some boards MIPS: BCM47XX: Enable buttons support on SSB MIPS: BCM47XX: Convert WNDR4500 to new syntax MIPS: BCM47XX: Use "timer" trigger for status LEDs ...
| * MIPS: Netlogic: Core wakeup improvementsJayachandran C2014-01-241-6/+8
| | | | | | | | | | | | | | | | | | | | Move wakeup to after early console. This will allow us to display error messages when cores are not woken up. Also reduce the wait time for core to come up. Signed-off-by: Jayachandran C <jchandra@broadcom.com> Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6303/
| * MIPS: Netlogic: Add cpu to node mapping for XLP9XXJayachandran C2014-01-241-0/+5
| | | | | | | | | | | | | | | | | | XLP9XX has 20 cores per node, opposed to 8 on earlier XLP8XX. Update code that calculates node id from cpu id to handle this. Signed-off-by: Jayachandran C <jchandra@broadcom.com> Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6283/
| * MIPS: Netlogic: SYS block updates of XLP9XXJayachandran C2014-01-241-1/+4
| | | | | | | | | | | | | | | | | | | | Add the SYS block registers for XLP9XX, most of them have changed. The wakeup sequence has been updated to set the coherent mode from the main thread rather than the woken up thread. Signed-off-by: Jayachandran C <jchandra@broadcom.com> Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6280/
| * MIPS: Netlogic: Identify XLP 9XX chipJayachandran C2014-01-241-0/+1
| | | | | | | | | | | | | | | | | | Adds processor ID of XLP 9XX to asm/cpu.h. Update netlogic/xlp-hal/xlp.h to add cpu_is_xlp9xx() and to update cpu_is_xlpii() to support XLP 9XX. Signed-off-by: Jayachandran C <jchandra@broadcom.com> Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6274/
* | MIPS: Remove panic_timeout settingsRalf Baechle2013-11-261-1/+0
|/ | | | | | | | | | | | | | | | | | | | | Now that we have a CONFIG_PANIC_TIMEOUT=x setting, remove the mips settings. The default is 0, which means don't reboot on panic. Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Acked-by: Shinya Kuribayashi <skuribay@pobox.com> Signed-off-by: Jason Baron <jbaron@akamai.com> Cc: benh@kernel.crashing.org Cc: paulus@samba.org Cc: mpe@ellerman.id.au Cc: felipe.contreras@gmail.com Cc: linux-mips@linux-mips.org Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Cc: Thomas Gleixner <tglx@linutronix.de> Link: http://lkml.kernel.org/r/d19dc75fca343ec5d9ada75a1400f57330021976.1385418410.git.jbaron@akamai.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
* MIPS: Netlogic: replace early_init_devtree() callJayachandran C2013-11-061-1/+1
| | | | | | | | | | | | | | The early_init_devtree() API was removed in linux-next for 3.13 with commit "mips: use early_init_dt_scan". This causes Netlogic XLP compile to fail: arch/mips/netlogic/xlp/setup.c:101: undefined reference to `early_init_devtree' Add xlp_early_init_devtree() which uses the __dt_setup_arch() to handle early device tree related initialization to fix this. Signed-off-by: Jayachandran C <jchandra@broadcom.com> Signed-off-by: Rob Herring <rob.herring@calxeda.com>
* MIPS: Netlogic: Add support for XLP2XXJayachandran C2013-09-031-7/+20
| | | | | | | | | | | | | | XLP2XX is first in the series of 28nm XLPII processors. The changes are to: * Add processor ID for XLP2XX to asm/cpu.h and kernel/cpu-probe.c. * Add a cpu_is_xlpii() function to check for XLPII processors. * Update xlp_mmu_init() to use config4 to enable extended TLB. Signed-off-by: Jayachandran C <jchandra@broadcom.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5698/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Netlogic: Read memory from DRAM BARsJayachandran C2013-09-031-0/+23
| | | | | | | | | | | Read the memory from the Bridge DRAM BARs, if it is not passed in from the device tree. This will allow us to remove memory configuration from built in device trees. Signed-off-by: Jayachandran C <jchandra@broadcom.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5743/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Netlogic: Fixup memory regions for prefetchJayachandran C2013-06-131-0/+13
| | | | | | | | | | | Fix a cache error found in stress test, caused by the prefetch instruction going beyond valid memory when acessing the last page of a region. Add the pref_backup logic similar to XLR in XLP too. Signed-off-by: Jayachandran C <jchandra@broadcom.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5431/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Netlogic: move cpu_ready array to boot areaJayachandran C2013-06-131-0/+1
| | | | | | | | | | Move the nlm_cpu_ready[] array used by the cpu wakeup code to the boot area, along with rest of the boot parameter code. Signed-off-by: Jayachandran C <jchandra@broadcom.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5425/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Netlogic: Initialization when !CONFIG_SMPJayachandran C2013-06-131-0/+8
| | | | | | | | | | The core initialization and reset vector setup needs to be done even when booting uniprocessor. Move this code from smp.c to setup.c Signed-off-by: Jayachandran C <jchandra@broadcom.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5428/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Netlogic: Split XLP device tree code to dt.cJayachandran C2013-06-131-69/+4
| | | | | | | | | | Create new flle arch/mips/netlogic/xlp/dt.c and move the device tree related code there. Signed-off-by: Jayachandran C <jchandra@broadcom.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5422/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Idle: Consolidate all declarations in <asm/idle.h>.Ralf Baechle2013-05-221-0/+1
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Netlogic: Support for multiple built-in device treesJayachandran C2013-05-081-3/+19
| | | | | | | | | | | | | | This enables us to have a default device tree per SoC family to be built into the kernel. The default device tree for XLP3xx has been added as part of this change. Later this can be used to provide support default boards for XLP2xx and XLP9xx SoCs. Kconfig options are provided for each default device tree so that just the needed ones can be selected to be built into the kernel. Signed-off-by: Jayachandran C <jchandra@broadcom.com> Patchwork: http://patchwork.linux-mips.org/patch/5023/ Acked-by: John Crispin <blogic@openwrt.org>
* MIPS: Netlogic: Support for XLR/XLS Fast Message NetworkGanesan Ramalingam2012-11-091-0/+4
| | | | | | | | | | | | | | | | | | | | On XLR/XLS, the cpu cores communicate with fast on-chip devices (e.g. network accelerator, security engine etc.) using the Fast Messaging Network(FMN). The FMN queues and credits needs to be configured and intialized before it can be used. The co-processor 2 on XLR/XLS CPU cores has registers for FMN access, and the XLR/XLS has custom instructions for sending and loading messages. The FMN can deliver also per-cpu interrupts when messages are available at the CPU. This patch adds FMN initialization, adds interrupt setup and handling, and also provides support for sending and receiving FMN messages. Signed-off-by: Ganesan Ramalingam <ganesanr@broadcom.com> Signed-off-by: Jayachandran C <jchandra@broadcom.com> Patchwork: http://patchwork.linux-mips.org/patch/4468 Signed-off-by: John Crispin <blogic@openwrt.org>
* MIPS: Netlogic: Support for multi-chip configurationJayachandran C2012-11-091-9/+8
| | | | | | | | | | | | Upto 4 Netlogic XLP SoCs can be connected over ICI links to form a coherent multi-node system. Each SoC has its own set of on-chip devices including PIC. To support this, add a per SoC stucture and use it for the PIC and SYS block addresses instead of using global variables. Signed-off-by: Jayachandran C <jchandra@broadcom.com> Patchwork: http://patchwork.linux-mips.org/patch/4469 Signed-off-by: John Crispin <blogic@openwrt.org>
* MIPS: Netlogic: Move from u32 cpumask to cpumask_tJayachandran C2012-11-091-2/+4
| | | | | | | | | | Initial code to support more than 32 cpus. The platform CPU mask is updated from 32-bit mask to cpumask_t. Convert places that use cpu_/cpus_ functions to use cpumask_* functions. Signed-off-by: Jayachandran C <jchandra@broadcom.com> Patchwork: http://patchwork.linux-mips.org/patch/4464 Signed-off-by: John Crispin <blogic@openwrt.org>
* MIPS: Netlogic: Move fdt init to plat_mem_setupJayachandran C2012-11-091-13/+14
| | | | | | | | | At this point early printk is available, so debugging device tree issues is easier. Signed-off-by: Jayachandran C <jchandra@broadcom.com> Patchwork: http://patchwork.linux-mips.org/patch/4460 Signed-off-by: John Crispin <blogic@openwrt.org>
* MIPS: Netlogic: Add support for built in DTBJayachandran C2012-08-221-1/+11
| | | | | | | | | | Provide a config option to embed a device tree for XLP evaluation boards. This DTB will be used if the firmware does not pass in a device tree pointer. Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com> Patchwork: http://patchwork.linux-mips.org/patch/4103/ Signed-off-by: John Crispin <blogic@openwrt.org>
* MIPS: Netlogic: merge of.c into setup.cJayachandran C2012-08-221-0/+20
| | | | | | | | | | | | Move the function device_tree_init() from netlogic/xlp/of.c to setup.c, and remove the wrapper functions reserve_mem_mach() and free_mem_mach(). Remove file netlogic/xlp/of.c, and the Makefile entry for it. Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com> Patchwork: http://patchwork.linux-mips.org/patch/4097/ Signed-off-by: John Crispin <blogic@openwrt.org>
* MIPS: Netlogic: Add XLP SoC devices in FDTGanesan Ramalingam2012-07-241-0/+16
| | | | | | | | | | | | Probe and add devices on SoC "simple-bus" on startup. This will in turn add devices like I2C controller that are specified in the device tree under 'soc'. Signed-off-by: Ganesan Ramalingam <ganesanr@broadcom.com> Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3762/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Netlogic: Fix TLB size of boot CPU.Jayachandran C2012-07-031-1/+7
| | | | | | | | | | | | | | Starting other threads in the core will change the number of TLB entries of a CPU. Re-calculate current_cpu_data.tlbsize on the boot cpu after enabling and waking up other threads. The secondary CPUs do not need this logic because the threads are enabled on the secondary cores at wakeup and before cpu_probe. Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3751/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Netlogic: Merge some of XLR/XLP wakup codeJayachandran C2011-12-071-0/+4
| | | | | | | | | | | | | | | | | | Create a common NMI and reset handler in smpboot.S and use this for both XLR and XLP. In the earlier code, the woken up CPUs would busy wait until released, switch this to wakeup by NMI. The initial wakeup code or XLR and XLP are differ since they are started from different bootloaders (XLP from u-boot and XLR from netlogic bootloader). But in both platforms the woken up CPUs wait and are released by sending an NMI. Add support for starting XLR and XLP in 1/2/4 threads per core. Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2970/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Netlogic: Add XLP platform files for XLP SoCJayachandran C2011-12-071-0/+101
- Update common files to support XLP. - Add arch/mips/include/asm/netlogic/xlp-hal for register definitions and access macros - Add arch/mips/netlogic/xlp/ for XLP specific files. Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2967/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-28 14:14:53 +0100