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* MIPS: PCI: fix pcibios_map_irq section mismatchManuel Lauss2017-09-211-1/+1
| | | | | | | | | | | | | | | | | | Drop the __init from pcibios_map_irq() to make this section mis- match go away: WARNING: vmlinux.o(.text+0x56acd4): Section mismatch in reference from the function pcibios_scanbus() to the function .init.text:pcibios_map_irq() The function pcibios_scanbus() references the function __init pcibios_map_irq(). This is often because pcibios_scanbus lacks a __init annotation or the annotation of pcibios_map_irq is wrong. Run-Tested only on Alchemy. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/17267/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: PCI: Netlogic XLP9XX supportJayachandran C2014-01-241-21/+74
| | | | | | | | | | | | Add PCI support for Netlogic XLP9XX. The PCI registers and SoC bus numbers have changed in XLP9XX. Also skip a few (bus,dev,fn) combinations which have issues when read. Signed-off-by: Jayachandran C <jchandra@broadcom.com> Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6284/
* MIPS: Netlogic: XLP9XX PIC updatesJayachandran C2014-01-241-1/+1
| | | | | | | | | Functions for the XLP9XX interrupt table entry format and other PIC register changes. Signed-off-by: Jayachandran C <jchandra@broadcom.com> Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6279/
* MIPS: Netlogic: Add macro for node presentJayachandran C2014-01-241-4/+2
| | | | | | | | | Add macro nlm_node_present() that can be used to check if a node is present in a multi-chip configuration. This can be used even when NUMA is not enabled. Signed-off-by: Jayachandran C <jchandra@broadcom.com> Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6272/
* MIPS: Netlogic: Add MSI support for XLPJayachandran C2014-01-241-9/+6
| | | | | | | | | | | | | | | | | | | | | Add MSI chip and MSIX chip definitions. For MSI, we map the link interrupt to a MSI link IRQ which will do a second level of dispatch based on the MSI status register. The MSI chip definitions use the MSI enable register to enable and disable the MSI irqs. For MSI-X, we split the 32 available MSI-X vectors across the four PCIe links (8 each). These PIC interrupts generate an IRQ per link which uses a second level dispatch as well. The MSI-X chip definition uses the standard functions to enable and disable interrupts. Signed-off-by: Jayachandran C <jchandra@broadcom.com> Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6270/
* Merge branch 'mips-next-3.9' of ↵Ralf Baechle2013-02-211-44/+80
|\ | | | | | | git://git.linux-mips.org/pub/scm/john/linux-john into mips-for-linux-next
| * MIPS: PCI: Multi-node PCI support for Netlogic XLPJayachandran C2013-02-171-43/+66
| | | | | | | | | | | | | | | | | | On a multi-chip XLP board, each node can have 4 PCIe links. Update XLP PCI code to initialize PCIe on all the nodes. Signed-off-by: Jayachandran C <jchandra@broadcom.com> Patchwork: http://patchwork.linux-mips.org/patch/4803/ Signed-off-by: John Crispin <blogic@openwrt.org>
| * MIPS: PCI: Prevent hang on XLP reg readJayachandran C2013-02-171-1/+5
| | | | | | | | | | | | | | | | | | | | Reading PCI extended register at 0x255 on a bridge will hang if there is no device connected on the link. Make PCI read routine skip this register. Signed-off-by: Jayachandran C <jchandra@broadcom.com> Patchwork: http://patchwork.linux-mips.org/patch/4789/ Signed-off-by: John Crispin <blogic@openwrt.org>
| * MIPS: PCI: Byteswap not needed in little-endian modeJayachandran C2013-02-171-3/+12
| | | | | | | | | | | | | | | | | | | | | | | | Rename function xlp_enable_pci_bswap() to xlp_config_pci_bswap(), which is a better description for its functionality. When compiled in big-endian mode, xlp_config_pci_bswap() will configure the PCIe links to byteswap. In little-endian mode, no swap configuration is needed for the PCIe controller, and the function is empty. Signed-off-by: Jayachandran C <jchandra@broadcom.com> Patchwork: http://patchwork.linux-mips.org/patch/4802/ Signed-off-by: John Crispin <blogic@openwrt.org>
* | MIPS: Whitespace cleanup.Ralf Baechle2013-02-011-16/+16
|/ | | | | | | | Having received another series of whitespace patches I decided to do this once and for all rather than dealing with this kind of patches trickling in forever. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Netlogic: XLP PCIe controller support.Ganesan Ramalingam2012-07-241-0/+248
Adds support for the XLP on-chip PCIe controller. On XLP, the on-chip devices(including the 4 PCIe links) appear in the PCIe configuration space of the XLP as PCI devices. The changes are to initialize and register the PCIe controller, enable hardware byte swap in the PCIe IO and MEM space, and to enable PCIe interrupts. Signed-off-by: Ganesan Ramalingam <ganesanr@netlogicmicro.com> Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3760/ Patchwork: https://patchwork.linux-mips.org/patch/4104/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>