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* treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500Thomas Gleixner2019-06-191-3/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | Based on 2 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation # extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 4122 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Enrico Weigelt <info@metux.net> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190604081206.933168790@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* MIPS: ralink: Fix mt7620 nd_sd pinmuxMathias Kresin2018-11-261-1/+1
| | | | | | | | | | | | | | | | | | In case the nd_sd group is set to the sd-card function, Pins 45 + 46 are configured as GPIOs. If they are blocked by the sd function, they can't be used as GPIOs. Reported-by: Kristian Evensen <kristian.evensen@gmail.com> Signed-off-by: Mathias Kresin <dev@kresin.me> Signed-off-by: Paul Burton <paul.burton@mips.com> Fixes: f576fb6a0700 ("MIPS: ralink: cleanup the soc specific pinmux data") Patchwork: https://patchwork.linux-mips.org/patch/21220/ Cc: John Crispin <john@phrozen.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: James Hogan <jhogan@kernel.org> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Cc: stable@vger.kernel.org # v3.18+
* MIPS: ralink: Fix typo in mt7628 pinmux functionMathias Kresin2017-11-131-1/+1
| | | | | | | | | | | | | | There is a typo inside the pinmux setup code. The function is called refclk and not reclk. Fixes: 53263a1c6852 ("MIPS: ralink: add mt7628an support") Signed-off-by: Mathias Kresin <dev@kresin.me> Acked-by: John Crispin <john@phrozen.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: linux-mips@linux-mips.org Cc: <stable@vger.kernel.org> # 3.19+ Patchwork: https://patchwork.linux-mips.org/patch/16047/ Signed-off-by: James Hogan <jhogan@kernel.org>
* MIPS: ralink: Fix MT7628 pinmuxMathias Kresin2017-11-131-2/+2
| | | | | | | | | | | | | | According to the datasheet the REFCLK pin is shared with GPIO#37 and the PERST pin is shared with GPIO#36. Fixes: 53263a1c6852 ("MIPS: ralink: add mt7628an support") Signed-off-by: Mathias Kresin <dev@kresin.me> Acked-by: John Crispin <john@phrozen.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: linux-mips@linux-mips.org Cc: <stable@vger.kernel.org> # 3.19+ Patchwork: https://patchwork.linux-mips.org/patch/16046/ Signed-off-by: James Hogan <jhogan@kernel.org>
* MIPS: ralink: mt7620: Add missing headerHarvey Hunt2017-07-191-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix a build error caused by not including <linux/bug.h>. The following compilation errors are caused by the missing header: arch/mips/ralink/mt7620.c: In function ‘mt7620_get_cpu_pll_rate’: arch/mips/ralink/mt7620.c:431:2: error: implicit declaration of function ‘WARN_ON’ [-Werror=implicit-function-declaration] WARN_ON(div >= ARRAY_SIZE(mt7620_clk_divider)); ^ arch/mips/ralink/mt7620.c: In function ‘mt7620_get_sys_rate’: arch/mips/ralink/mt7620.c:500:2: error: implicit declaration of function ‘WARN’ [-Werror=implicit-function-declaration] if (WARN(!div, "invalid divider for OCP ratio %u", ocp_ratio)) ^ arch/mips/ralink/mt7620.c: In function ‘mt7620_dram_init’: arch/mips/ralink/mt7620.c:619:3: error: implicit declaration of function ‘BUG’ [-Werror=implicit-function-declaration] BUG(); ^ cc1: some warnings being treated as errors scripts/Makefile.build:302: recipe for target 'arch/mips/ralink/mt7620.o' failed Signed-off-by: Harvey Hunt <harvey.hunt@imgtec.com> Cc: John Crispin <john@phrozen.org> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/16781/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Audit and remove any unnecessary uses of module.hPaul Gortmaker2017-02-141-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Historically a lot of these existed because we did not have a distinction between what was modular code and what was providing support to modules via EXPORT_SYMBOL and friends. That changed when we forked out support for the latter into the export.h file. This means we should be able to reduce the usage of module.h in code that is obj-y Makefile or bool Kconfig. In the case of some code where it is modular, we can extend that to also include files that are building basic support functionality but not related to loading or registering the final module; such files also have no need whatsoever for module.h The advantage in removing such instances is that module.h itself sources about 15 other headers; adding significantly to what we feed cpp, and it can obscure what headers we are effectively using. Since module.h might have been the implicit source for init.h (for __init) and for export.h (for EXPORT_SYMBOL) we consider each instance for the presence of either and replace/add as needed. Also note that MODULE_DEVICE_TABLE is a no-op for non-modular code. Build coverage of all the mips defconfigs revealed the module.h header was masking a couple of implicit include instances, so we add the appropriate headers there. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Cc: David Daney <david.daney@cavium.com> Cc: John Crispin <john@phrozen.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: "Steven J. Hill" <steven.hill@cavium.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/15131/ [james.hogan@imgtec.com: Preserve sort order where it already exists] Signed-off-by: James Hogan <james.hogan@imgtec.com>
* MIPS: ralink: Fix a typo in the pinmux setup.John Crispin2017-01-031-9/+9
| | | | | | | | | | | There is a typo inside the pinmux setup code. The function is really called utif and not util. This was recently discovered when people were trying to make the UTIF interface work. Signed-off-by: John Crispin <john@phrozen.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/14899/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: ralink: Add missing pinmux.John Crispin2017-01-031-2/+6
| | | | | | | | | | | The mt7620 has a pin that can be used to generate an external reference clock. The pinmux setup was missing the definition of said pin. This patch adds it. Signed-off-by: John Crispin <john@phrozen.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/14898/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: ralink: Add missing I2C and I2S clocks.John Crispin2017-01-031-0/+5
| | | | | | | | | | This patch adds two additional clocks required by the audio interface of the SoCs. Signed-off-by: John Crispin <john@phrozen.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/14897/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: ralink: fix spis group pinmuxÁlvaro Fernández Rojas2016-08-021-1/+1
| | | | | | | | | | | | | pwm function for spis conflicts with uart2 and uart1, fix this by changing it to pwm_uart2, which reflects the real use of these pins with these pinmux (2 for pwm and 2 for uart). Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Cc: john@phrozen.org Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/13369/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: ralink: add MT7628 EPHY LEDs pinmux supportÁlvaro Fernández Rojas2016-05-281-0/+100
| | | | | | | | | Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Cc: john@phrozen.org Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/13308/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: ralink: fix MT7628 wled_an pinmux gpioÁlvaro Fernández Rojas2016-05-281-4/+4
| | | | | | | | | Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Cc: john@phrozen.org Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/13307/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: ralink: fix MT7628 pinmux typosÁlvaro Fernández Rojas2016-05-281-2/+2
| | | | | | | | | Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Cc: john@phrozen.org Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/13306/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* mips: mt7620: fallback to SDRAM when syscfg0 does not have a valid value for ↵Sashka Nochkin2016-05-131-2/+5
| | | | | | | | | | | | | the memory type Mediatek MT7620 SoC has syscfg0 bits where it sets the type of memory being used. However, sometimes those bits are not set properly (reading "11"). In this case, the SoC assumes SDRAM. The patch below reflects that. Signed-off-by: Sashka Nochkin <linux-mips@durdom.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/13135/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Change my email addressJohn Crispin2016-05-131-1/+1
| | | | | | | | | The old address is no longer valid. Use the my new one instead. Signed-off-by: John Crispin <john@phrozen.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/13201/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: ralink: Add a few missing clocksJohn Crispin2016-01-201-0/+3
| | | | | | | Signed-off-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/11995/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: ralink: Fix vendor string for mt7620John Crispin2016-01-201-1/+1
| | | | | | | | | | Ralink was acquired by Mediatek. Represent this in the cpuinfo. It apparently confused people. Signed-off-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/11994/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: ralink: fix USB frequency scalingJohn Crispin2016-01-201-1/+1
| | | | | | | | | | | Commit 418d29c87061 ("MIPS: ralink: Unify SoC id handling") was not fully correct. The logic for the SoC check got inverted. We need to check if it is not a MT76x8. Signed-off-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/11992/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: ralink: MT7688 pinmux fixesJohn Crispin2016-01-201-30/+50
| | | | | | | | | | A few fixes to the pinmux data, 2 new muxes and a minor whitespace cleanup. Signed-off-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/11991/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: ralink: Remove check for CONFIG_PCI on non-PCI SoCsJohn Crispin2015-11-111-3/+0
| | | | | | | | | | | The code currently panics if PCI is enabled but the SoC has no PCI bus. This check is superfluous as the driver only loads if enabled in the devicetree. Signed-off-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/11444/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: ralink: Fix usb issue during frequency scalingJohn Crispin2015-11-111-0/+20
| | | | | | | | | | | | | If the USB HCD is running and the cpu is scaled too low, then the USB stops working. Increase the idle speed of the core to fix this if the kernel is built with USB support. The "magic" values are taken from the Ralink SDK Kernel. Signed-off-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/11441/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: ralink: Unify SoC id handlingJohn Crispin2015-11-111-9/+6
| | | | | | | | | This makes detection a lot easier for audio, wifi, ... drivers. Signed-off-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/11440/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: ralink: Add support for mt7688John Crispin2015-11-111-6/+29
| | | | | | | | | MT7688 is similar tot he MT7628 but has a different wifi radio. Signed-off-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/11439/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: ralink: add mt7628an supportJohn Crispin2014-11-241-45/+231
| | | | | | Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/8031/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: ralink: add support for MT7620nJohn Crispin2014-11-241-7/+13
| | | | | | | | This is the small version of MT7620a. Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/8030/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: ralink: cleanup the soc specific pinmux dataJohn Crispin2014-11-241-109/+50
| | | | | | | | | | Before we had a pinctrl driver we used a custom OF api. This patch converts the soc specific pinmux data to a new set of structs. We also add some new pinmux setings. Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/8009/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: ralink: add verbose pmu infoJohn Crispin2014-11-241-0/+26
| | | | | | | | Print the PMU and LDO settings on boot. Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/7999/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Panic messages should not end in \n.Ralf Baechle2013-10-291-1/+1
| | | | | | | Panic() is going to add a \n itself and it's annoying if a panic message rolls of the screen on a device with no scrollback. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: ralink: mt7620: Add spi clock definitionJohn Crispin2013-09-041-0/+1
| | | | | | | | | | | | | Register a clock device for the SPI block of the MT7620 SoC. The clock device will be used by the SPI host controller driver to determine the base clock of the controller. Signed-off-by: John Crispin <blogic@openwrt.org> Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5754/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: ralink: mt7620: Add wdt clock definitionJohn Crispin2013-09-041-0/+1
| | | | | | | | | | | | | | | | | | | The watchdog driver of the SoC uses the clk API to get the clock associated with the watchdog device. However the MT7620 specific setup code does not register a clock for the watchdog device yet which leads to the following error: rt2880_wdt: probe of 10000120.watchdog failed with error -2 Register a clock device for the watchdog in order to avoid the error and make the watchdog usable. Signed-off-by: John Crispin <blogic@openwrt.org> Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5756/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: ralink: mt7620: Improve clock frequency detectionGabor Juhos2013-09-041-25/+175
| | | | | | | | | | | | | | | | | | | | | The current code assumes that the peripheral clock always runs at 40MHz which is not true in all configuration. The peripheral clock can also use the reference clock instead of the fixed 40MHz rate. If the reference clock runs at a different rate, various peripheries are behaving incorrectly. Additionally, the currectly calculated system clock is also wrong. The actual value what the code computes is the rate of the DRAM which can be different from the system clock. Add new helper functions to get the rate of the different clocks and use the correct values for the registered clock devices. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5755/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: ralink: mt7620: Add verbose ram infoJohn Crispin2013-09-041-0/+3
| | | | | | | | | Make the code print which of SDRAM, DDR1 or DDR2 was detected. Signed-off-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/5671/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: ralink: add memory definition for MT7620John Crispin2013-05-081-0/+20
| | | | | | | Populate struct soc_info with the data that describes our RAM window. Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5183/
* MIPS: ralink: adds support for MT7620 SoC familyJohn Crispin2013-05-081-0/+214
Add support code for mt7620 SOC. The code detects the SoC and registers the clk / pinmux settings. Signed-off-by: John Crispin <blogic@openwrt.org> Acked-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5177/
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