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Author
Age
Files
Lines
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MIPS: disable FPU if the mode is unsupported
Paul Burton
2015-03-27
1
-7
/
+12
*
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MIPS: prevent FP context set via ptrace being discarded
Paul Burton
2015-03-27
1
-6
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+24
*
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MIPS: Ensure FCSR cause bits are clear after invoking FPU emulator
Paul Burton
2015-03-27
1
-8
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+9
*
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MIPS: clear MSACSR cause bits when handling MSA FP exception
Paul Burton
2015-03-27
1
-1
/
+10
*
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MIPS: wrap cfcmsa & ctcmsa accesses for toolchains with MSA support
Paul Burton
2015-03-27
1
-4
/
+20
*
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MIPS: remove MSA macro recursion
Paul Burton
2015-03-27
1
-3
/
+31
*
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MIPS: assume at as source/dest of MSA copy/insert instructions
Paul Burton
2015-03-27
1
-16
/
+12
*
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MIPS: Push .set mips64r* into the functions needing it
Paul Burton
2015-03-27
2
-9
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+5
*
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MIPS: lose_fpu(): Disable FPU when MSA enabled
James Hogan
2015-03-27
1
-0
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+1
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KVM: MIPS: Enable after disabling interrupt
Tapasweni Pathak
2015-03-02
1
-0
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+1
*
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KVM: MIPS: Fix trace event to save PC directly
James Hogan
2015-03-02
1
-3
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+3
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Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus
Linus Torvalds
2015-02-22
105
-1123
/
+6390
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MIPS: sead3: Corrected get_c0_perfcount_int
Niklas Cassel
2015-02-20
1
-1
/
+1
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MIPS: mm: Remove dead macro definitions
Andreas Ruprecht
2015-02-20
2
-16
/
+0
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MIPS: OCTEON: irq: add CIB and other fixes
David Daney
2015-02-20
1
-269
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+780
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MIPS: OCTEON: Don't do acknowledge operations for level triggered irqs.
David Daney
2015-02-20
1
-2
/
+43
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MIPS: OCTEON: More OCTEONIII support
Chandrakala Chavva
2015-02-20
4
-2
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+326
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MIPS: OCTEON: Remove setting of processor specific CVMCTL icache bits.
Chad Reese
2015-02-20
1
-20
/
+0
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MIPS: OCTEON: Core-15169 Workaround and general CVMSEG cleanup.
David Daney
2015-02-20
2
-6
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+17
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MIPS: OCTEON: Update octeon-model.h code for new SoCs.
David Daney
2015-02-20
5
-27
/
+90
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*
MIPS: OCTEON: Implement DCache errata workaround for all CN6XXX
David Daney
2015-02-20
3
-4
/
+8
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*
MIPS: OCTEON: Add little-endian support to asm/octeon/octeon.h
David Daney
2015-02-20
1
-30
/
+105
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MIPS: OCTEON: Implement the core-16057 workaround
David Daney
2015-02-20
1
-0
/
+22
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MIPS: OCTEON: Delete unused COP2 saving code
Aleksey Makarov
2015-02-20
1
-26
/
+0
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MIPS: OCTEON: Use correct instruction to read 64-bit COP0 register
Chandrakala Chavva
2015-02-20
1
-3
/
+3
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MIPS: OCTEON: Save and restore CP2 SHA3 state
David Daney
2015-02-20
3
-11
/
+35
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MIPS: OCTEON: Fix FP context save.
David Daney
2015-02-20
1
-12
/
+7
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MIPS: OCTEON: Save/Restore wider multiply registers in OCTEON III CPUs
David Daney
2015-02-20
4
-32
/
+150
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*
MIPS: boot: Provide more uImage options
Markos Chandras
2015-02-20
2
-2
/
+55
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MIPS: Remove unneeded #ifdef __KERNEL__ from asm/processor.h
David Daney
2015-02-20
1
-6
/
+0
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MIPS: ip22-gio: Remove legacy suspend/resume support
Lars-Peter Clausen
2015-02-20
2
-26
/
+0
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mips: pci: Add ifdef around pci_proc_domain
Zubair Lutfullah Kakakhel
2015-02-20
1
-0
/
+2
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MIPS: Alchemy: Fix cpu clock calculation
Manuel Lauss
2015-02-20
1
-0
/
+2
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MIPS: Alchemy: remove declaration for set_cpuspec
Manuel Lauss
2015-02-20
1
-1
/
+0
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MIPS: Alchemy: preset loops_per_jiffy based on CPU clock
Manuel Lauss
2015-02-20
2
-0
/
+9
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MIPS: Alchemy: fix Au1000/Au1500 LRCLK calculation
Manuel Lauss
2015-02-20
1
-5
/
+14
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MIPS: Add set/clear CP0 macros for PageGrain register
Steven J. Hill
2015-02-20
3
-4
/
+5
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MIPS: Usage and cosmetic cleanups of page table bits.
Steven J. Hill
2015-02-19
2
-62
/
+38
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*
Merge branch 'mipsr6-for-3.20' of git://git.linux-mips.org/pub/scm/mchandras/...
Ralf Baechle
2015-02-19
65
-415
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+4405
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\
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*
MIPS: Add Malta QEMU 32R6 defconfig
Markos Chandras
2015-02-17
1
-0
/
+193
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MIPS: Malta: Add support for building MIPS R6 kernel
Markos Chandras
2015-02-17
1
-0
/
+2
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MIPS: kernel: elf: Improve the overall ABI and FPU mode checks
Markos Chandras
2015-02-17
3
-132
/
+194
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MIPS: asm: fpu: Allow 64-bit FPU on MIPS32 R6
Markos Chandras
2015-02-17
1
-1
/
+2
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MIPS: kernel: process: Do not allow FR=0 on MIPS R6
Markos Chandras
2015-02-17
1
-0
/
+4
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MIPS: Handle MIPS IV, V and R2 FPU instructions on MIPS R6 as well
Markos Chandras
2015-02-17
2
-5
/
+6
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MIPS: Make use of the ERETNC instruction on MIPS R6
Markos Chandras
2015-02-17
5
-4
/
+28
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MIPS: kernel: mips-r2-to-r6-emul: Add R2 emulator for MIPS R6
Leonid Yegoshin
2015-02-17
8
-5
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+2518
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MIPS: asm: mipsregs: Add support for the LLADDR register
Markos Chandras
2015-02-17
1
-0
/
+2
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MIPS: Add LLB bit and related feature for the Config 5 CP0 register
Markos Chandras
2015-02-17
4
-0
/
+7
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MIPS: Emulate the new MIPS R6 BNEZC and JIALC instructions
Markos Chandras
2015-02-17
3
-1
/
+20
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