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* MIPS/IRQCHIP: Move Ingenic SoC intc driver to drivers/irqchipPaul Burton2015-06-214-204/+2
* MIPS: JZ4740: support newer SoC interrupt controllersPaul Burton2015-06-211-0/+9
* MIPS: JZ4740: Avoid JZ4740-specific namingPaul Burton2015-06-213-16/+16
* MIPS: JZ4740: read intc base address from DTPaul Burton2015-06-211-3/+6
* MIPS: JZ4740: define IRQ numbers based on number of intc IRQsPaul Burton2015-06-211-3/+7
* MIPS: JZ4740: support >32 interruptsPaul Burton2015-06-211-25/+46
* MIPS: JZ4740: Remove jz_intc_base globalPaul Burton2015-06-211-8/+31
* MIPS: JZ4740: drop intc debugfs codePaul Burton2015-06-211-42/+0
* MIPS: JZ4740: register an irq_domain for the interrupt controllerPaul Burton2015-06-211-0/+6
* MIPS: JZ4740: parse SoC interrupt controller parent IRQ from DTPaul Burton2015-06-211-1/+6
* MIPS: JZ4740: probe interrupt controller via DTPaul Burton2015-06-214-5/+18
* MIPS: JZ4740: Move arch_init_irq out of arch/mips/jz4740/irq.cPaul Burton2015-06-213-4/+11
* MIPS: JZ4740: use generic plat_irq_dispatchPaul Burton2015-06-211-12/+0
* MIPS: JZ4740: probe CPU interrupt controller via DTPaul Burton2015-06-212-2/+9
* MIPS/IRQCHIP: Move irq_chip from arch/mips to drivers/irqchip.Ralf Baechle2015-06-2111-225/+51
* MIPS: JZ4740: require & include DTPaul Burton2015-06-216-0/+43
* MIPS: ingenic: Add newer vendor IDsPaul Burton2015-06-212-3/+7
* MIPS: JZ4740: introduce CONFIG_MACH_INGENICPaul Burton2015-06-214-9/+13
* MIPS: DEC: Update CPU overridesMaciej W. Rozycki2015-06-211-0/+16
* MIPS: netlogic: remove unnecessary MTD partition probe specificationBrian Norris2015-06-211-3/+0
* MIPS: tlb-r3k: Optimise a TLBWI barrier in TLB invalidationMaciej W. Rozycki2015-06-211-2/+2
* MIPS: tlb-r3k: Move CP0.Wired register initialisation to `tlb_init'Maciej W. Rozycki2015-06-213-7/+8
* MIPS: tlb-r3k: Also invalidate wired TLB entries on bootMaciej W. Rozycki2015-06-211-11/+13
* MIPS: dump_tlb: Take XPA into accountJames Hogan2015-06-211-5/+13
* MIPS: dump_tlb: Take RI/XI bits into accountJames Hogan2015-06-211-7/+20
* MIPS: dump_tlb: Take EHINV bit into accountJames Hogan2015-06-211-0/+3
* MIPS: dump_tlb: Take global bit into accountJames Hogan2015-06-212-3/+12
* MIPS: dump_tlb: Make use of EntryLo bit definitionsJames Hogan2015-06-212-12/+12
* MIPS: dump_tlb: Refactor TLB matchingJames Hogan2015-06-211-30/+35
* MIPS: dump_tlb: Use tlbr hazard macrosJames Hogan2015-06-211-8/+3
* MIPS: mipsregs.h: Add EntryLo bit definitionsJames Hogan2015-06-211-0/+22
* MIPS: hazards: Add hazard macros for tlb readJames Hogan2015-06-211-0/+52
* MIPS: Add SysRq operation to dump TLBs on all CPUsJames Hogan2015-06-212-0/+78
* MIPS: traps: print Exception Code in __show_regs()Petri Gynther2015-06-211-3/+4
* MIPS: BCM47xx: Read board info for all bcma busesRafał Miłecki2015-06-213-29/+22
* MIPS: BCM47xx: Extract info about et2 interfaceRafał Miłecki2015-06-211-0/+6
* MIPS: BCM47xx: Extract all boardflags to new u32 fieldsRafał Miłecki2015-06-211-0/+3
* MIPS: BCM47XX: Simplify function looking for NVRAM entryRafał Miłecki2015-06-211-8/+5
* MIPS: BCM47XX: Make sure NVRAM buffer ends with \0Rafał Miłecki2015-06-211-4/+5
* MIPS: Malta: Make maltasmvp_defconfig useful again.Ralf Baechle2015-06-211-9/+8
* MIPS: ftrace: Enable support for syscall tracepoints.Ralf Baechle2015-06-211-0/+1
* MIPS: MSA: bugfix - disable MSA correctly for new threads/processes.Ralf Baechle2015-06-101-1/+1
* MIPS: Loongson: Do not register 8250 platform device from module.Ralf Baechle2015-06-101-3/+1
* MIPS: Cobalt: Do not build MTD platform device registration code as module.Ralf Baechle2015-06-101-2/+1
* MIPS: pgtable-bits: Fix XPA damage to R6 definitions.Markos Chandras2015-06-091-7/+7
* MIPS: KVM: Do not sign extend on unsigned MMIO loadNicholas Mc Guire2015-06-061-1/+1
* MIPS: BPF: Fix stack pointer allocationMarkos Chandras2015-06-061-5/+1
* MIPS: Loongson-3: Fix a cpu-hotplug issue in loongson3_ipi_interrupt()Huacai Chen2015-06-061-1/+1
* MIPS: Fix enabling of DEBUG_STACKOVERFLOWJames Hogan2015-06-061-1/+1
* MIPS: c-r4k: Fix typo in probe_scache()Joshua Kinard2015-06-061-1/+1
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