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* MIPS: pci-ar724x: avoid data bus error due to a missing PCIe moduleGabor Juhos2012-08-231-0/+22
| | | | | | | | | | | | | If the controller has no PCIe module attached, accessing of the device configuration space causes a data bus error. Avoid this by checking the status of the PCIe link in advance, and indicate an error if the link is down. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: stable@vger.kernel.org Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/4293/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Malta: Delete duplicate PCI fixup.Ralf Baechle2012-08-171-13/+0
| | | | | | | | | | 2ec8663f9c03a96f2c328c7c483603c31d62ad37 (lmo) rsp. 497e5ff03f58583ada469db8a1aa34eced9dd63e (kernel.org) [MIPS: Malta: Move PIIX4 PCI fixup to where it belongs.] attempted to move this PCI fixup but really only added it at it's new location without deleting the old instance. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: ath79: don't hardcode the unavailability of the DSP ASEGabor Juhos2012-08-171-1/+0
| | | | | | | | | | | | | | The ath79 platform code allows to run a single kernel image on various SoCs which are based on the 24Kc and 74Kc cores. The current code explicitely disables the DSP ASE, but that is available in the 74Kc core. Remove the override in order to let the kernel to detect the availability of the DSP ASE at runtime. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/4222/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Synchronize MIPS count one CPU at a timeJayachandran C2012-08-173-21/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | The current implementation of synchronise_count_{master,slave} blocks slave CPUs in early boot until all of them come up. This no longer works because blocking a CPU with interrupts off after notifying the CPU to be online causes problems with the current kernel. Specifically, after the workqueue changes (commit a08489c569dc1 "Pull workqueue changes from Tejun Heo") the CPU_ONLINE notification callback workqueue_cpu_up_callback() will hang on wait_for_completion(&idle_rebind.done), if the slave CPUs are blocked for synchronize_count_slave(). The changes are to update synchronize_count_{master,slave}() to handle one CPU at a time and to call synchronise_count_master() in __cpu_up() so that the CPU_ONLINE notification goes out only after the COP0 COUNT register is synchronized. [ralf@linux-mips.org: This matter only to those few platforms which are using the cp0 counter as their clocksource which are XLP, XLR and MIPS' CMP solution.] Signed-off-by: Jayachandran C <jchandra@broadcom.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/4216/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: BCM63xx: Fix SPI message control register handling for BCM6338/6348.Florian Fainelli2012-08-173-3/+16
| | | | | | | | | | | | | | | | | | | | | BCM6338 and BCM6348 have a message control register width of 8 bits, instead of 16-bits like what the SPI driver assumes right now. Also the SPI message type shift value of 14 is actually 6 for these SoCs. This resulted in transmit FIFO corruption because we were writing 16-bits to an 8-bits wide register, thus spanning on the first byte of the transmit FIFO, which had already been filed in bcm63xx_spi_fill_txrx_fifo(). Fix this by passing the message control register width and message type shift through platform data back to the SPI driver so that it can use it properly. Signed-off-by: Florian Fainelli <florian@openwrt.org> Cc: linux-mips@linux-mips.org Cc: grant.likely@secretlab.ca Cc: spi-devel-general@lists.sourceforge.net Cc: jonas.gorski@gmail.com Patchwork: https://patchwork.linux-mips.org/patch/3983/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Module: Deal with malformed HI16/LO16 relocation sequences.Ralf Baechle2012-08-171-7/+28
| | | | | | | | In case a series of R_MIPS_HI16 relocations was not followed by an R_MIPS_LO16 relocation we were leaking the hi16 relocation chain. Handle that error and return an error. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Fix race condition in module relocation code.Ralf Baechle2012-08-172-7/+7
| | | | | | | | | | | | | | | The relocation code was essentially taken from the 2.4 modutils which perform relocation in userspace. In 2.6 relocation of multiple modules may be performed in parallel by the in-kernel loader so the global variable mips_hi16_list won't fly anymore. Fix race by moving it into mod_arch_specific. [ralf@linux-mips.org: folded in Tony's followup fix. Thanks Tony!] Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Tony Wu <tung7970@gmail.com> Cc: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/4189/
* MIPS: Fix memory leak in error path of HI16/LO16 relocation handling.Ralf Baechle2012-08-171-2/+7
| | | | | | | | | | Commit 6f5d2e970452b5c86906adcb8e7ad246f535ba39 (lmo) / 477c4b07406357ad93d0e32788dbf3ee814eadaa (kernel.org) [[MIPS: VPE: Free relocation chain on error.] fixed the same issue in the vpe loader in 2009 but back then the same bug in module.c went unfixed. Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Reported-by: Akhilesh Kumar <akhilesh.lxr@gmail.com>
* MIPS: MTX-1: Add udelay to mtx1_pci_idselBruno Randolf2012-08-171-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Without this udelay(1) PCI idsel does not work correctly on the "singleboard" (T-Mobile Surfbox) for the MiniPCI device. The result is that PCI configuration fails and the MiniPCI card is not detected correctly. Instead of PCI host bridge to bus 0000:00 pci_bus 0000:00: root bus resource [mem 0x40000000-0x4fffffff] pci_bus 0000:00: root bus resource [io 0x1000-0xffff] pci 0000:00:03.0: BAR 0: assigned [mem 0x40000000-0x4000ffff] pci 0000:00:00.0: BAR 0: assigned [mem 0x40010000-0x40010fff] pci 0000:00:00.1: BAR 0: assigned [mem 0x40011000-0x40011fff] We see only the CardBus device: PCI host bridge to bus 0000:00 pci_bus 0000:00: root bus resource [mem 0x40000000-0x4fffffff] pci_bus 0000:00: root bus resource [io 0x1000-0xffff] pci 0000:00:00.0: BAR 0: assigned [mem 0x40000000-0x40000fff] pci 0000:00:00.1: BAR 0: assigned [mem 0x40001000-0x40001fff] Later the device driver shows this error: ath5k 0000:00:03.0: cannot remap PCI memory region ath5k: probe of 0000:00:03.0 failed with error -5 I assume that the logic chip which usually supresses the signal to the CardBus card has some settling time and without the delay it would still let the Cardbus interfere with the response from the MiniPCI card. What I cannot explain is why this behaviour shows up now and not in earlier kernel versions before. Maybe older PCI code was slower? Signed-off-by: Bruno Randolf <br1@einfach.org> Cc: linux-mips@linux-mips.org Cc: manuel.lauss@googlemail.com Cc: florian@openwrt.org Patchwork: https://patchwork.linux-mips.org/patch/4087/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: ath79: select HAVE_CLKGabor Juhos2012-08-171-0/+1
| | | | | | | | | | | | | | | | | | | | It is needed in order to get rid of the following errors: arch/mips/ath79/clock.c:353:13: error: redefinition of 'clk_get' include/linux/clk.h:281:27: note: previous definition of 'clk_get' was here arch/mips/ath79/clock.c:377:5: error: redefinition of 'clk_enable' include/linux/clk.h:295:19: note: previous definition of 'clk_enable' was here arch/mips/ath79/clock.c:383:6: error: redefinition of 'clk_disable' include/linux/clk.h:300:20: note: previous definition of 'clk_disable' was here arch/mips/ath79/clock.c:388:15: error: redefinition of 'clk_get_rate' include/linux/clk.h:302:29: note: previous definition of 'clk_get_rate' was here arch/mips/ath79/clock.c:394:6: error: redefinition of 'clk_put' include/linux/clk.h:291:20: note: previous definition of 'clk_put' was here Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/4170/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: ath79: Use correct IRQ number for the OHCI controller on AR7240Gabor Juhos2012-08-171-0/+2
| | | | | | | | | | | | | | | | | | | | | | The currently assigned IRQ number to the OHCI controller is incorrect for the AR7240 SoC, and that leads to the following error message from the OHCI driver: ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver ath79-ohci ath79-ohci: Atheros built-in OHCI controller ath79-ohci ath79-ohci: new USB bus registered, assigned bus number 1 ath79-ohci ath79-ohci: irq 14, io mem 0x1b000000 hub 1-0:1.0: USB hub found hub 1-0:1.0: 1 port detected usb 1-1: new full-speed USB device number 2 using ath79-ohci ath79-ohci ath79-ohci: Unlink after no-IRQ? Controller is probably using the wrong IRQ. Fix this by using the correct IRQ number. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/4168/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: ath79: Fix number of GPIO lines for AR724[12]Gabor Juhos2012-08-172-3/+6
| | | | | | | | | The AR724[12] SoCs have more GPIO lines than the AR7240. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Cc: linux-mips@linux-mips.org Patchwork: https://http://patchwork.linux-mips.org/patch/4167/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Octeon: Fix broken interrupt controller code.David Daney2012-08-172-55/+44
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since 3.6.0-rc1, We are getting many messages like: WARNING: at kernel/irq/irqdomain.c:444 irq_domain_associate_many+0x23c/0x260() Modules linked in: Call Trace: [<ffffffff814cb698>] dump_stack+0x8/0x34 [<ffffffff81133d00>] warn_slowpath_common+0x78/0xa8 [<ffffffff81187e44>] irq_domain_associate_many+0x23c/0x260 [<ffffffff81187f38>] irq_create_mapping+0xd0/0x220 [<ffffffff81188104>] irq_create_of_mapping+0x7c/0x158 [<ffffffff813e5f08>] irq_of_parse_and_map+0x28/0x40 . . . Both the CIU and GPIO interrupt domains were somewhat screwed up. For the CIU domain, we need to call irq_domain_associate() for each of the preassigned irq numbers. For the GPIO domain, we were applying the register bit offset in octeon_irq_gpio_xlat, but it should be done in octeon_irq_gpio_map instead. Also: Reserve all 8 'core' irqs for the 'core' irq_chip so that they don't get used by the other domains. Remove unused OCTEON_IRQ_* symbols. Signed-off-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/4190/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linusLinus Torvalds2012-08-0214-72/+108
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull MIPS updates from Ralf Baechle: "The lion share of this pull request are fixes for clk-related breakage caused by other changes during this merge window. For some platforms the fix was as simple as selecting HAVE_CLK, for others like the Loongson 2 significant restructuring was required. The remainder are changes required to get the Lantiq code to work again." * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: MIPS: Loongson 2: Sort out clock managment. MIPS: Loongson 1: more clk support and add select HAVE_CLK MIPS: txx9: Fix redefinition of clk_* by adding select HAVE_CLK MIPS: BCM63xx: Fix redefinition of clk_* by adding select HAVE_CLK MIPS: AR7: Fix redefinition of clk_* by adding select HAVE_CLK MIPS: Lantiq: Platform specific CLK fixup MIPS: Lantiq: Add device_tree_init function MIPS: Lantiq: Fix interface clock and PCI control register offset
| * MIPS: Loongson 2: Sort out clock managment.Ralf Baechle2012-08-017-51/+33
| | | | | | | | | | | | | | For unexplainable reasons the Loongson 2 clock API was implemented in a module so fixing this involved shifting large amounts of code around. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Loongson 1: more clk support and add select HAVE_CLKYoichi Yuasa2012-08-012-0/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This fixes a redefinition of clk_*: arch/mips/loongson1/common/clock.c:23:13: error: redefinition of 'clk_get' include/linux/clk.h:281:27: note: previous definition of 'clk_get' was here arch/mips/loongson1/common/clock.c:41:15: error: redefinition of 'clk_get_rate' include/linux/clk.h:302:29: note: previous definition of 'clk_get_rate' was here make[3]: *** [arch/mips/loongson1/common/clock.o] Error 1 Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org> Cc: linux-mips@linux-mips.org Reviewed-by: John Crispin <blogic@openwrt.org> Acked-by: Kelvin Cheung <keguang.zhang@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/4143/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: txx9: Fix redefinition of clk_* by adding select HAVE_CLKYoichi Yuasa2012-08-011-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | arch/mips/txx9/generic/setup.c:87:13: error: redefinition of 'clk_get' include/linux/clk.h:281:27: note: previous definition of 'clk_get' was here arch/mips/txx9/generic/setup.c:97:5: error: redefinition of 'clk_enable' include/linux/clk.h:295:19: note: previous definition of 'clk_enable' was here arch/mips/txx9/generic/setup.c:103:6: error: redefinition of 'clk_disable' include/linux/clk.h:300:20: note: previous definition of 'clk_disable' was here arch/mips/txx9/generic/setup.c:108:15: error: redefinition of 'clk_get_rate' include/linux/clk.h:302:29: note: previous definition of 'clk_get_rate' was here arch/mips/txx9/generic/setup.c:114:6: error: redefinition of 'clk_put' include/linux/clk.h:291:20: note: previous definition of 'clk_put' was here make[3]: *** [arch/mips/txx9/generic/setup.o] Error 1 Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org> Cc: linux-mips@linux-mips.org Reviewed-by: John Crispin <blogic@openwrt.org> Patchwork: https://patchwork.linux-mips.org/patch/4142/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: BCM63xx: Fix redefinition of clk_* by adding select HAVE_CLKYoichi Yuasa2012-08-011-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | arch/mips/bcm63xx/clk.c:249:5: error: redefinition of 'clk_enable' include/linux/clk.h:295:19: note: previous definition of 'clk_enable' was here arch/mips/bcm63xx/clk.c:259:6: error: redefinition of 'clk_disable' include/linux/clk.h:300:20: note: previous definition of 'clk_disable' was here arch/mips/bcm63xx/clk.c:268:15: error: redefinition of 'clk_get_rate' include/linux/clk.h:302:29: note: previous definition of 'clk_get_rate' was here arch/mips/bcm63xx/clk.c:275:13: error: redefinition of 'clk_get' include/linux/clk.h:281:27: note: previous definition of 'clk_get' was here arch/mips/bcm63xx/clk.c:302:6: error: redefinition of 'clk_put' include/linux/clk.h:291:20: note: previous definition of 'clk_put' was here make[2]: *** [arch/mips/bcm63xx/clk.o] Error 1 Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org> Cc: linux-mips@linux-mips.org Reviewed-by: John Crispin <blogic@openwrt.org> Patchwork: https://patchwork.linux-mips.org/patch/4141/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: AR7: Fix redefinition of clk_* by adding select HAVE_CLKYoichi Yuasa2012-08-011-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | arch/mips/ar7/clock.c:420:5: error: redefinition of 'clk_enable' include/linux/clk.h:295:19: note: previous definition of 'clk_enable' was here arch/mips/ar7/clock.c:426:6: error: redefinition of 'clk_disable' include/linux/clk.h:300:20: note: previous definition of 'clk_disable' was here arch/mips/ar7/clock.c:431:15: error: redefinition of 'clk_get_rate' include/linux/clk.h:302:29: note: previous definition of 'clk_get_rate' was here arch/mips/ar7/clock.c:437:13: error: redefinition of 'clk_get' include/linux/clk.h:281:27: note: previous definition of 'clk_get' was here arch/mips/ar7/clock.c:454:6: error: redefinition of 'clk_put' include/linux/clk.h:291:20: note: previous definition of 'clk_put' was here make[2]: *** [arch/mips/ar7/clock.o] Error 1 Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org> Cc: linux-mips@linux-mips.org Reviewed-by: John Crispin <blogic@openwrt.org> Acked-by: Florian Fainelli <florian@openwrt.org> Patchwork: https://patchwork.linux-mips.org/patch/4140/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Lantiq: Platform specific CLK fixupJohn Crispin2012-08-011-0/+5
| | | | | | | | | | | | | | | | | | | | As we use CLKDEV_LOOKUP but dont have support for COMMON_CLK yet, we need to provide our own version of of_clk_get_from_provider(). Signed-off-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/4117/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Lantiq: Add device_tree_init functionJohn Crispin2012-08-011-0/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a lantiq specific version of device_tree_init. The generic MIPS version was removed by. commit 594e966bc412d64eec9282d28ce511bdd62fea39 Author: David Daney <david.daney@cavium.com> Date: Thu Jul 5 18:12:38 2012 +0200 MIPS: Prune some target specific code out of prom.c Signed-off-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/4116/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Lantiq: Fix interface clock and PCI control register offsetJohn Crispin2012-08-011-21/+28
| | | | | | | | | | | | | | | | | | | | | | The XRX200 based SoC have a different register offset for the interface clock and PCI control registers. This patch detects the SoC and sets the register offset at runtime. This make PCI work on the VR9 SoC. Signed-off-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/4113/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | mips: zero out pg_data_t when it's allocatedMinchan Kim2012-08-011-0/+1
|/ | | | | | | | | | | | This patch is preparation for the next patch which removes the zeroing of the pg_data_t in core MM. All archs except MIPS already do this. Signed-off-by: Minchan Kim <minchan@kernel.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Tejun Heo <tj@kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* Merge branch 'akpm' (Andrew's patch-bomb)Linus Torvalds2012-07-312-1/+2
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Merge Andrew's first set of patches: "Non-MM patches: - lots of misc bits - tree-wide have_clk() cleanups - quite a lot of printk tweaks. I draw your attention to "printk: convert the format for KERN_<LEVEL> to a 2 byte pattern" which looks a bit scary. But afaict it's solid. - backlight updates - lib/ feature work (notably the addition and use of memweight()) - checkpatch updates - rtc updates - nilfs updates - fatfs updates (partial, still waiting for acks) - kdump, proc, fork, IPC, sysctl, taskstats, pps, etc - new fault-injection feature work" * Merge emailed patches from Andrew Morton <akpm@linux-foundation.org>: (128 commits) drivers/misc/lkdtm.c: fix missing allocation failure check lib/scatterlist: do not re-write gfp_flags in __sg_alloc_table() fault-injection: add tool to run command with failslab or fail_page_alloc fault-injection: add selftests for cpu and memory hotplug powerpc: pSeries reconfig notifier error injection module memory: memory notifier error injection module PM: PM notifier error injection module cpu: rewrite cpu-notifier-error-inject module fault-injection: notifier error injection c/r: fcntl: add F_GETOWNER_UIDS option resource: make sure requested range is included in the root range include/linux/aio.h: cpp->C conversions fs: cachefiles: add support for large files in filesystem caching pps: return PTR_ERR on error in device_create taskstats: check nla_reserve() return sysctl: suppress kmemleak messages ipc: use Kconfig options for __ARCH_WANT_[COMPAT_]IPC_PARSE_VERSION ipc: compat: use signed size_t types for msgsnd and msgrcv ipc: allow compat IPC version field parsing if !ARCH_WANT_OLD_COMPAT_IPC ipc: add COMPAT_SHMLBA support ...
| * ipc: use Kconfig options for __ARCH_WANT_[COMPAT_]IPC_PARSE_VERSIONWill Deacon2012-07-312-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rather than #define the options manually in the architecture code, add Kconfig options for them and select them there instead. This also allows us to select the compat IPC version parsing automatically for platforms using the old compat IPC interface. Reported-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Will Deacon <will.deacon@arm.com> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Chris Metcalf <cmetcalf@tilera.com> Cc: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
| * atomic64_test: simplify the #ifdef for atomic64_dec_if_positive() testCatalin Marinas2012-07-311-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | Introduce CONFIG_ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE and use this instead of the multitude of #if defined() checks in atomic64_test.c Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Paul Mackerras <paulus@samba.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* | Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linusLinus Torvalds2012-07-30130-1932/+6224
|\ \ | |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull MIPS updates from Ralf Baechle: "More hardware support across the field including a bunch of device drivers. The highlight however really are further steps towards device tree. This has been sitting in -next for ages. All MIPS _defconfigs have been tested to boot or where I don't have hardware available, to at least build fine." * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (77 commits) MIPS: Loongson 1B: Add defconfig MIPS: Loongson 1B: Add board support MIPS: Netlogic: early console fix MIPS: Netlogic: Fix indentation of smpboot.S MIPS: Netlogic: remove cpu_has_dc_aliases define for XLP MIPS: Netlogic: Remove unused pcibios_fixups MIPS: Netlogic: Add XLP SoC devices in FDT MIPS: Netlogic: Add IRQ mappings for more devices MIPS: Netlogic: USB support for XLP MIPS: Netlogic: XLP PCIe controller support. MIPS: Netlogic: Platform changes for XLR/XLS I2C MIPS: Netlogic: Platform NAND/NOR flash support MIPS: Netlogic: Platform changes for XLS USB MIPS: Netlogic: Remove NETLOGIC_ prefix MIPS: Netlogic: SMP wakeup code update MIPS: Netlogic: Update comments in smpboot.S MIPS: BCM63XX: Add 96328avng reference board MIPS: Expose PCIe drivers for MIPS MIPS: BCM63XX: Add PCIe Support for BCM6328 MIPS: BCM63XX: Move the PCI initialization into its own function ...
| *-----------. Merge branches 'next/generic', 'next/alchemy', 'next/bcm63xx', ↵Ralf Baechle2012-07-25130-1932/+6224
| |\ \ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | 'next/cavium', 'next/jz4740', 'next/lantiq', 'next/loongson1b' and 'next/netlogic' into mips-for-linux-next
| | | | | | | | * MIPS: Netlogic: early console fixJayachandran C2012-07-241-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In prom_putchar(), wait for just the TX empty bit to clear in the UART LSR. Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com> Cc: linux-mips@linux-mips.org Cc: Florian Fainelli <florian@openwrt.org> Patchwork: https://patchwork.linux-mips.org/patch/4112/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| | | | | | | | * MIPS: Netlogic: Fix indentation of smpboot.SJayachandran C2012-07-241-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | [ralf@linux-mips.org: I've folded most segments of this patch into those patches in -next that originally were causing the whitespace damage. This is just what's left over] Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/4094/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| | | | | | | | * MIPS: Netlogic: remove cpu_has_dc_aliases define for XLPJayachandran C2012-07-241-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On XLP, the dcache size depends on the number of enabled threads in core. There are no dcache aliases if the pagesize is large enough or if enough threads are enabled in the core. Remove the #define for cpu_has_dc_aliases and leave it to be computed at runtime. Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/4099/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| | | | | | | | * MIPS: Netlogic: Remove unused pcibios_fixupsJayachandran C2012-07-241-4/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This global is unneeded, and seems to be carried over from ancient code. Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3752/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| | | | | | | | * MIPS: Netlogic: Add XLP SoC devices in FDTGanesan Ramalingam2012-07-241-0/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Probe and add devices on SoC "simple-bus" on startup. This will in turn add devices like I2C controller that are specified in the device tree under 'soc'. Signed-off-by: Ganesan Ramalingam <ganesanr@broadcom.com> Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3762/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| | | | | | | | * MIPS: Netlogic: Add IRQ mappings for more devicesJayachandran C2012-07-242-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add IRT to IRQ translation for the MMC and I2C IRQs. Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3761/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| | | | | | | | * MIPS: Netlogic: USB support for XLPGanesan Ramalingam2012-07-248-2/+225
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The XLP USB controller appears as a device on the internal SoC PCIe bus, the block has 2 EHCI blocks and 4 OHCI blocks. Change are to: * Add files netlogic/xlp/usb-init.c and asm/netlogic/xlp-hal/usb.h to initialize the USB controller and define PCI fixups. The PCI fixups are to setup interrupts and DMA mask. * Update include/asm/xlp-hal/{iomap.h,pic.h,xlp.h} to add interrupt mapping for EHCI/OHCI interrupts. Signed-off-by: Ganesan Ramalingam <ganesanr@netlogicmicro.com> Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3756/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| | | | | | | | * MIPS: Netlogic: XLP PCIe controller support.Ganesan Ramalingam2012-07-247-3/+350
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adds support for the XLP on-chip PCIe controller. On XLP, the on-chip devices(including the 4 PCIe links) appear in the PCIe configuration space of the XLP as PCI devices. The changes are to initialize and register the PCIe controller, enable hardware byte swap in the PCIe IO and MEM space, and to enable PCIe interrupts. Signed-off-by: Ganesan Ramalingam <ganesanr@netlogicmicro.com> Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3760/ Patchwork: https://patchwork.linux-mips.org/patch/4104/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| | | | | | | | * MIPS: Netlogic: Platform changes for XLR/XLS I2CJayachandran C2012-07-242-0/+55
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add platform code for XLR/XLS I2C controller and devices. Add devices on the I2C bus on the XLR/XLS developement boards. Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3757/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| | | | | | | | * MIPS: Netlogic: Platform NAND/NOR flash supportGanesan Ramalingam2012-07-244-1/+380
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Changes to add support for the boot NOR flash on XLR boards and the boot NAND/NOR flash drivers on the XLS boards. Signed-off-by: Ganesan Ramalingam <ganesanr@netlogicmicro.com> Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3758/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| | | | | | | | * MIPS: Netlogic: Platform changes for XLS USBJayachandran C2012-07-242-0/+91
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add USB initialization code, setup resources and add USB platform driver in mips/netlogic/xlr/platform.c. Add USB support for XLR/XLS platform in Kconfig. Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3759/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| | | | | | | | * MIPS: Netlogic: Remove NETLOGIC_ prefixJayachandran C2012-07-242-30/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove NETLOGIC_ prefix from gpio register definitions, this will bring it in-line with the other Netlogic headers. Having NETLOGIC prefix here is misleading because these are XLR/XLS specific register definitions. Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3754/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| | | | | | | | * MIPS: Netlogic: SMP wakeup code updateJayachandran C2012-07-242-6/+45
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update for core intialization code. Initialize status register after receiving NMI for CPU wakeup. Add the low level L1D flush code before enabling threads in core. Also convert the ehb to _ehb so that it works under more GCC versions. Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3755/ Patchwork: https://patchwork.linux-mips.org/patch/4095/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| | | | | | | | * MIPS: Netlogic: Update comments in smpboot.SJayachandran C2012-07-241-48/+58
| | |_|_|_|_|_|/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | No change in logic, comments update and whitespace cleanup. * A few comments in the file were in assembler style and the rest int C style, convert all of them to C style. * Mark workarounds for Ax silicon with a macro XLP_AX_WORKAROUND * Whitespace fixes - use tabs consistently * rename __config_lsu macro to xlp_config_lsu Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3749/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| | | | | | | * MIPS: Loongson 1B: Add defconfigKelvin Cheung2012-07-251-0/+109
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Kelvin Cheung <keguang.zhang@gmail.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Cc: wuzhangjin@gmail.com Cc: zhzhl555@gmail.com Cc: Kelvin Cheung <keguang.zhang@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/4135/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| | | | | | | * MIPS: Loongson 1B: Add board supportKelvin Cheung2012-07-2521-0/+954
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adds basic platform devices for Loongson 1B, including serial port, ethernet, USB, RTC and interrupt handler. The Loongson 1B UART is compatible with NS16550A, the Loongson 1B GMAC is built around a Synopsys IP Core. Use normal instead of enhanced descriptors. Thanks to Giuseppe for updating the normal descriptor in stmmac driver. Thanks to Zhao Zhang for implementing the RTC driver. Signed-off-by: Kelvin Cheung <keguang.zhang@gmail.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Cc: wuzhangjin@gmail.com Cc: zhzhl555@gmail.com Cc: Kelvin Cheung <keguang.zhang@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/4133/ Patchwork: https://patchwork.linux-mips.org/patch/4134/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| | | | | | | * MIPS: Add CPU support for Loongson1BKelvin Cheung2012-07-237-144/+171
| | |_|_|_|_|/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Loongson 1B is a 32-bit SoC designed by Institute of Computing Technology (ICT) and the Chinese Academy of Sciences (CAS), which implements the MIPS32 release 2 instruction set. [ralf@linux-mips.org: But which is not strictly a MIPS32 compliant device which also is why it identifies itself with the Legacy Vendor ID in the PrID register. When applying the patch I shoveled some code around to keep things in alphabetical order and avoid forward declarations.] Signed-off-by: Kelvin Cheung <keguang.zhang@gmail.com> Cc: To: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Cc: wuzhangjin@gmail.com Cc: zhzhl555@gmail.com Cc: Kelvin Cheung <keguang.zhang@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/3976/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| | | | | | * MIPS: Enable vmlinuz for JZ4740Lluís Batlle i Rossell2012-07-233-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for building a compressed kernel for the JZ4740 architecture. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Maarten ter Huurne <maarten@treewalker.org> Cc: Sergei Shtylyov <sshtylyov@mvista.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3563/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| | | | | | * MIPS: JZ4740: reset: Initialize hibernate wakeup counters.Maarten ter Huurne2012-07-231-5/+44
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In hibernation mode only the wakeup logic and the RTC are left running, so this is what users perceive as power down. If the counters are not initialized, the corresponding pin (typically connected to the power button) has to be asserted for two seconds before the device wakes up. Most users expect a shorter wakeup time. I took the timing values of 100 ms and 60 ms from BouKiCHi's patch for the Dingoo A320 kernel. Signed-off-by: Maarten ter Huurne <maarten@treewalker.org> Cc: Sergei Shtylyov <sshtylyov@mvista.com> Cc: Lars-Peter Clausen <lars@metafoo.de> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3563/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| | | | | | * MIPS: JZ4740: qi_lb60: Look for NAND chip in bank 1.Maarten ter Huurne2012-07-231-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | All NanoNotes have their NAND in bank 1. Specifying the bank is required since multi-bank support was introduced. Signed-off-by: Maarten ter Huurne <maarten@treewalker.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3561/ Acked-By: David Woodhouse <David.Woodhouse@intel.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| | | | | | * MTD: NAND: JZ4740: Multi-bank support with autodetectionMaarten ter Huurne2012-07-232-1/+23
| | |_|_|_|/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The platform data can now specify which external memory banks to probe for NAND chips, and in which order. Banks that contain a NAND are used and the other banks are freed. Squashed version of development done in jz-2.6.38 branch. Original patch by Lars-Peter Clausen with some bug fixes from me. Thanks to Paul Cercueil for the initial autodetection patch. Signed-off-by: Maarten ter Huurne <maarten@treewalker.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3560/ Acked-By: David Woodhouse <David.Woodhouse@intel.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| | | | | * MIPS: Octeon: Use device tree to register serial ports.David Daney2012-07-232-85/+53
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Switch to using the device tree to register serial ports. Add all the ports with compatible = "cavium,octeon-3860-uart". Octeon serial ports have their own device type, required port flags, and I/O functions, so using of_serial.c is not indicated. We need to do this as late_initcall, as the 8250 driver must be initialized before we add any ports. 8250 initialization is done at device_initcall time. The OCTEON_IRQ_UART{0,1,2} symbols are removed as they are now unused and interfere with irq_domain used by the device tree code. Signed-off-by: David Daney <david.daney@cavium.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Cc: linux-mips@linux-mips.org Cc: devicetree-discuss@lists.ozlabs.org Cc: Rob Herring <rob.herring@calxeda.com> Cc: linux-kernel@vger.kernel.org Cc: David Daney <david.daney@cavium.com> Patchwork: https://patchwork.linux-mips.org/patch/3942/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-27 23:35:36 +0100