| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | openrisc: Implement proper SMP tlb flushing | Stafford Horne | 2020-08-04 | 1 | -8/+77 |
| * | openrisc: use mmgrab | Julia Lawall | 2020-01-31 | 1 | -1/+2 |
| * | openrisc: fix possible deadlock scenario during timer sync | Stafford Horne | 2017-11-03 | 1 | -1/+1 |
| * | openrisc: add tick timer multi-core sync logic | Stafford Horne | 2017-11-03 | 1 | -0/+3 |
| * | openrisc: add cacheflush support to fix icache aliasing | Jan Henrik Weinstock | 2017-11-03 | 1 | -0/+15 |
| * | openrisc: sleep instead of spin on secondary wait | Stafford Horne | 2017-11-03 | 1 | -0/+5 |
| * | openrisc: fix initial preempt state for secondary cpu tasks | Stafford Horne | 2017-11-03 | 1 | -0/+1 |
| * | openrisc: initial SMP support | Stefan Kristiansson | 2017-11-03 | 1 | -0/+235 |
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