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* powerpc/t2080qds: fix rtc interruptShengzhou Liu2015-04-011-1/+1
| | | | | | | | RTC interrupt uses IRQ11 on T2080QDS. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> [scottwood@freescale.com: fix subject line] Signed-off-by: Scott Wood <scottwood@freescale.com>
* powerpc/mpc85xx: Add FSL QorIQ DPAA BMan support to device tree(s)Kumar Gala2015-03-2426-22/+899
| | | | | | | | | | | Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Geoff Thorpe <Geoff.Thorpe@freescale.com> Signed-off-by: Hai-Ying Wang <Haiying.Wang@freescale.com> Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com> Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> [Emil Medve: Sync with the upstream binding] Signed-off-by: Emil Medve <Emilian.Medve@Freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* powerpc/dts: Remove B4860 emulator supportEmil Medve2015-03-241-223/+0
| | | | | | | Probably we should have not upstreamed this in the first place Signed-off-by: Emil Medve <Emilian.Medve@Freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* powerpc: dts: pq3/85xx: Fix GPIO addressAlessio Igor Bogani2015-01-301-3/+3
| | | | | | | Fix the GPIO address in the device tree to match the documented location. Signed-off-by: Alessio Igor Bogani <alessio.bogani@elettra.eu> Signed-off-by: Scott Wood <scottwood@freescale.com>
* powerpc/mpc85xx: Create dts components for the FSL QorIQ DPAA QManKumar Gala2015-01-303-0/+183
| | | | | | | | | | Change-Id: I16e63db731e55a3d60d4e147573c1af8718082d3 Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Geoff Thorpe <Geoff.Thorpe@freescale.com> Signed-off-by: Hai-Ying Wang <Haiying.Wang@freescale.com> [Emil Medve: Sync with the upstream binding] Signed-off-by: Emil Medve <Emilian.Medve@Freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* powerpc/mpc85xx: Create dts components for the FSL QorIQ DPAA BManKumar Gala2015-01-302-0/+131
| | | | | | | | | Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Geoff Thorpe <Geoff.Thorpe@freescale.com> Signed-off-by: Hai-Ying Wang <Haiying.Wang@freescale.com> [Emil Medve: Sync with the upstream binding] Signed-off-by: Emil Medve <Emilian.Medve@Freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* powerpc/85xx: Add support for Emerson/Artesyn MVME2500.Alessio Igor Bogani2015-01-301-0/+280
| | | | | | | | | | | | | | | | | | | | | | Add support for the Artesyn MVME2500 Single Board Computer. The MVME2500 is a 6U form factor VME64 computer with: - A single Freescale QorIQ P2010 CPU - 1 GB of DDR3 onboard memory - Three Gigabit Ethernets - Five 16550 compatible UARTS - One USB 2.0 port, one SHDC socket and one SATA connector - One PCI/PCI eXpress Mezzanine Card (PMC/XMC) Slot - MultiProcessor Interrupt Controller (MPIC) - A DS1375T Real Time Clock (RTC) and 512 KB of Non-Volatile Memory - Two 64 KB EEPROMs - U-Boot in 16 SPI Flash This patch is based on linux-3.18 and has been boot tested. Signed-off-by: Alessio Igor Bogani <alessio.bogani@elettra.eu> Signed-off-by: Scott Wood <scottwood@freescale.com>
* powerpc/mpc85xx: Add ranges to etsec2 nodesScott Wood2015-01-303-0/+3
| | | | | | | | | | | Commit 746c9e9f92dd "of/base: Fix PowerPC address parsing hack" limited the applicability of the workaround whereby a missing ranges is treated as an empty ranges. This workaround was hiding a bug in the etsec2 device tree nodes, which have children with reg, but did not have ranges. Signed-off-by: Scott Wood <scottwood@freescale.com> Reported-by: Alexander Graf <agraf@suse.de>
* powerpc/dts: Remove T4240 emulator supportEmil Medve2015-01-301-281/+0
| | | | | | | Probably we should have not upstreamed this in the first place Signed-off-by: Emil Medve <Emilian.Medve@Freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* powerpc/dts: Add node(s) for the platform PLLEmil Medve2014-11-082-0/+14
| | | | | | Signed-off-by: Emil Medve <Emilian.Medve@Freescale.com> Change-Id: If76cd705a01813abe53396c1486bc13c4289ee92 Signed-off-by: Scott Wood <scottwood@freescale.com>
* powerpc/dts: Factorize the clock control nodeEmil Medve2014-11-0814-368/+163
| | | | | | Signed-off-by: Emil Medve <Emilian.Medve@Freescale.com> Change-Id: I25ce24a25862b4ca460164159867abefe00ccdd1 Signed-off-by: Scott Wood <scottwood@freescale.com>
* powerpc: Add INA220 to device tree for supported boardsHongtao Jia2014-11-084-0/+72
| | | | | | | Including: P3041DS P5020DS P5040DS B4QDS Signed-off-by: Jia Hongtao <hongtao.jia@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* powerpc: Add ADT7461 to device tree for supported boardsHongtao Jia2014-11-083-0/+29
| | | | | | | Including: T104xRDB T208xQDS B4QDS Signed-off-by: Jia Hongtao <hongtao.jia@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* powerpc/mpc85xx: Remove SPI and NAND partition from bsc9131rdb.dtsiAshish Kumar2014-11-081-50/+0
| | | | | | | | | | | * Run "mtdparts default" on u-boot to create dynamic partitions * Or use dynamic mtd partition with the help of bootargs in u-boot Append bootargs with: "mtdparts=ff800000.flash:1m(nand_uboot),512K(nand_dtb),8m(nand_kernel),-(fs);\ spiff707000.0:1m(spi_uboot),4m(spi_kernel),512k(spi_dtb),-(fs)'" Signed-off-by: Ashish Kumar <Ashish.Kumar@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* Merge branch 'next' of ↵Michael Ellerman2014-10-046-4/+313
|\ | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/scottwood/linux.git Freescale updates from Scott (27 commits): "Highlights include DMA32 zone support (SATA, USB, etc now works on 64-bit FSL kernels), MSI changes, 8xx optimizations and cleanup, t104x board support, and PrPMC PCI enumeration."
| * powerpc: dts: t208x: Change T208x USB controller versionNikhil Badola2014-09-171-2/+2
| | | | | | | | | | | | | | Change USB controller version to 2.5 in compatible string for T2080/T2081 Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * powerpc/fsl-booke: Add initial T1042RDB_PI board supportPriyanka Jain2014-09-101-0/+57
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | T1042RDB_PI is Freescale Reference Design Board supporting the T1042 QorIQ Power Architecture™ processor. T1042 is a reduced personality of T1040 SoC without Integrated 8-port Gigabit. The board is designed with low power features targeted for Printing Image Market. T1042RDB_PI is similar to T1040RDB board with few differences like it has video interface, supports T1042 personality only T1042RDB_PI board Overview ----------------------- - SERDES Connections, 8 lanes supporting: - PCI - SATA 2.0 - DDR Controller - Supports rates of up to 1600 MHz data-rate - Supports one DDR3LP UDIMM -IFC/Local Bus - NAND flash: 1GB 8-bit NAND flash - NOR: 128MB 16-bit NOR Flash - Ethernet - Two on-board RGMII 10/100/1G ethernet ports. - PHY #0 remains powered up during deep-sleep - CPLD - Clocks - System and DDR clock (SYSCLK, “DDRCLK”) - SERDES clocks - Power Supplies - USB - Supports two USB 2.0 ports with integrated PHYs - Two type A ports with 5V@1.5A per port. - SDHC - SDHC/SDXC connector - SPI - On-board 64MB SPI flash - I2C - Device connected: EEPROM, thermal monitor, VID controller, RTC - Other IO - Two Serial ports - ProfiBus port Add support for T1042RDB_PI board: -add device tree -Add entry in corenet_generic.c, as it is similar to other corenet platforms Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * powerpc/fsl-booke: Add initial T1040/T1042 RDB board supportPriyanka Jain2014-09-103-0/+252
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | T1040/T1042RDB is Freescale Reference Design Board. The board can support both T1040/T1042 QorIQ Power Architecture™ processor. T1040/T1042RDB board Overview ----------------------- - SERDES Connections, 8 lanes supporting: - PCI - SGMII - QSGMII - SATA 2.0 - DDR Controller - Supports rates of up to 1600 MHz data-rate - Supports one DDR3LP UDIMM -IFC/Local Bus - NAND flash: 1GB 8-bit NAND flash - NOR: 128MB 16-bit NOR Flash - Ethernet - Two on-board RGMII 10/100/1G ethernet ports. - PHY #0 remains powered up during deep-sleep - CPLD - Clocks - System and DDR clock (SYSCLK, “DDRCLK”) - SERDES clocks - Power Supplies - USB - Supports two USB 2.0 ports with integrated PHYs - Two type A ports with 5V@1.5A per port. - SDHC - SDHC/SDXC connector - SPI - On-board 64MB SPI flash - I2C - Devices connected: EEPROM, thermal monitor, VID controller - Other IO - Two Serial ports - ProfiBus port Add support for T1040/T1042 RDB board: -add device tree -add entry in Kconfig to build -Add entry in corenet_generic.c, as it is similar to other corenet platforms Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * powerpc: dts: t4240: Change T4240 USB controller versionNikhil Badola2014-09-041-2/+2
| | | | | | | | | | | | | | Change USB controller version to 2.5 in compatible string for T4240 Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* | Merge branch 'for-linus' of git://git.infradead.org/users/vkoul/slave-dmaLinus Torvalds2014-08-111-0/+1
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull slave-dma updates from Vinod Koul: "Some notable changes are: - new driver for AMBA AXI NBPF by Guennadi - new driver for sun6i controller by Maxime - pl330 drivers fixes from Lar's - sh-dma updates and fixes from Laurent, Geert and Kuninori - Documentation updates from Geert - drivers fixes and updates spread over dw, edma, freescale, mpc512x etc.." * 'for-linus' of git://git.infradead.org/users/vkoul/slave-dma: (72 commits) dmaengine: sun6i: depends on RESET_CONTROLLER dma: at_hdmac: fix invalid remaining bytes detection dmaengine: nbpfaxi: don't build this driver where it cannot be used dmaengine: nbpf_error_get_channel() can be static dma: pl08x: Use correct specifier for size_t values dmaengine: Remove the context argument to the prep_dma_cyclic operation dmaengine: nbpfaxi: convert to tasklet dmaengine: nbpfaxi: fix a theoretical race dmaengine: add a driver for AMBA AXI NBPF DMAC IP cores dmaengine: add device tree binding documentation for the nbpfaxi driver dmaengine: edma: Do not register second device when booted with DT dmaengine: edma: Do not change the error code returned from edma_alloc_slot dmaengine: rcar-dmac: Add device tree bindings documentation dmaengine: shdma: Allocate cyclic sg list dynamically dmaengine: shdma: Make channel filter ignore unrelated devices dmaengine: sh: Rework Kconfig and Makefile dmaengine: sun6i: Fix memory leaks dmaengine: sun6i: Free the interrupt before killing the tasklet dmaengine: sun6i: Remove switch statement from buswidth convertion routine dmaengine: of: kconfig: select DMA_ENGINE when DMA_OF is selected ...
| * | dmaengine: mpc512x: register for device tree channel lookupAlexander Popov2014-07-251-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Register the controller for device tree based lookup of DMA channels (non-fatal for backwards compatibility with older device trees) and provide the '#dma-cells' property in the shared mpc5121.dtsi file Signed-off-by: Alexander Popov <a13xp0p0v88@gmail.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
* | | Merge branch 'next' of ↵Linus Torvalds2014-08-0712-0/+1375
|\ \ \ | | |/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc Pull powerpc updates from Ben Herrenschmidt: "This is the powerpc new goodies for 3.17. The short story: The biggest bit is Michael removing all of pre-POWER4 processor support from the 64-bit kernel. POWER3 and rs64. This gets rid of a ton of old cruft that has been bitrotting in a long while. It was broken for quite a few versions already and nobody noticed. Nobody uses those machines anymore. While at it, he cleaned up a bunch of old dusty cabinets, getting rid of a skeletton or two. Then, we have some base VFIO support for KVM, which allows assigning of PCI devices to KVM guests, support for large 64-bit BARs on "powernv" platforms, support for HMI (Hardware Management Interrupts) on those same platforms, some sparse-vmemmap improvements (for memory hotplug), There is the usual batch of Freescale embedded updates (summary in the merge commit) and fixes here or there, I think that's it for the highlights" * 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc: (102 commits) powerpc/eeh: Export eeh_iommu_group_to_pe() powerpc/eeh: Add missing #ifdef CONFIG_IOMMU_API powerpc: Reduce scariness of interrupt frames in stack traces powerpc: start loop at section start of start in vmemmap_populated() powerpc: implement vmemmap_free() powerpc: implement vmemmap_remove_mapping() for BOOK3S powerpc: implement vmemmap_list_free() powerpc: Fail remap_4k_pfn() if PFN doesn't fit inside PTE powerpc/book3s: Fix endianess issue for HMI handling on napping cpus. powerpc/book3s: handle HMIs for cpus in nap mode. powerpc/powernv: Invoke opal call to handle hmi. powerpc/book3s: Add basic infrastructure to handle HMI in Linux. powerpc/iommu: Fix comments with it_page_shift powerpc/powernv: Handle compound PE in config accessors powerpc/powernv: Handle compound PE for EEH powerpc/powernv: Handle compound PE powerpc/powernv: Split ioda_eeh_get_state() powerpc/powernv: Allow to freeze PE powerpc/powernv: Enable M64 aperatus for PHB3 powerpc/eeh: Aux PE data for error log ...
| * | powerpc/t2080rdb: Add T2080RDB board supportShengzhou Liu2014-07-312-0/+241
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | T2080PCIe-RDB is a Freescale Reference Design Board that hosts T2080 SoC. The board feature overview: Processor: - T2080 SoC integrating four 64-bit dual-threads e6500 cores up to 1.8GHz DDR Memory: - Single memory controller capable of supporting DDR3 and DDR3-LP devices - 72bit 4GB DDR3-LP SODIMM in slot Ethernet interfaces: - Two 1Gbps RGMII ports on-board - Two 10Gbps SFP+ ports on-board - Two 10Gbps Base-T ports on-board Accelerator: - DPAA components consist of FMan, BMan, QMan, PME, DCE and SEC IFC/Local Bus - NOR: 128MB 16-bit NOR flash - NAND: 1GB 8-bit NAND flash - CPLD: for system controlling with programable header on-board eSPI: - 64MB N25Q512 SPI flash USB: - Two USB2.0 ports with internal PHY (both Type-A) PCIe: - One PCIe x4 goldfinger(support SR-IOV) - One PCIe x4 slot - One PCIe x2 end-point device (C293 crypto co-processor) SATA: - Two SATA 2.0 ports on-board SDHC: - support a MicroSD/TF card on-board I2C: - Four I2C controllers. UART: - Dual 4-pins UART serial ports Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * | powerpc/fsl-booke: Add initial T208x QDS board supportShengzhou Liu2014-07-033-0/+342
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for Freescale T2080/T2081 QDS Development System Board. The T2080QDS Development System is a high-performance computing, evaluation, and development platform that supports T2080 QorIQ Power Architecture processor, with following major features: T2080QDS feature overview: Processor: - T2080 SoC integrating four 64-bit dual-threads e6500 cores up to 1.8GHz Memory: - Single memory controller capable of supporting DDR3 and DDR3-LP - Dual DIMM slots up 2133MT/s with ECC Ethernet interfaces: - Two 1Gbps RGMII on-board ports - Four 10Gbps XFI on-board cages - 1Gbps/2.5Gbps SGMII Riser card - 10Gbps XAUI Riser card Accelerator: - DPAA components consist of FMan, BMan, QMan, PME, DCE and SEC SerDes: - 16 lanes up to 10.3125GHz - Supports Aurora debug, PEX, SATA, SGMII, sRIO, HiGig, XFI and XAUI IFC: - 128MB NOR Flash, 512MB NAND Flash, PromJet debug port and FPGA eSPI: - Three SPI flash (16MB N25Q128A + 8MB EN25S64 + 512KB SST25WF040) USB: - Two USB2.0 ports with internal PHY (one Type-A + one micro Type-AB) PCIE: - Four PCI Express controllers (two PCIe 2.0 and two PCIe 3.0, SR-IOV) SATA: - Two SATA 2.0 ports on-board SRIO: - Two Serial RapidIO 2.0 ports up to 5 GHz eSDHC: - Supports SD/MMC/eMMC Card DMA: - Three 8-channels DMA controllers I2C: - Four I2C controllers. UART: - Dual 4-pins UART serial ports System Logic: - QIXIS-II FPGA system controll T2081QDS board shares the same PCB with T1040QDS with some differences. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * | powerpc/fsl-booke: Add support for T2080/T2081 SoCShengzhou Liu2014-07-033-0/+603
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The T2080 QorIQ multicore processor combines four dual-threaded e6500 Power Architecture processor cores with high-performance datapath acceleration logic and network and peripheral bus interfaces required for networking, telecom/datacom, wireless infrastructure, and mil/aerospace applications. The T2080 SoC includes the following function and features: - Four dual-threaded 64-bit Power architecture e6500 cores, up to 1.8GHz - 2MB L2 cache and 512KB CoreNet platform cache (CPC) - Hierarchical interconnect fabric - One 32-/64-bit DDR3/3L SDRAM memory controllers with ECC and interleaving - Data Path Acceleration Architecture (DPAA) incorporating acceleration - 16 SerDes lanes up to 10.3125 GHz - 8 Ethernet interfaces (multiple 1G/2.5G/10G MACs) - High-speed peripheral interfaces - Four PCI Express controllers (two PCIe 2.0 and two PCIe 3.0) - Two Serial RapidIO 2.0 controllers/ports running at up to 5 GHz - Additional peripheral interfaces - Two serial ATA (SATA 2.0) controllers - Two high-speed USB 2.0 controllers with integrated PHY - Enhanced secure digital host controller (SD/SDXC/eMMC) - Enhanced serial peripheral interface (eSPI) - Four I2C controllers - Four 2-pin UARTs or two 4-pin UARTs - Integrated Flash Controller supporting NAND and NOR flash - Three eight-channel DMA engines - Support for hardware virtualization and partitioning enforcement - QorIQ Platform's Trust Architecture 2.0 T2081 is a reduced personality of T2080 with following difference: Feature T2080 T2081 1G Ethernet numbers: 8 6 10G Ethernet numbers: 4 2 SerDes lanes: 16 8 Serial RapidIO,RMan: 2 no SATA Controller: 2 no Aurora: yes no SoC Package: 896-pins 780-pins Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> [scottwood@freescale.com: added fsl,qoriq-pci-v3.0 for U-Boot compat] Signed-off-by: Scott Wood <scottwood@freescale.com>
| * | powerpc/85xx: Add T4240RDB board supportChunhe Lan2014-06-261-0/+186
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | T4240RDB board Specification ---------------------------- Memory subsystem: 6GB DDR3 128MB NOR flash 2GB NAND flash Ethernet: Eight 1G SGMII ports Four 10Gbps SFP+ ports PCIe: Two PCIe slots USB: Two USB2.0 Type A ports SDHC: One SD-card port SATA: One SATA port UART: Dual RJ45 ports Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com> Cc: Scott Wood <scottwood@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * | powerpc/mpc85xx: fix fsl/p2041-post.dtsi clockgen mux2Valentin Longchamp2014-06-211-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | The mux2 node is missing the clock-output-names field that is required by the clk-ppc-corenet driver. Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * | t4240/dts: Enable third elo3 DMA engine supportChunhe Lan2014-06-212-0/+2
| |/ | | | | | | | | | | | | | | | | | | T4240 has a third DMA engine controller, so add the corresponding DMA node into the dts file. Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com> Cc: Scott Wood <scottwood@freescale.com> [scottwood@freescale.com: reword commit message] Signed-off-by: Scott Wood <scottwood@freescale.com>
* / crypto: dts - Addition of missing SEC compatibile property in c29x device treeNitesh Narayan Lal2014-07-081-1/+2
|/ | | | | | | | | | | The driver is compatible with SEC version 4.0, which was missing from device tree resulting that the caam driver doesn't gets probed. Since SEC is backward compatible with older versions, so this patch adds those missing versions in c29x device tree. Signed-off-by: Nitesh Narayan Lal <b44382@freescale.com> Signed-off-by: Vakul Garg <b16394@freescale.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* Merge branch 'next' of ↵Linus Torvalds2014-06-1133-236/+1975
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc Pull powerpc updates from Ben Herrenschmidt: "Here is the bulk of the powerpc changes for this merge window. It got a bit delayed in part because I wasn't paying attention, and in part because I discovered I had a core PCI change without a PCI maintainer ack in it. Bjorn eventually agreed it was ok to merge it though we'll probably improve it later and I didn't want to rebase to add his ack. There is going to be a bit more next week, essentially fixes that I still want to sort through and test. The biggest item this time is the support to build the ppc64 LE kernel with our new v2 ABI. We previously supported v2 userspace but the kernel itself was a tougher nut to crack. This is now sorted mostly thanks to Anton and Rusty. We also have a fairly big series from Cedric that add support for 64-bit LE zImage boot wrapper. This was made harder by the fact that traditionally our zImage wrapper was always 32-bit, but our new LE toolchains don't really support 32-bit anymore (it's somewhat there but not really "supported") so we didn't want to rely on it. This meant more churn that just endian fixes. This brings some more LE bits as well, such as the ability to run in LE mode without a hypervisor (ie. under OPAL firmware) by doing the right OPAL call to reinitialize the CPU to take HV interrupts in the right mode and the usual pile of endian fixes. There's another series from Gavin adding EEH improvements (one day we *will* have a release with less than 20 EEH patches, I promise!). Another highlight is the support for the "Split core" functionality on P8 by Michael. This allows a P8 core to be split into "sub cores" of 4 threads which allows the subcores to run different guests under KVM (the HW still doesn't support a partition per thread). And then the usual misc bits and fixes ..." [ Further delayed by gmail deciding that BenH is a dirty spammer. Google knows. ] * 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc: (155 commits) powerpc/powernv: Add missing include to LPC code selftests/powerpc: Test the THP bug we fixed in the previous commit powerpc/mm: Check paca psize is up to date for huge mappings powerpc/powernv: Pass buffer size to OPAL validate flash call powerpc/pseries: hcall functions are exported to modules, need _GLOBAL_TOC() powerpc: Exported functions __clear_user and copy_page use r2 so need _GLOBAL_TOC() powerpc/powernv: Set memory_block_size_bytes to 256MB powerpc: Allow ppc_md platform hook to override memory_block_size_bytes powerpc/powernv: Fix endian issues in memory error handling code powerpc/eeh: Skip eeh sysfs when eeh is disabled powerpc: 64bit sendfile is capped at 2GB powerpc/powernv: Provide debugfs access to the LPC bus via OPAL powerpc/serial: Use saner flags when creating legacy ports powerpc: Add cpu family documentation powerpc/xmon: Fix up xmon format strings powerpc/powernv: Add calls to support little endian host powerpc: Document sysfs DSCR interface powerpc: Fix regression of per-CPU DSCR setting powerpc: Split __SYSFS_SPRSETUP macro arch: powerpc/fadump: Cleaning up inconsistent NULL checks ...
| * powerpc/fsl: Add fsl,portid-mapping to corenet1-cf chipsScott Wood2014-05-2310-0/+27
| | | | | | | | | | Signed-off-by: Scott Wood <scottwood@freescale.com> Cc: Diana Craciun <diana.craciun@freescale.com>
| * powerpc/mpc85xx: Add BSC9132 QDS Supportharninder rai2014-05-234-0/+387
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - BSC9132 is an integrated device that targets Femto base station market. It combines Power Architecture e500v2 and DSP StarCore SC3850 technologies with MAPLE-B2F baseband acceleration processing elements - BSC9132QDS Overview 2Gbyte DDR3 (on board DDR) 32Mbyte 16bit NOR flash 128Mbyte 2K page size NAND Flash 256 Kbit M24256 I2C EEPROM 128 Mbit SPI Flash memory SD slot eTSEC1: Connected to SGMII PHY eTSEC2: Connected to SGMII PHY DUART interface: supports one UARTs up to 115200 bps for console display Signed-off-by: Harninder Rai <harninder.rai@freescale.com> Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * powerpc/mpc85xx: Remove P1023 RDS supportLijun Pan2014-05-231-219/+0
| | | | | | | | | | | | | | P1023RDS is no longer supported/manufactured by Freescale while P1023RDB is. Signed-off-by: Lijun Pan <Lijun.Pan@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * powerpc/fsl-booke: Add initial T104x_QDS board supportPrabhakar Kushwaha2014-05-233-0/+258
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for T104x board in board file t104x_qds.c, It is common for both T1040 and T1042 as they share same QDS board. T1040QDS board Overview ----------------------- - SERDES Connections, 8 lanes supporting: — PCI Express: supporting Gen 1 and Gen 2; — SGMII — QSGMII — SATA 2.0 — Aurora debug with dedicated connectors (T1040 only) - DDR Controller - Supports rates of up to 1600 MHz data-rate - Supports one DDR3LP UDIMM/RDIMMs, of single-, dual- or quad-rank types. -IFC/Local Bus - NAND flash: 8-bit, async, up to 2GB. - NOR: 8-bit or 16-bit, non-multiplexed, up to 512MB - GASIC: Simple (minimal) target within Qixis FPGA - PromJET rapid memory download support - Ethernet - Two on-board RGMII 10/100/1G ethernet ports. - PHY #0 remains powered up during deep-sleep (T1040 only) - QIXIS System Logic FPGA - Clocks - System and DDR clock (SYSCLK, “DDRCLK”) - SERDES clocks - Power Supplies - Video - DIU supports video at up to 1280x1024x32bpp - USB - Supports two USB 2.0 ports with integrated PHYs — Two type A ports with 5V@1.5A per port. — Second port can be converted to OTG mini-AB - SDHC - SDHC port connects directly to an adapter card slot, featuring: - Supporting SD slots for: SD, SDHC (1x, 4x, 8x) and/or MMC — Supporting eMMC memory devices - SPI - On-board support of 3 different devices and sizes - Other IO - Two Serial ports - ProfiBus port - Four I2C ports Add T104xQDS support in Kconfig and Makefile. Also create device tree. Following features are currently not implmented. - SerDes: Aurora - IFC: GASIC, Promjet - QIXIS - Ethernet - DIU - power supplies management - ProfiBus Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * powerpc/mpc85xx:Add initial device tree support of T104xPrabhakar Kushwaha2014-05-233-0/+571
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The QorIQ T1040/T1042 processor support four integrated 64-bit e5500 PA processor cores with high-performance data path acceleration architecture and network peripheral interfaces required for networking & telecommunications. T1042 personality is a reduced personality of T1040 without Integrated 8-port Gigabit Ethernet switch. The T1040/T1042 SoC includes the following function and features: - Four e5500 cores, each with a private 256 KB L2 cache - 256 KB shared L3 CoreNet platform cache (CPC) - Interconnect CoreNet platform - 32-/64-bit DDR3L/DDR4 SDRAM memory controller with ECC and interleaving support - Data Path Acceleration Architecture (DPAA) incorporating acceleration for the following functions: - Packet parsing, classification, and distribution - Queue management for scheduling, packet sequencing, and congestion management - Cryptography Acceleration (SEC 5.0) - RegEx Pattern Matching Acceleration (PME 2.2) - IEEE Std 1588 support - Hardware buffer management for buffer allocation and deallocation - Ethernet interfaces - Integrated 8-port Gigabit Ethernet switch (T1040 only) - Four 1 Gbps Ethernet controllers - Two RGMII interfaces or one RGMII and one MII interfaces - High speed peripheral interfaces - Four PCI Express 2.0 controllers running at up to 5 GHz - Two SATA controllers supporting 1.5 and 3.0 Gb/s operation - Upto two QSGMII interface - Upto six SGMII interface supporting 1000 Mbps - One SGMII interface supporting upto 2500 Mbps - Additional peripheral interfaces - Two USB 2.0 controllers with integrated PHY - SD/eSDHC/eMMC - eSPI controller - Four I2C controllers - Four UARTs - Four GPIO controllers - Integrated flash controller (IFC) - Change this to LCD/ HDMI interface (DIU) with 12 bit dual data rate - TDM interface - Multicore programmable interrupt controller (PIC) - Two 8-channel DMA engines - Single source clocking implementation - Deep Sleep power implementaion (wakeup from GPIO/Timer/Ethernet/USB) Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Signed-off-by: Varun Sethi <Varun.Sethi@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * powerpc/fsl: Updated corenet-cf compatible string for corenet1-cf chipsDiana Craciun2014-05-235-5/+5
| | | | | | | | | | | | | | | | Updated the device trees according to the corenet-cf binding definition. Signed-off-by: Diana Craciun <Diana.Craciun@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * powerpc/fsl: Updated device trees for platforms with corenet version 2Diana Craciun2014-05-239-12/+42
| | | | | | | | | | | | | | | | Updated the device trees according to the corenet-cf binding definition. Signed-off-by: Diana Craciun <Diana.Craciun@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * powerpc/85xx: Add OCA4080 board supportMartijn de Gouw2014-05-231-0/+118
| | | | | | | | | | | | | | | | | | | | | | | | | | | | OCA4080 overview: - 1.466 GHz Freescale QorIQ P4080E Processor - 4Gbyte DDR3 on board - 8Mbyte Nor flash - Serial RapidIO 1.2 - 1 x 10/100/1000 BASE-T front ethernet - 1 x 1000 BASE-BX ethernet on AMC connector Signed-off-by: Martijn de Gouw <martijn.de.gouw@prodrive.nl> [scottwood@freescale.com: minor conflict-related changes] Signed-off-by: Scott Wood <scottwood@freescale.com>
| * powerpc/mpc85xx: add support for Keymile's kmcoge4 boardValentin Longchamp2014-05-231-0/+152
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch introduces the support for Keymile's kmcoge4 board which is the internal reference design for boards based on Freescale's P2040/P2041 SoCs. This internal reference design is named kmp204x. The peripherals used on this board are: - SPI NOR Flash as bootloader medium - NAND Flash with a ubi partition - 2 PCIe busses (hosts 1 and 3) - 3 FMAN Ethernet devices (FMAN1 DTSEC1/2/5) - 4 Local Bus windows, with one dedicated to the QRIO reset/power mgmt CPLD - 2 I2C busses - last but not least, the mandatory serial port The patch also adds a defconfig file for this reference design that is necessary because of the lowmem option that must be set higher due to the number of PCIe devices with big ioremapped mem ranges on the boad. Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * powerpc: Added PCI MSI support using the HSTA moduleAlistair Popple2014-05-011-8/+38
| | | | | | | | | | | | | | | | | | | | | | | | The PPC476GTR SoC supports message signalled interrupts (MSI) by writing to special addresses within the High Speed Transfer Assist (HSTA) module. This patch adds support for PCI MSI with a new system device. The DMA window is also updated to allow access to the entire 42-bit address range to allow PCI devices write access to the HSTA module. Signed-off-by: Alistair Popple <alistair@popple.id.au> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * IBM Akebono: Add the Akebono platformAlistair Popple2014-05-011-0/+385
| | | | | | | | | | | | | | This patch adds support for the IBM Akebono board. Signed-off-by: Alistair Popple <alistair@popple.id.au> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* | dma: mpc512x: separate 'compatible' values for MPC512x and MPC8308Alexander Popov2014-05-022-2/+2
|/ | | | | | | | MPC512x and MPC8308 have similar DMA controllers, but are independent SoCs. DMA controller driver should have separate 'compatible' values for these SoCs. Signed-off-by: Alexander Popov <a13xp0p0v88@gmail.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
* powerpc: T4240: Add ina220 node in dtsTang Yuantian2014-03-191-0/+42
| | | | | | | | Add power sensor chip ina220 node in dts to support power monitor Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* powerpc/mpc85xx: Update clock nodes in device treeTang Yuantian2014-03-1916-0/+536
| | | | | | | | | The following SoCs will be affected: p2041, p3041, p4080, p5020, p5040, b4420, b4860, t4240 Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com> Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* Merge remote-tracking branch 'agust/next' into nextBenjamin Herrenschmidt2014-01-293-2/+171
|\ | | | | | | | | | | | | | | << Switch mpc512x to the common clock framework and adapt mpc512x drivers to use the new clock driver. Old PPC_CLOCK code is removed entirely since there are no users any more. >>
| * powerpc/512x: dts: add MPC5125 clock specsGerhard Sittig2014-01-121-1/+52
| | | | | | | | | | | | | | | | | | add clock related specs to the MPC5125 "tower" board DTS - add clock providers (crystal/oscillator, clock control module) - add consumers (the CAN, SDHC, I2C, DIU, FEC, USB, PSC peripherals) Signed-off-by: Gerhard Sittig <gsi@denx.de> Signed-off-by: Anatolij Gustschin <agust@denx.de>
| * dts: mpc512x: add clock specs for client lookupsGerhard Sittig2014-01-121-0/+95
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | this addresses the client side of device tree based clock lookups add clock specifiers to the mbx, nfc, mscan, sdhc, i2c, axe, diu, viu, mdio, fec, usb, pata, psc, psc fifo, and pci nodes in the shared mpc5121.dtsi include Cc: Rob Herring <rob.herring@calxeda.com> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Ian Campbell <ian.campbell@citrix.com> Cc: devicetree@vger.kernel.org Cc: linuxppc-dev@lists.ozlabs.org Reviewed-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Gerhard Sittig <gsi@denx.de> Signed-off-by: Anatolij Gustschin <agust@denx.de>
| * dts: mpc512x: add clock related device tree specsGerhard Sittig2014-01-122-1/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | this addresses the clock driver aka provider's side of clocks - introduce a 'clocks' subtree with an 'osc' node for the crystal or oscillator SoC input (fixed frequency) - the 'clock@f00' clock-control-module node references the 'osc' for its input, and is another provider for all the clocks which the CCM component manages - prepare for future references to clocks from peripheral nodes by means of the <&clks ID> syntax and symbolic ID names which a header file provides - provide default values with 33MHz oscillator frequency in the common include (the 66MHz IPS bus already was there), and add override values for the ifm AC14xx board which deviates from the reference design (25MHz xtal, 80MHz IPS bus) Cc: Rob Herring <rob.herring@calxeda.com> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Ian Campbell <ian.campbell@citrix.com> Cc: linux-arm-kernel@lists.infradead.org Cc: devicetree@vger.kernel.org Reviewed-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Gerhard Sittig <gsi@denx.de> Signed-off-by: Anatolij Gustschin <agust@denx.de>
* | Merge branch 'next' of ↵Linus Torvalds2014-01-2820-159/+1017
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc Pull powerpc updates from Ben Herrenschmidt: "So here's my next branch for powerpc. A bit late as I was on vacation last week. It's mostly the same stuff that was in next already, I just added two patches today which are the wiring up of lockref for powerpc, which for some reason fell through the cracks last time and is trivial. The highlights are, in addition to a bunch of bug fixes: - Reworked Machine Check handling on kernels running without a hypervisor (or acting as a hypervisor). Provides hooks to handle some errors in real mode such as TLB errors, handle SLB errors, etc... - Support for retrieving memory error information from the service processor on IBM servers running without a hypervisor and routing them to the memory poison infrastructure. - _PAGE_NUMA support on server processors - 32-bit BookE relocatable kernel support - FSL e6500 hardware tablewalk support - A bunch of new/revived board support - FSL e6500 deeper idle states and altivec powerdown support You'll notice a generic mm change here, it has been acked by the relevant authorities and is a pre-req for our _PAGE_NUMA support" * 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc: (121 commits) powerpc: Implement arch_spin_is_locked() using arch_spin_value_unlocked() powerpc: Add support for the optimised lockref implementation powerpc/powernv: Call OPAL sync before kexec'ing powerpc/eeh: Escalate error on non-existing PE powerpc/eeh: Handle multiple EEH errors powerpc: Fix transactional FP/VMX/VSX unavailable handlers powerpc: Don't corrupt transactional state when using FP/VMX in kernel powerpc: Reclaim two unused thread_info flag bits powerpc: Fix races with irq_work Move precessing of MCE queued event out from syscall exit path. pseries/cpuidle: Remove redundant call to ppc64_runlatch_off() in cpu idle routines powerpc: Make add_system_ram_resources() __init powerpc: add SATA_MV to ppc64_defconfig powerpc/powernv: Increase candidate fw image size powerpc: Add debug checks to catch invalid cpu-to-node mappings powerpc: Fix the setup of CPU-to-Node mappings during CPU online powerpc/iommu: Don't detach device without IOMMU group powerpc/eeh: Hotplug improvement powerpc/eeh: Call opal_pci_reinit() on powernv for restoring config space powerpc/eeh: Add restore_config operation ...
| * | powerpc/85xx/dts: add third elo3 dma componentShengzhou Liu2014-01-111-0/+82
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add elo3-dma-2.dtsi to support the third DMA controller. This is used on T2080, T4240, B4860, etc. FSL MPIC v4.3 adds a new discontiguous address range for internal interrupts, e.g. internal interrupt 0 is at offset 0x200 and thus interrupt number is: 0x200 >> 5 = 16 in the device tree. DMA controller 3 channel 0 internal interrupt 240 is at offset 0x3a00, and thus the corresponding interrupt number is: 0x3a00 >> 5 = 464, it's similar for other 7 interrupt numbers of DMA 3 channels. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Signed-off-by: Hongbo Zhang <hongbo.zhang@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-28 10:59:03 +0100