| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | RISC-V: refresh defconfig | Anup Patel | 2018-11-02 | 1 | -8/+8 |
| * | irqchip: add a SiFive PLIC driver | Christoph Hellwig | 2018-08-13 | 1 | -0/+1 |
| * | RISC-V: Add CONFIG_HVC_RISCV_SBI=y to defconfig | Palmer Dabbelt | 2018-06-11 | 1 | -0/+1 |
| * | RISC-V: Enable module support in defconfig | Zong Li | 2018-04-03 | 1 | -0/+2 |
| * | RISC-V: Add a basic defconfig | Karsten Merker | 2018-01-08 | 1 | -0/+75 |
| * | RISC-V: Build Infrastructure | Palmer Dabbelt | 2017-09-27 | 1 | -0/+0 |
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