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* riscv: Rearrange hwcap.h and cpufeature.hXiao Wang2023-11-091-1/+1
* Merge patch series "RISC-V: mm: Make SV48 the default address space"Palmer Dabbelt2023-08-311-1/+1
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| * RISC-V: mm: Restrict address space for sv39,sv48,sv57Charlie Jenkins2023-08-231-1/+1
* | riscv: support the elf-fdpic binfmt loaderGreg Ungerer2023-08-231-1/+10
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* riscv: hwcap: change ELF_HWCAP to a functionAndy Chiu2023-06-081-1/+1
* riscv: signal: Report signal frame size to userspace via auxvVincent Chen2023-06-081-0/+9
* RISC-V: Only provide the single-letter extensions in HWCAPPalmer Dabbelt2023-02-221-4/+6
* riscv: Add cache information in AUX vectorGreentime Hu2022-10-131-0/+4
* riscv: compat: vdso: Add setup additional pages implementationGuo Ren2022-04-261-0/+5
* riscv: compat: Add hw capability check for elfGuo Ren2022-04-261-2/+4
* riscv: compat: Add elf.h implementationGuo Ren2022-04-261-1/+40
* riscv: Improve stack randomisation on RV64Kefeng Wang2021-09-111-0/+3
* RISC-V: Add kdump supportNick Kossifidis2021-04-261-0/+6
* riscv: Add cache information in AUX vectorZong Li2020-09-161-0/+13
* riscv: add nommu supportChristoph Hellwig2019-11-181-2/+2
* treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152Thomas Gleixner2019-05-301-5/+1
* riscv: remove unreachable big endian codeChristoph Hellwig2019-04-251-6/+0
* Move EM_RISCV into elf-em.hPalmer Dabbelt2018-10-311-3/+0
* RISC-V: ELF and module implementationPalmer Dabbelt2017-09-271-0/+84