Commit message (Expand) | Author | Age | Files | Lines | |
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* | RISC-V: Add bitmap reprensenting ISA features common across CPUs | Anup Patel | 2020-05-04 | 1 | -0/+22 |
* | riscv: clean up the macro format in each header file | Zong Li | 2019-11-12 | 1 | -3/+4 |
* | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 234 | Thomas Gleixner | 2019-06-19 | 1 | -12/+1 |
* | RISC-V: ELF and module implementation | Palmer Dabbelt | 2017-09-27 | 1 | -0/+37 |